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PD - 93978
HEXFET(R) POWER MOSFET SURFACE MOUNT (LCC-28)
Product Summary
Part Number IRFEA240
BVDSS
IRFEA240 200V, N-CHANNEL
200V
RDS(on) 0.18
ID 11A
Fifth Generation HEXFET(R) power MOSFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon unit area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. These devices are well-suited for applications such as switching power supplies, motor controls, inverters, choppers, audio amplifiers and high-energy pulse circuits.
LCC-28
Features:
n n n n n n n n
Low RDS(on) Avalanche Energy Ratings Dynamic dv/dt Rating Simple Drive Requirements Ease of Paralleling Hermetically Sealed Surface Mount Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 10V, TC = 25C ID @ VGS = 10V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction Storage Temperature Range Package Mounting Surface Temperature Weight For footnotes refer to the last page 11 7.0 44 50 0.4 20 80 11 5.0 5.0 -55 to 150 300 (for 5 s) 0.89
Units A
W
W/C
V mJ A mJ V/ns
o
C
g
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10/20/00
IRFEA240
Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified)
Parameter
BVDSS Drain-to-Source Breakdown Voltage BV DSS/T J Temperature Coefficient of Breakdown Voltage RDS(on) Static Drain-to-Source On-State Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS Zero Gate Voltage Drain Current
Min
200 -- -- 2.0 6.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
Typ Max Units
-- 0.25 -- -- -- -- -- -- -- -- -- -- -- -- -- -- 6.1 1340 434 134 -- -- 0.18 4.0 -- 25 250 100 -100 84 17 41 25 196 80 130 -- -- -- -- V V/C V S( ) A
Test Conditions
VGS = 0V, ID = 1mA Reference to 25C, ID = 1.0mA VGS = 10V, ID = 11A VDS = VGS, ID = 250A VDS = 25V, IDS = 11A VDS= 160V ,VGS=0V VDS = 160V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VGS =10V, ID = 11A VDS = 100V VDD = 100V, ID = 11A RG = 9.1
IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD Ciss Coss Crss
Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
nA
nC
ns
nH
pF
Measured from the center of drain pad to center of source pad VGS = 0V, VDS = 25V f = 1.0MHz
Source-Drain Diode Ratings and Characteristics
Parameter
IS ISM VSD t rr Q RR ton Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min Typ Max Units
-- -- -- -- -- -- -- -- -- -- 11 44 1.5 470 6.5
Test Conditions
A
V nS C
Tj = 25C, IS = 11A, VGS = 0V Tj = 25C, IF = 11A, di/dt 100A/s VDD 25V
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC Junction-to-Case
Min Typ Max Units
-- -- 2.5
C/W
Test Conditions
Note: Corresponding Spice and Saber models are available on the G&S Website. For footnotes refer to the last page
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IRFEA240
100
100
10
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
10
1
4.5V
4.5V
1
0.1
0.01 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
0.1 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.5
R DS(on) , Drain-to-Source On Resistance (Normalized)
ID = 11A
I D , Drain-to-Source Current (A)
2.0
10
TJ = 150 C
1.5
TJ = 25 C
1
1.0
0.5
0.1 4.0
V DS = 15 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 10.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRFEA240
3000
2500
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
ID = 11 A VDS = 160V VDS = 100V VDS = 40V
16
C, Capacitance (pF)
2000
Ciss
1500
12
1000
Coss
8
500
Crss
4
0 1 10 100
0 0 20 40
FOR TEST CIRCUIT SEE FIGURE 13
60 80 100
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
ISD , Reverse Drain Current (A)
TJ = 150 C
10
ID, Drain-to-Source Current (A)
100
10
TJ = 25 C
1
1ms
1 Tc = 25C Tj = 150C Single Pulse 0.1 1 10 100 1000 VDS , Drain-toSource Voltage (V)
10ms
0.1 0.2
V GS = 0 V
0.7 1.2 1.7 2.2
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFEA240
12
VDS VGS RG
RD
10
D.U.T.
+
I D , Drain Current (A)
8
-VDD
10V
6
Pulse Width 1 s Duty Factor 0.1 %
4
Fig 10a. Switching Time Test Circuit
VDS 90%
2
0 25 50 75 100 125 150
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
D = 0.50 1 0.20 0.10 0.05 0.1 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFEA240
200
EAS , Single Pulse Avalanche Energy (mJ)
TOP
160
15V
BOTTOM
ID 5.0A 7.0A 11A
VDS
L
D R IV E R
120
RG
D .U .T.
IA S
+ - VD D
A
80
10V 20V
tp
0 .01
40
Fig 12a. Unclamped Inductive Test Circuit
0 25 50 75 100 125 150
V (B R )D S S tp
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
10V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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IRFEA240
Footnotes:
Repetitive Rating; Pulse width limited by
maximum junction temperature. VDD = 25 V, Starting TJ = 25C, L=1.25mH Peak IAS = 11A, RG= 25
ISD 11A, di/dt 270 A/s, Pulse width 400 s; Duty Cycle 2%
VDD 200V, TJ 150C
Case Outline and Dimensions -- LCC-28
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd, Whyteleafe, Surrey CR3 OBL, UK Tel: ++ 44 (0)20 8645 8000 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 (0) 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 011 451 0111 IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo 171 Tel: 81 (0)3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 (0)838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673 Tel: 886-(0)2 2377 9936 Data and specifications subject to change without notice. 10/00
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