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INTEGRATED CIRCUITS
SA3601 Low voltage dual-band RF front-end
Preliminary specification 1999 Nov 09
Philips Semiconductors
Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
DESCRIPTION
The SA3601 is an integrated dual-band RF front-end that operates at both cellular (AMPS and TDMA) and PCS (TDMA) frequencies, and is designed in a 20 GHz fT BiCMOS process--QUBiC2. The low-band (LB) receiver is a combined low-noise amplifier (LNA) and mixer. The LNA has a 1.7 dB noise figure (NF) at 881 MHz with 17 dB of gain and an IIP3 of -7 dBm. The wide-dynamic range mixer has a 9.5 dB NF at 881 MHz with 9.5 dB of gain and an IIP3 of +6 dBm. The high-band (HB) receiver is a combined low-noise amplifier (LNA) and mixer, with the low-band and high-band mixers sharing the same mixer output. The LNA has a 2.2 dB NF at 1960 MHz with 16 dB of gain and an IIP3 of -5 dBm. The wide-dynamic range mixer has a 8.5 dB NF at 1960 MHz with 8.5 dB of gain and an IIP3 of +5.5 dBm.
APPLICATIONS
* 800 to 1000 MHz analog and digital receivers * 1800 to 2000 MHz digital receivers * Portable radios * Mobile communications equipment
PIN CONFIGURATION
HBLNA_OUT
LBLNA_OUT
FEATURES
* Low current consumption: LB ICC = 14 mA; HB ICC = 15.5 mA * Outstanding low- and high-band noise figure * LNAs with gain control (30 dB gain step) * LO input and output buffers * Frequency doubler * On chip logic for network selection and power down * Very small outline package
HBLNA_IN GND VCC HBMXR+_IN HBMXR-_IN PD1 VCC GND
1 2 3 4 5 6 7 8 9 PD2
32
31
30
29
28
27
26
25 24 23 22 GND VCC LBMXR_IN GND MXR+_OUT MXR-_OUT GND LBVCO_IN
TOP VIEW
21 20 19 18
10 GND
11 GND
12 LBVCO_OUT
13 GND
14 HBVCO_IN
15 PD3
16 GND
17
LBLNA_IN
GND
GND
GND
GND
GND
SR02237
ORDERING INFORMATION
TYPE NUMBER SA3601 PACKAGE NAME BCC32++ DESCRIPTION HBCC32: plastic, heatsink bottom chip carrier; 32 terminals; body 5 x 5 x 0.65 mm VERSION SOT560-1
1999 Nov 09
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Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
PIN DESCRIPTIONS
PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PIN NAME HBLNA_IN GND VCC HBMXR+_IN HBMXR-_IN PD1 VCC GND PD2 GND GND LBVCO_OUT GND PD3 HBVCO_IN GND Ground Power supply Highband mixer positive input Highband mixer negative input Power down control 1 Power supply Ground Power down control 2 Ground Ground Lowband VCO buffered output Ground Highband VCO input Ground DESCRIPTION Highband LNA input PIN NO. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PIN NAME LBVCO_IN GND MXR-_OUT MXR+_OUT GND LBMXR_IN VCC GND LBLNA_IN GND GND LBLNA_OUT GND GND GND Ground Mixer negative output Mixer positive output Ground Lowband mixer input Power supply Ground Lowband LNA input Ground Ground Lowband LNA output Ground Ground Ground DESCRIPTION Lowband VCO input
HBLNA_OUT
LBLNA_OUT
HBLNA_IN
1
32
31
30
29
28
27
26
25 24 23 22 21 20
GND VCC HBMXR+_IN HBMXR-_IN PD1 VCC GND
2 3 4 5 6 7 8 x2
LBLNA_IN
GND
GND
GND
GND
GND
PD2
LBVCO_OUT
HBVCO_IN
GND
GND
GND
GND
PD3
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HBLNA_OUT Highband LNA output Power down control 3
BLOCK DIAGRAM
GND VCC LBMXR_IN GND MXR+_OUT MXR-_OUT GND
TOP VIEW
19 18
9
10
11
12
13
14
15
16
17
LBVCO_IN
SR02238
Figure 1.
Block Diagram
1999 Nov 09
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Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
MODE SELECT LOGIC
PD1 0 0 0 0 1 1 1 1 PD2 0 0 1 1 0 0 1 1 PD3 0 1 0 1 0 1 0 1 OPERATING MODE Sleep mode Tx mode, LO lowband buffer Rx mode cellular, low gain Rx mode cellular, high gain Rx mode PCS, low gain, x2 Rx mode PCS, high gain, x2 Rx mode PCS, low gain, no x2 Rx mode PCS, high gain, no x2 Cel LNA off off off on off off off off Cel MXR off off on on off off off off PCS LNA off off off off off on off on PCS MXR off off off off on on on on x2 DBL off off off off on on off off LB LO O/P off on on on on on off off HB LO O/P off off off off off off off off
1999 Nov 09
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Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
OPERATION
The SA3601 is a highly integrated dual-band radio frequency (RF) front-end integrated circuit (IC) targeted for TDMA applications. This IC is split into separate low-band (LB) and high-band (HB) receivers. The LB receiver contains a low noise amplifier (LNA) and mixer that are designed to operate in the cellular frequency range (869-894MHz). The HB receiver contains an LNA and mixer that are designed to operate in the PCS frequency range (1930-1990 MHz). The SA3601 also contains a frequency doubler that can drive the HB mixer local oscillator (LO) port, allowing a single-band voltage controlled oscillator (VCO) to be used to drive both mixers. Modes for bypassing the doubler are also provided, in the case where a dual-band VCO is used. The SA3601 has eight modes of operation that control the LNAs, mixers, LO buffers and doubler. The select pins (PD1,2,3) are used to change modes of operation. The internal select logic powers the device down (0,0,0), turns on the LB LO buffer for use in transmit mode (0,0,1), enables cellular receive mode for high and low gain (0,1,X), enables PCS receive mode for high and low gain both without doubler (1,1,X) and with doubler (1,0,X). The desired gain state can be selected by setting the logic pins (PD1,PD2,PD3) appropriately.
High-Band Receive Section
The HB circuit contains a LNA followed by a Gilbert cell mixer with differential inputs. The LNA output uses an internal pull-up inductor to VCC , which eliminates the need for an external pull-up. The mixer IF outputs are differential and are combined with the low-band IF mixer outputs thereby eliminating the need for extra output pins. Similar to the LB LNA, the HB LNA has two gain settings: high gain (16 dB) and low gain (-15 dB).
Control Logic Section
Pins PD1, PD2, and PD3, control the logic functions of the SA3601. The PD1 selects between LB and HB operations. In LB receive mode, the LB LNA is in high gain mode (or on) when PD1,2,3 are (0,1,1). In all other modes, the LB LNA is off. The LB mixer is on when PD1,2,3 are (0,1,X). In all other modes, the LB mixer is off. During transmit mode when PD1,2,3 are (0,0,1), the LB LO buffer is on, enabling use of the LO signal for the transmitter. In HB receive mode, the HB LNA is in high gain mode (or on) when PD1,2,3 are (1,X,1). In all other modes, the HB LNA is off. The HB mixer is on when PD1,2,3 are (1,X,X), and is off in all other modes. The on-chip frequency doubler (X2) is on in (1,0,X) modes. When the frequency doubler is on, the input signal from the LB LO buffer is doubled in frequency, which can then be used to drive the HB mixer LO port. The frequency doubler can also be bypassed in modes (1,1,X), in which case the HB mixer is driven directly by an external 2 GHz LO signal.
Low-Band Receive Section
The LB circuit contains a LNA followed by a wide dynamic range active mixer. In a typical application circuit, the LNA output uses an external pull-up inductor to VCC and is AC coupled. The mixer IF outputs are differential and are combined with the high-band IF mixer outputs thereby eliminating the need for extra output pins. External inductors and capacitors can be used to convert the differential mixer outputs to single-ended. Furthermore, the LNA provides two gain settings: high gain (17dB) and low gain (-15 dB).
1999 Nov 09
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Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
ABSOLUTE MAXIMUM RATINGS1
SYMBOL VCC VIN PD TJ MAX PMAX IMAX TSTG Supply voltage Voltage applied to any other pin Power dissipation, Tamb = +25 C (still air) Maximum junction temperature Power input/output DC current into any I/O pin Storage temperature range -10 -65 -40 PARAMETER LIMITS MIN. -0.3 -0.3 MAX. +4.5 VCC+0.3 TBD 150 +20 +10 +150 +85 UNITS V V mW C dBm mA C C
TO Operating temperature NOTES: 1. IC is protected for ESD voltages up to 500 V (human body model).
DC ELECTRICAL CHARACTERISTICS
Unless otherwise specified, all Input/Output ports are single-ended.
DC PARAMETERS
VCC = +3.0 V, Tamb = +25C; unless otherwise specified SYMBOL Sleep mode Tx mode, LO lowband buffer Rx mode cellular, low gain ICC Rx mode cellular, high gain Rx mode PCS, low gain, x2 Rx mode PCS, high gain, x2 Rx mode PCS, low gain, no x2 Rx mode PCS, high gain, no x2 VIH VIL IBIAS Input HIGH voltage Input LOW voltage Input bias current Logic 1 or logic 0 PARAMETER TEST CONDITIONS PD1 0 0 0 0 1 1 1 1 PD2 0 0 1 1 0 0 1 1 PD3 0 1 0 1 0 1 0 1 0.5xVCC -0.3 -5 MIN TESTER LIMITS TYP 0.1 4.3 10.1 14 17.5 23.5 10 15.5 MAX 1 5.5 12 16.5 21 28 TBD TBD VCC+0.3 0.2xVCC +5 UNIT A mA mA mA mA mA mA mA V V A
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Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
AC ELECTRICAL CHARACTERISTICS
VCC = +3.0 V, fRF = 881 MHz, fLO = 963 MHz, Tamb = +25C, unless otherwise specified SYMBOL PARAMETER TEST CONDITIONS LIMITS MIN. 20.5 -11.5 869 17 1.7 -7 -20 -15 15 15 50 system 50 system 10 10 20 869 70 939 PLO = -5 dBm PLO = -5 dBm PLO = -5 dBm PLO = -5 dBm -7 50 system 50 system PLO = -5 dBm fRF=890.0 MHz @-36 dBm fTx=848.9 MHz @-20 dBm fRF=876.3 MHz @-36 dBm fTx=848.9 MHz @-20 dBm -110 -110 25 40 20 939 50 matched LB_VCO_IN 50 matched LB_VCO_OUT 50 system 50 system PLO = -5 dBm -7 -5 -7.5 10 10 -20 20 1100 -3 dB dB s MHz dBm dBm dB dB dBc s dBm 9.5 9.5 6 -14 -5 10 10 -3 894 200 1100 -3 TYP 23.5 -8.5 +3 MAX. 26.5 -5.5 894 UNIT
Cascaded Gain Section GSYS GBYP fRF GENA NFENA IIP3ENA P1dBENA GBYP NFBYP IIP3BYP ZIN ZOUT TSW fRF fIF fLO GMXR NFMXR IIP3MXR P1dBMXR PLO ZIN ZOUT LB LNA + Mixer, High Gain LB LNA + Mixer, Low Gain RF input frequency range Small signal gain ENABLED Noise figure ENABLED Input 3rd order Intercept Point Input 1 dB Compression Point Small signal gain BYPASSED Noise figure BYPASSED Input 3rd order Intercept Point Input return loss Output return loss ENABLE/DISABLE speed1 RF input frequency range IF output frequency range LO input range Small signal gain SSB Noise figure Input 3rd order Intercept Point Input 1 dB Compression Point LO input power range Input return loss Output return loss Two-tone spurious rejection: 2-Tone 2(fRF-fTx), fRF-fTx=fIF/2 3(fRF-fTx), fRF-fTx=fIF/3 RF-LO LO-RF TSW PLO PIN POUT ZIN ZOUT TSW RF to LO isolation LO to RF isolation ENABLE/DISABLE speed1 LO Input frequency range LO Input power LO Output power Input return loss Output return loss Harmonic content ENABLE/DISABLE speed1 Filter loss = 3 dB Filter loss = 3 dB dB dB MHz dB dB dBm dBm dB dB dBm dB dB s MHz MHz MHz dB dB dBm dBm dBm dB dB
Low-band LNA Section
Low-band Mixer Section
Low-band LO Buffer Section
1999 Nov 09
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Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
AC ELECTRICAL CHARACTERISTICS
VCC = +3.0 V, fRF = 1960 MHz, fLO = 2042 MHz, Tamb = +25C, unless otherwise specified SYMBOL Cascaded Gain Section GSYS GBYP fRF GENA NFENA IIP3ENA P1dBENA GBYP NFBYP IIP3BYP ZIN ZOUT TSW fRF fIF fLO GMXR NFMXR IIP3MXR P1dBMXR HB LNA + Mixer, High Gain HB LNA + Mixer, Low Gain RF input frequency range Small signal gain ENABLED Noise figure ENABLED Input 3rd order Intercept Point Input 1 dB Compression Point Small signal gain BYPASSED Noise figure BYPASSED Input 3rd order Intercept Point Input return loss Output return loss ENABLE/DISABLE speed1 1930 70 2000 PLO = -5 dBm PLO = -5 dBm PLO = -5 dBm PLO = -5 dBm PLO = -5 dBm PLO = -5 dBm fRF=1972.0 MHz @-36 dBm fLO=2013.1 MHz @-5 dBm fRF=1985.7 MHz @-36 dBm fLO=2013.1 MHz @-5 dBm PLO = -5 dBm, fRF=1933.0 MHz @-36 dBm fTx=1850.8 MHz @-20 dBm fRF=1951.0 MHz @-36 dBm fTx=1909.9 MHz @-20 dBm fRF=1937.3 MHz @-36 dBm fTx=1909.9 MHz @-20 dBm -7 50 system 50 system -70 -115 -125 -5 10 10 40 30 20 -3 dBm dB dB dB dB s dBm 8.5 8.5 9 5.5 3 -14 -90 dBm -85 -114 dBm 50 system, ENA and BYP 50 system, ENA and BYP Filter loss = 3 dB Filter loss = 3 dB 18.5 -12.5 1930 16 2.2 -5 -14 -15 15 15 10 10 20 1990 200 2190 21.5 -9.5 24.5 -6.5 1990 dB dB MHz dB dB dBm dBm dB dB dBm dB dB s MHz MHz MHz dB dB dB dBm dBm dBm PARAMETER TEST CONDITIONS LIMITS MIN. -3 TYP +3 MAX. UNIT
High-band LNA Section
High-band Mixer Section RF input frequency range IF output frequency range LO input range Small signal gain SSB Noise figure, doubler off SSB Noise figure, doubler on Input 3rd order Intercept Point, doubler off Input 3rd order Intercept Point, doubler on Input 1 dB Compression Point Half-IF spurious rejection 2(fRF-fLO), fRF-fLO=fIF/2, doubler off Half-IF spurious rejection 2(fRF-fLO), fRF-fLO=fIF/2, doubler on Third-IF spurious rejection 3(fRF-fLO), fRF-fLO=fIF/3 Two-tone spurious rejection: fRF-fTx, fRF-fTx=fIF 2-Tone 2(fRF-fTx), fRF-fTx=fIF/2 3(fRF-fTx), fRF-fTx=fIF/3 PLO ZIN ZOUT RF-LO LO-RF TSW LO input power range Input return loss Output return loss RF to LO isolation LO to RF isolation ENABLE/DISABLE speed1
IF/2 rej rej.
IF/3 rej.
1999 Nov 09
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Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
AC ELECTRICAL CHARACTERISTICS
VCC = +3.0 V, Tamb= +25C, unless otherwise specified SYMBOL PARAMETER TEST CONDITIONS LIMITS MIN. 2000 50 matched HB_VCO_IN 50 matched HB_VCO_OUT 50 system 50 system PLO = -5 dBm -7 -5 -8 10 10 -20 20 1000 50 matched LB_VCO_IN 50 system 50 system -7 -5 10 10 20 1095 -3 -3 TYP +3 MAX. 2190 -3 UNITS
High-band LO Buffer Section PLO PIN POUT ZIN ZOUT TSW fLO PIN ZIN ZOUT TSW LO Input frequency range LO Input power LO Output power Input return loss Output return loss Harmonic content ENABLE/DISABLE speed1 LO Input frequency LO Input power Input return loss Output return loss ENABLE/DISABLE speed1 x2 LO Doubler Section MHz dBm dB dB s MHz dBm dBm dB dB dBc s
NOTES: 1. Dependent on external components.
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Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
PIN NO
PIN MNEMONIC
DC V
EQUIVALENT CIRCUIT
VBIAS
5K
1
HB LNA IN
0.8
SR01787
VCC
3, 7, 23
VCC
VBIAS
4
HB MXR+ IN
1.2
5
HB MXR- IN
1.2
SR01788
6
PD1
9
PD2
Apply externally
15
PD3
SR01789
VCC
12
LB VCO OUT
VCC - 0.2 V
SR01791
VCC
VBIAS
VBIAS
14
HB VCO IN
1.9
SR01792
1999 Nov 09
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Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
PIN NO
PIN MNEMONIC
DC V
EQUIVALENT CIRCUIT
VCC
17
LB VCO IN
1.0
SR01793
VCC 2 pF
19
MXR- OUT
VCC
Pull-u Pull-up externally to VCC
2 pF
20
MXR+ OUT
SR01794
VCC
VBIAS
22
LB MXR IN
1.2
SR01795
VCC
VBIAS
5K
25
LB LNA IN
0.8
SR01796
1999 Nov 09
11
Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
PIN NO
PIN MNEMONIC
DC V
EQUIVALENT CIRCUIT
VCC
28
LB LNA OUT
Pull-up externally to VCC
SR01797
VCC
30
HB LNA OUT
SR01786
1999 Nov 09
12
Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
HBCC32: plastic, heatsink bottom chip carrier; 32 terminals; body 5 x 5 x 0.65 mm
SOT560-1
1999 Nov 09
13
Philips Semiconductors
Preliminary specification
Low voltage dual-band RF front-end
SA3601
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 2000 All rights reserved. Printed in U.S.A. Date of release: 04-00 Document order number: 9397 750 07037
Philips Semiconductors
1999 Nov 09 14

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