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 Not recommended for new designs - Please use 25AA040A or 25LC040A.
25AA040/25LC040/25C040
4K SPI Bus Serial EEPROM
Device Selection Table
Part Number 25AA040 25LC040 25C040 VCC Range 1.8-5.5V 2.5-5.5V 4.5-5.5V Max. Clock Frequency 1 MHz 2 MHz 3 MHz Temp. Ranges I I I,E Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts. Also, write operations to the device can be disabled via the write-protect pin (WP).
Package Types
PDIP
CS SO 1 8 VCC HOLD SCK SI
2 3 4
25XX040
Features:
* Low-power CMOS technology: - Write current: 3 mA, typical - Read current: 500 A, typical - Standby current: 500 nA, typical * 512 x 8-bit organization * 16 byte page * Write cycle time: 5 ms max. * Self-timed Erase and Write cycles * Block write protection: - Protect none, 1/4, 1/2 or all of array * Built-in write protection: - Power on/off data protection circuitry - Write enable latch - Write-protect pin * Sequential read * High reliability: - Endurance: 1M cycles - Data retention: > 200 years - ESD protection: > 4000V * 8-pin PDIP, SOIC and TSSOP packages * Temperature ranges supported: - Industrial (I): -40C to +85C - Automotive (E) (25C040): -40C to +125C
7 6 5
WP VSS
SOIC
CS SO WP VSS
1
8
VCC HOLD SCK SI
2 3 4
25XX040
1 2 3 4
7 6 5
TSSOP 25XX040
HOLD VCC CS SO 8 7 6 5 SCK SI VSS WP
Block Diagram
STATUS Register HV Generator
I/O Control Logic
Description:
The Microchip Technology Inc. 25AA040/25LC040/ 25C040 (25XX040*) is a 4 Kbit serial Electrically Erasable PROM. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a Chip Select (CS) input.
*25XX040 is used in this document as a generic part number for the 25AA040/25LC040/25C040 devices.
Memory Control Logic
EEPROM Array XDEC Page Latches
SI SO CS SCK HOLD WP VCC VSS
Y Decoder
Sense Amp. R/W Control
(c) 2006 Microchip Technology Inc.
DS21204E-page 1
25AA040/25LC040/25C040
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings()
VCC.............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS .......................................................................................................... -0.6V to VCC+1.0V Storage temperature .................................................................................................................................-65C to 150C Ambient temperature under bias ...............................................................................................................-65C to 125C ESD protection on all pins ......................................................................................................................................... 4 KV NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an extended period of time may affect device reliability
TABLE 1-1:
DC CHARACTERISTICS
Industrial (I): TA = -40C to +85C VCC = 1.8V to 5.5V Automotive (E): TA = -40C to +125C VCC = 4.5V to 5.5V (25C040 only) Min. 2.0 0.7 VCC -0.3 -0.3 -- -- VCC -0.5 -- -- -- Max. VCC+1 VCC+1 0.8 0.3 VCC 0.4 0.2 -- 1 1 7 Units V V V V V V V A A pF Test Conditions VCC 2.7V (Note) VCC< 2.7V (Note) VCC 2.7V (Note) VCC < 2.7V (Note) IOL = 2.1 mA IOL = 1.0 mA, VCC < 2.5V IOH =-400 A CS = VCC, VIN = VSS TO VCC CS = VCC, VOUT = VSS TO VCC TA = 25C, CLK = 1.0 MHz, VCC = 5.0V (Note) VCC = 5.5V; FCLK = 3.0 MHz; SO = Open VCC = 2.5V; FCLK = 2.0 MHz; SO = Open VCC = 5.5V VCC = 2.5V CS = VCC = 5.5V, Inputs tied to VCC or VSS CS = VCC = 2.5V, Inputs tied to VCC or VSS
DC CHARACTERISTICS Param. No. D001 D002 D003 D004 D005 D006 D007 D008 D009 D010 Sym. VIH1 VIH2 VIL1 VIL2 VOL VOL VOH ILI ILO CINT Characteristic High-level input voltage Low-level input voltage Low-level output voltage High-level output voltage Input leakage current Output leakage current Internal Capacitance (all inputs and outputs)
D011 D012 D013
ICC Read Operating Current ICC Write ICCS Standby Current
-- -- -- -- -- --
1 500 5 3 5 1
mA A mA mA A A
Note:
This parameter is periodically sampled and not 100% tested.
DS21204E-page 2
(c) 2006 Microchip Technology Inc.
25AA040/25LC040/25C040
TABLE 1-2: AC CHARACTERISTICS
Industrial (I): Automotive (E): TA = -40C to +85C TA = -40C to +125C VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V (25C040 only) AC CHARACTERISTICS
Param No.
1
Sym.
FCLK
Characteristic
Clock Frequency
Min.
-- -- -- 100 250 500 150 250 475 500 30 50 50 50 100 100 -- -- 150 230 475 150 230 475 50 50 -- -- -- 0 -- -- -- 100 100 200 100 100 200 100 150 200 100 150 200 -- 1M
Max.
3 2 1 -- -- -- -- -- -- -- -- -- -- -- -- -- 2 2 -- -- -- -- -- -- -- -- 150 230 475 -- 200 250 500 -- -- -- -- -- -- -- -- -- -- -- -- 5 --
Units
MHz MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns ns s s ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms E/W Cycles
Test Conditions
VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V -- VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V (Note 1) (Note 1) VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V -- -- VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V (Note 1) VCC = 4.5V to 5.5V (Note 1) VCC = 2.5V to 4.5V (Note 1) VCC = 1.8V to 2.5V (Note 1) VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V VCC = 4.5V to 5.5V (Note 1) VCC = 2.5V to 4.5V (Note 1) VCC = 1.8V to 2.5V (Note 1) VCC = 4.5V to 5.5V VCC = 2.5V to 4.5V VCC = 1.8V to 2.5V -- (Note 2)
2
TCSS
CS Setup Time
3
TCSH
CS Hold Time
4 5
TCSD TSU
CS Disable Time Data Setup Time
6
THD
Data Hold Time
7 8 9
TR TF THI
CLK Rise Time CLK Fall Time Clock High Time
10
TLO
Clock Low Time
11 12 13
TCLD TCLE TV
Clock Delay Time Clock Enable Time Output Valid from Clock Low
14 15
THO TDIS
Output Hold Time Output Disable Time
16
THS
HOLD Setup Time
17
THH
HOLD Hold Time
18
THZ
HOLD Low to Output High-Z
19
THV
HOLD High to Output Valid
20 21
TWC -- Note 1: 2:
Internal Write Cycle Time Endurance
This parameter is periodically sampled and not 100% tested. This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total EnduranceTM Model which can be obtained from our web site: www.microchip.com.
(c) 2006 Microchip Technology Inc.
DS21204E-page 3
25AA040/25LC040/25C040
FIGURE 1-1:
CS 16 SCK 18 SO n+2 n+1 n High-impedance 19 n 5 n n-1 n-1 17 16 17
HOLD TIMING
Don't Care SI HOLD n+2 n+1 n
FIGURE 1-2:
SERIAL INPUT TIMING
4
CS 2 Mode 1,1 SCK Mode 0,0 5 SI 6 LSB in 7 8 3
12 11
MSB in
SO
High-impedance
FIGURE 1-3:
SERIAL OUTPUT TIMING
CS 9 SCK 13 14 SO MSB out 15 ISB out 10 3 Mode 1,1 Mode 0,0
SI
Don't Care
DS21204E-page 4
(c) 2006 Microchip Technology Inc.
25AA040/25LC040/25C040
TABLE 1-3:
AC Waveform: VLO = 0.2V VHI = VCC - 0.2V VHI = 4.0V Input Output Note 1: For VCC 4.0V 2: For VCC > 4.0V -- (Note 1) (Note 2) SO 0.5 VCC 0.5 VCC 1.8 K 100 pF 2.25 K
AC TEST CONDITIONS
FIGURE 1-4:
AC TEST CIRCUIT AC
VCC
Timing Measurement Reference Level
(c) 2006 Microchip Technology Inc.
DS21204E-page 5
25AA040/25LC040/25C040
2.0 PIN DESCRIPTIONS
2.4 Serial Input (SI)
The descriptions of the pins are listed in Table 2-1. The SI pin is used to transfer data into the device. It receives instructions, addresses and data. Data is latched on the rising edge of the serial clock.
TABLE 2-1:
Name CS SO WP VSS SI SCK HOLD VCC PDIP 1 2 3 4 5 6 7 8
PIN FUNCTION TABLE
SOIC 1 2 3 4 5 6 7 8 TSSOP 3 4 5 6 7 8 1 2 Description Chip Select Input Serial Data Output Write-Protect Pin Ground Serial Data Input Serial Clock Input Hold Input Supply Voltage
2.5
Serial Clock (SCK)
The SCK is used to synchronize the communication between a master and the 25XX040. Instructions, addresses or data present on the SI pin are latched on the rising edge of the clock input, while data on the SO pin is updated after the falling edge of the clock input.
2.6
Hold (HOLD)
2.1
Chip Select (CS)
A low level on this pin selects the device. A high level deselects the device and forces it into Standby mode. However, a programming cycle which is already initiated or in progress will be completed, regardless of the CS input signal. If CS is brought high during a program cycle, the device will go in Standby mode as soon as the programming cycle is complete. When the device is deselected, SO goes into the high-impedance state, allowing multiple parts to share the same SPI bus. A low-to-high transition on CS after a valid write sequence initiates an internal write cycle. After powerup, a low level on CS is required prior to any sequence being initiated.
The HOLD pin is used to suspend transmission to the 25XX040 while in the middle of a serial sequence without having to retransmit the entire sequence again at a later time. It must be held high any time this function is not being used. Once the device is selected and a serial sequence is underway, the HOLD pin may be pulled low to pause further serial communication without resetting the serial sequence. The HOLD pin must be brought low while SCK is low, otherwise the HOLD function will not be invoked until the next SCK high-to-low transition. The 25XX040 must remain selected during this sequence. The SI, SCK and SO pins are in a high-impedance state during the time the part is paused and transitions on these pins will be ignored. To resume serial communication, HOLD must be brought high while the SCK pin is low, otherwise serial communication will not resume. Lowering the HOLD line at any time will tri-state the SO line.
2.2
Serial Output (SO)
The SO pin is used to transfer data out of the 25XX040. During a read cycle, data is shifted out on this pin after the falling edge of the serial clock.
2.3
Write-Protect (WP)
This pin is a hardware write-protect input pin. When WP is low, all writes to the array or STATUS register are disabled, but any other operation functions normally. When WP is high, all functions, including nonvolatile writes operate normally. WP going low at any time will reset the write enable latch and inhibit programming, except when an internal write has already begun. If an internal write cycle has already begun, WP going low will have no effect on the write. See Table 3-3 for Write-Protect Functionality Matrix.
DS21204E-page 6
(c) 2006 Microchip Technology Inc.
25AA040/25LC040/25C040
3.0
3.1
FUNCTIONAL DESCRIPTION
Principles of Operation
3.3
Write Sequence
The 25XX040 is a 512 byte Serial EEPROM designed to interface directly with the Serial Peripheral Interface (SPI) port of many of today's popular microcontroller families, including Microchip's PIC16C6X/7X microcontrollers. It may also interface with microcontrollers that do not have a built-in SPI port by using discrete I/O lines programmed properly with the software. The 25XX040 contains an 8-bit instruction register. The part is accessed via the SI pin, with data being clocked in on the rising edge of SCK. The CS pin must be low and the HOLD pin must be high for the entire operation. The WP pin must be held high to allow writing to the memory array. Table 3-1 contains a list of the possible instruction bytes and format for device operation. The Most Significant address bit (A8) is located in the instruction byte. All instructions, addresses, and data are transferred MSB first, LSB last. Data is sampled on the first rising edge of SCK after CS goes low. If the clock line is shared with other peripheral devices on the SPI bus, the user can assert the HOLD input and place the 25XX040 in `HOLD' mode. After releasing the HOLD pin, operation will resume from the point when the HOLD was asserted.
Prior to any attempt to write data to the 25XX040, the write enable latch must be set by issuing the WREN instruction (Figure 3-4). This is done by setting CS low and then clocking out the proper instruction into the 25XX040. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch. If the write operation is initiated immediately after the WREN instruction without CS being brought high, the data will not be written to the array because the write enable latch will not have been properly set. Once the write enable latch is set, the user may proceed by setting the CS low, issuing a WRITE instruction, followed by the address, and then the data to be written. Keep in mind that the Most Significant address bit (A8) is included in the instruction byte. Up to 16 bytes of data can be sent to the 25XX040 before a write cycle is necessary. The only restriction is that all of the bytes must reside in the same page. A page address begins with XXXX 0000 and ends with XXXX 1111. If the internal address counter reaches XXXX 1111 and the clock continues, the counter will roll back to the first address of the page and overwrite any data in the page that may have been written. For the data to be actually written to the array, the CS must be brought high after the least significant bit (D0) of the nth data byte has been clocked in. If CS is brought high at any other time, the write operation will not be completed. Refer to Figure 3-2 and Figure 3-3 for more detailed illustrations on the byte write sequence and the page write sequence respectively. While the write is in progress, the STATUS register may be read to check the status of the WIP, WEL, BP1 and BP0 bits (Figure 3-6). A read attempt of a memory array location will not be possible during a write cycle. When the write cycle is completed, the write enable latch is reset.
3.2
Read Sequence
The part is selected by pulling CS low. The 8-bit READ instruction with the A8 address bit is transmitted to the 25XX040 followed by the lower 8-bit address (A7 through A0). After the correct READ instruction and address are sent, the data stored in the memory at the selected address is shifted out on the SO pin. The data stored in the memory at the next address can be read sequentially by continuing to provide clock pulses. The internal Address Pointer is automatically incremented to the next higher address after each byte of data is shifted out. When the highest address is reached (01FFh), the address counter rolls over to address 0000h allowing the read cycle to be continued indefinitely. The read operation is terminated by raising the CS pin (Figure 3-1).
TABLE 3-1:
INSTRUCTION SET
Instruction Format Description Read data from memory array beginning at selected address Write data to memory array beginning at selected address Reset the write enable latch (disable write operations) Set the write enable latch (enable write operations) Read STATUS register Write STATUS register
Instruction Name READ WRITE WRDI WREN RDSR WRSR Note: A8 is the 9th
0000 A8011 0000 A8010 0000 0100 0000 0110 0000 0101 0000 0001
address bit necessary to fully address 512 bytes.
(c) 2006 Microchip Technology Inc.
DS21204E-page 7
25AA040/25LC040/25C040
FIGURE 3-1:
CS 0 SCK Instruction SI 0 0 0 0 A8 0 1 1 A7 6 Lower Address Byte 5 4 3 2 1 A0 Don't Care Data Out 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
READ SEQUENCE
High-impedance SO
FIGURE 3-2:
BYTE WRITE SEQUENCE
CS TWC 0 SCK Instruction SI 0 0 0 0 A8 0 1 0 A7 6 Lower Address Byte 5 4 3 2 1 A0 7 6 5 Data Byte 4 3 2 1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
High-impedance SO
FIGURE 3-3:
CS 0 SCK 1 2
PAGE WRITE SEQUENCE
3
4
5
6
7
8
9 10 11 13 14 15 16 17 18 19 20 21 22 23 24
Instruction SI 0 0 0 0 A8 0 1 0 A7 6
Lower Address Byte 5 4 3 2 1 0 7 6 5
Data Byte 1 4 3 2 1 0
CS 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 SCK Data Byte 2 SI 7 6 5 4 3 2 1 0 7 6 Data Byte 3 5 4 3 2 1 0 7 Data Byte n (16 max) 6 5 4 3 2 1 0
DS21204E-page 8
(c) 2006 Microchip Technology Inc.
25AA040/25LC040/25C040
3.4 Write Enable (WREN) and Write Disable (WRDI)
The following is a list of conditions under which the write enable latch will be reset: * * * * * Power-up WRDI instruction successfully executed WRSR instruction successfully executed WRITE instruction successfully executed WP line is low
The 25XX040 contains a write enable latch. See Table 3-3 for the Write-Protect Functionality Matrix. This latch must be set before any write operation will be completed internally. The WREN instruction will set the latch, and the WRDI will reset the latch.
FIGURE 3-4:
WRITE ENABLE SEQUENCE
CS 0 SCK 1 2 3 4 5 6 7
SI
0
0
0
0
0
1
1
0
High-impedance SO
FIGURE 3-5:
WRITE DISABLE SEQUENCE
CS 0 SCK 1 2 3 4 5 6 7
SI
0
0
0
0
0
1
1 0
0
High-impedance SO
(c) 2006 Microchip Technology Inc.
DS21204E-page 9
25AA040/25LC040/25C040
3.5 Read Status Register (RDSR) 3.6 Write Status Register (WRSR)
The RDSR instruction provides access to the STATUS register. The STATUS register may be read at any time, even during a write cycle. The STATUS register is formatted as follows: 7 X 6 X 5 X 4 X 3 BP1 2 BP0 1 WEL 0 WIP The WRSR instruction allows the user to select one of four levels of protection for the array by writing to the appropriate bits in the STATUS register. The array is divided up into four segments. The user has the ability to write-protect none, one, two, or all four of the segments of the array. The partitioning is controlled as illustrated in Table 3-2. See Figure 3-7 for WRSR timing sequence.
The Write-In-Process (WIP) bit indicates whether the 25XX040 is busy with a write operation. When set to a `1', a write is in progress, when set to a `0', no write is in progress. This bit is read-only. The Write Enable Latch (WEL) bit indicates the status of the write enable latch. When set to a `1', the latch allows writes to the array, when set to a `0', the latch prohibits writes to the array. The state of this bit can always be updated via the WREN or WRDI commands regardless of the state of write protection on the STATUS register. This bit is read-only. The Block Protection (BP0 and BP1) bits indicate which blocks are currently write-protected. These bits are set by the user issuing the WRSR instruction. These bits are nonvolatile. See Figure 3-6 for RDSR timing sequence.
TABLE 3-2:
BP1
ARRAY PROTECTION
BP0 Array Addresses Write-Protected none upper 1/4 (0180h-01FFh) upper 1/2 (0100h-01FFh) all (0000h-01FFh)
0 0 1 1
0 1 0 1
FIGURE 3-6:
READ STATUS REGISTER SEQUENCE
CS 0 SCK Instruction SI 0 0 0 0 0 1 0 1 Data from STATUS register 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
High-impedance SO
FIGURE 3-7:
WRITE STATUS REGISTER SEQUENCE
CS 0 SCK Instruction SI 0 0 0 0 0 0 0 1 7 6 Data to STATUS register 5 4 3 2 1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
High-impedance SO
DS21204E-page 10
(c) 2006 Microchip Technology Inc.
25AA040/25LC040/25C040
3.7 Data Protection 3.8 Power-On State
The following protection has been implemented to prevent inadvertent writes to the array: * The write enable latch is reset on power-up * A write enable instruction must be issued to set the write enable latch * After a byte write, page write or STATUS register write, the write enable latch is reset * CS must be set high after the proper number of clock cycles to start an internal write cycle * Access to the array during an internal write cycle is ignored and programming is continued * The write enable latch is reset when the WP pin is low The 25XX040 powers on in the following state: * The device is in low-power Standby mode (CS = 1) * The write enable latch is reset * SO is in high-impedance state * A low level on CS is required to enter active state
TABLE 3-3:
WP Low High High
WRITE-PROTECT FUNCTIONALITY MATRIX
WEL Protected Blocks Protected Protected Protected Unprotected Blocks Protected Protected Writable STATUS Register Protected Protected Writable
X 0 1
(c) 2006 Microchip Technology Inc.
DS21204E-page 11
25AA040/25LC040/25C040
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP (300 mil)
XXXXXXXX XXXXXNNN YYWW
Example:
25AA040 I/P e3 1L7 0601
8-Lead SOIC (150 mil)
XXXXXXXX XXXXYYWW NNN
Example:
25AA040I/ SN e3 0601 1L7
8-Lead TSSOP
XXXX YYWW NNN
Example:
5A4X 0601 1L7
Legend: XX...X Y YY WW NNN
e3
*
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
Note:
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
DS21204E-page 12
(c) 2006 Microchip Technology Inc.
25AA040/25LC040/25C040
8-Lead Plastic Dual In-line (P) - 300 mil (PDIP)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
E1
D 2 n 1 E
A
A2
c
L A1
eB
B1 p B
MAX Number of Pins Pitch Top to Seating Plane A .140 .170 4.32 Molded Package Thickness A2 .115 .145 3.68 Base to Seating Plane A1 .015 Shoulder to Shoulder Width E .300 .313 .325 8.26 Molded Package Width E1 .240 .250 .260 6.60 Overall Length D .360 .373 .385 9.78 Tip to Seating Plane L .125 .130 .135 3.43 c Lead Thickness .008 .012 .015 0.38 Upper Lead Width B1 .045 .058 .070 1.78 Lower Lead Width B .014 .018 .022 0.56 Overall Row Spacing eB .310 .370 .430 10.92 Mold Draft Angle Top 5 10 15 15 Mold Draft Angle Bottom 5 10 15 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018
Units Dimension Limits n p
MIN
INCHES* NOM 8 .100 .155 .130
MAX
MIN
MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10
(c) 2006 Microchip Technology Inc.
DS21204E-page 13
25AA040/25LC040/25C040
8-Lead Plastic Small Outline (SN) - Narrow, 150 mil (SOIC)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
E E1
p
D 2 B n 1
h 45
c A A2
L A1
MAX Number of Pins Pitch Overall Height A .053 .069 1.75 Molded Package Thickness A2 .052 .061 1.55 Standoff A1 .004 .010 0.25 Overall Width E .228 .244 6.20 Molded Package Width E1 .146 .157 3.99 Overall Length D .189 .197 5.00 Chamfer Distance h .010 .020 0.51 Foot Length L .019 .030 0.76 Foot Angle 0 8 8 c Lead Thickness .008 .010 0.25 Lead Width B .013 .020 0.51 Mold Draft Angle Top 0 15 15 Mold Draft Angle Bottom 0 15 15 * Controlling Parameter Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057
Units Dimension Limits n p
MIN
INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12
MAX
MIN
MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12
DS21204E-page 14
(c) 2006 Microchip Technology Inc.
25AA040/25LC040/25C040
8-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm (TSSOP)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
E E1
e D 2 1 n b c L A1 A2
A
Units Dimension Limits Number of Pins n Pitch e Overall Height A Molded Package Thickness A2 Standoff A1 Overall Width E Molded Package Width E1 Molded Package Length D Foot Length L Foot Angle Lead Thickness c Lead Width b Mold Draft Angle Top Mold Draft Angle Bottom
MIN
- .031 .002 .169 .114 .018 0 .004 .007
INCHES NOM 8 .026 BSC - .039 - .252 BSC .173 .118 .024 - - - 12 REF 12 REF
MAX
MIN
.047 .041 .006 .177 .122 .030 8 .008 .012
MILLIMETERS* NOM MAX 8 0.65 BSC - - 1.20 0.80 1.00 1.05 0.05 - 0.15 6.40 BSC 4.30 4.40 4.50 2.90 3.00 3.10 0.45 0.60 0.75 0 - 8 0.09 - 0.20 0.19 - 0.30 12 REF 12 REF
*Controlling Parameter Notes: 1. Dimension D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M Drawing No. C04-086 Revised 7-25-06
(c) 2006 Microchip Technology Inc.
DS21204E-page 15
25AA040/25LC040/25C040
APPENDIX A:
Revision D Corrections to Section 1.0, Electrical Characteristics. Revision E (8/2006) Added note to page 1 header (Not recommended for new designs). Added note to package drawings. Updated document format
REVISION HISTORY
DS21204E-page 16
(c) 2006 Microchip Technology Inc.
25AA040/25LC040/25C040
THE MICROCHIP WEB SITE
Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: * Product Support - Data sheets and errata, application notes and sample programs, design resources, user's guides and hardware support documents, latest software releases and archived software * General Technical Support - Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing * Business of Microchip - Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels: * * * * * Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Development Systems Information Line
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com
CUSTOMER CHANGE NOTIFICATION SERVICE
Microchip's customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions.
(c) 2006 Microchip Technology Inc.
DS21204E-page 17
25AA040/25LC040/25C040
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: RE: Technical Publications Manager Reader Response Total Pages Sent ________
From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y N Literature Number: DS21204E FAX: (______) _________ - _________
Device: 25AA040/25LC040/25C040 Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21204E-page 18
(c) 2006 Microchip Technology Inc.
25AA040/25LC040/25C040
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range /XX Package XXX Pattern Examples: a) b) c) Device: 25AA040: 4096-bit 1.8V SPI Serial EEPROM 25AA040T: 4096-bit 1.8V SPI Serial EEPROM (Tape and Reel) 25XX040X: 4096-bit 1.8V SPI Serial EEPROM in alternate pinout (ST only) 25AA040XT:4096-bit 1.8V SPI Serial EEPROM in alternate pinout Tape and Reel (ST only) 25LC040: 4096-bit 2.5V SPI Serial EEPROM 25LC040T: 4096-bit 2.5V SPI Serial EEPROM (Tape and Reel) 25LC040X: 4096-bit 2.5V SPI Serial EEPROM in alternate pinout (ST only) 25LC040XT:4096-bit 2.5V SPI Serial EEPROM in alternate pinout Tape and Reel (ST only) 25C040: 4096-bit 5.0V SPI Serial EEPROM 25C040T: 4096-bit 5.0V SPI Serial EEPROM (Tape and Reel) 25C040X: 4096-bit 5.0V SPI Serial EEPROM in alternate pinout (ST only) 25C040XT: 4096-bit 5.0V SPI Serial EEPROM in alternate pinout Tape and Reel (ST only) I E P SN ST = = = = = -40 C to+85 C -40 C to +125 C Plastic DIP (300 mil body), 8-lead Plastic SOIC (150 mil body), 8-lead Plastic TSSOP (4.4 mm body), 8-lead d) e) 25AA040-I/P: Industrial Temp., PDIP package 25AA040-I/SN: Industrial Temp., SOIC package 25AA040T-I/SN: Tape and Reel, Industrial Temp., SOIC package 25AA040X-I/ST: Alternate Pinout, Industrial Temp., TSSOP package 25AA040XT-I/ST: Alternate Pinout, Tape and Reel, Industrial Temp., TSSOP package 25LC040-I/P: Industrial Temp., PDIP package 25LC040-I/SN: Industrial Temp., SOIC package 25LC040T-I/SN: Tape and Reel, Industrial Temp., SOIC package 25LC040X-I/ST: Alternate Pinout, Industrial Temp., TSSOP package 25LC040XT-I/ST: Alternate Pinout, Tape and Reel, Industrial Temp., TSSOP package 25C040-I/P: Industrial Temp., PDIP package 25C040-I/SN: Industrial Temp., SOIC package 25C040T-I/SN: Tape and Reel, Industrial Temp., SOIC package 25C040X-I/ST: Alternate Pinout, Industrial Temp., TSSOP package 25C040XT-I/ST: Alternate Pinout, Tape and Reel, Industrial Temp., TSSOP package 25C040-E/P: Extended Temp., PDIP package 25C040-E/SN: Extended Temp., SOIC package 25C040T-E/SN: Tape and Reel, Extended Temp., SOIC package 25C040X-E/ST: Alternate Pinout, Extended Temp., TSSOP package 25C040XT-E/ST: Alternate Pinout, Tape and Reel, Extended Temp., TSSOP package
f) g) h) i) j)
k) l) m) n) o)
Temperature Range: Package:
p) q) r) s) t)
(c) 2006 Microchip Technology Inc.
DS21204E-page 19
25AA040/25LC040/25C040
NOTES:
DS21204E-page 20
(c) 2006 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company's quality system processes and procedures are for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2006 Microchip Technology Inc.
DS21204E-page 21
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Alpharetta, GA Tel: 770-640-0034 Fax: 770-640-0307 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Habour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Fuzhou Tel: 86-591-8750-3506 Fax: 86-591-8750-3521 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Shunde Tel: 86-757-2839-5507 Fax: 86-757-2839-5571 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7250 Fax: 86-29-8833-7256
ASIA/PACIFIC
India - Bangalore Tel: 91-80-4182-8400 Fax: 91-80-4182-8422 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Gumi Tel: 82-54-473-4301 Fax: 82-54-473-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Penang Tel: 60-4-646-8870 Fax: 60-4-646-5086 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350
EUROPE
Austria - Wels Tel: 43-7242-2244-3910 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820
08/29/06
DS21204E-page 22
(c) 2006 Microchip Technology Inc.


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