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TSC2101
www.ti.com
SLAS392- JUNE 2003
AUDIO CODEC WITH INTEGRATED HEADPHONE, SPEAKER AMPLIFIER AND TOUCH SCREEN CONTROLLER
FEATURES D D D D D D D D D D D D D
Stereo Audio Playback Up to 48 ksps Mono Audio Record up to 48 ksps Integrated PLL for Audio Clock Generation Programmable Gain Amplifiers Hardware Automatic Gain Control Programmable Digital Audio Effects Processing Stereo Headset Interface Cellular Headset Interface 8- Speaker Driver 32- Receiver Driver Interface with Microphone Auto-Detection of Headset and Button Press Supports Both Cap and Cap-Less Interface for Headset
APPLICATIONS D Personal Digital Assistants D Smart Cellular Phones D MP3 Players DESCRIPTION
The TSC2101 is a low-power highly integrated high performance codec and touch screen controller, which supports stereo audio DAC, monaural voice ADC and SAR ADC. The TSC2101 features a high-performance audio codec with 16, 20, 24, or 32-bit stereo playback, mono record functionality at up to 48 ksps. The device integrates several analog features such as support for headset interface, cellular headset interface, microphone interface, and speaker and receiver drivers. The device supports auto detection of headset and button press without any glue logic. The TCS2101 has fully programmable audio. The digital audio data format is programmable to work with popular audio standard protocols (I2S, DSP, left/right justified) in master or slave mode, and also includes an on-chip PLL for flexible clock generation capability. The TSC2102 contains a 12-bit 4-wire resistive touch screen converter complete with drivers, and interfaces to the host controller through a standard SPI serial interface. The on-chip processor provides extensive features specifically designed to reduce host processor and bus overhead, with capabilities that include fully automated operating modes, programmable conversion resolution up to 12 bits, programmable sampling rates up to 125 kHz, programmable conversion averaging, and programmable on-chip timing generation. The TSC2102 offers battery measurement inputs capable of reading battery voltages up to 6 V, while operating at only 3 V. It also has an on-chip temperature sensor capable of reading 0.3C resolution. The TSC2102 is available in a 48-lead QFN.
US Patent No. 624639
D Programmable Audio Routing D 4-Wire Touch Screen Interface D Integrated Touch Screen Processor With
Fully Automated Modes of Operation
D Programmable Converter Resolution, Speed,
and Averaging
D D D D D D D
Programmable Autonomous Timing Control Direct Battery Measurement Built-In Buffer for Touch Screen Data SPI Serial Interface Low Power Full Power-Down Control 48-Pin QFN Package
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SPI is a trademark of Motorola.
PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.
Copyright 2003, Texas Instruments Incorporated
PRODUCT PREVIEW
TSC2101
www.ti.com SLAS392- JUNE 2003
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION
PRODUCT TSC2101IRGZ PACKAGE QFN-48 QFN 48 PACKAGE DESIGNATOR RGZ OPERATING TEMPERATURE RANGE -40C t +85C 40C to 85C ORDERING NUMBER TSC2101IRGZ TSC2101IRGZR TRANSPORT MEDIA Rails, 52 Tape and Reel, 2000
PIN ASSIGNMENTS
(TOP VIEW) QFN
PRODUCT PREVIEW
48 47 46 45 44 43 42 41 40 39 38 37
IOVDD PWR_DN RESET GPIO2 GPIO1 AVDD2 AVSS2 AVDD1 X+ Y+ X- Y-
DVSS DVDD BCLK WCLK SDIN SDOUT MCLK SCLK MISO MOSI SS PINTDAV
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
36 35 34 33 32 31 30 29 28 27 26 25
DRVSS2 OUT8P BVDD OUT8N DRVSS1 VGND SPKFC DRVDD SPK2 SPK1 OUT32N MIC_DETECT_IN
2
AVSS1 VREF VBAT AUX2 AUX1 BUZZ_IN CP_OUT CP_IN MICIN_HND MICBIAS_HND MICIN_HED MICBIAS_HED
TSC2101
www.ti.com SLAS392- JUNE 2003
Terminal Functions
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 NAME IOVDD PWR_DN RESET GPIO2 GPIO1 AVDD2 AVSS2 AVDD1 X+ Y+ X- Y- AVSS1 VREF VBAT AUX2 AUX1 BUZZ_IN CP_OUT CP_IN MICIN_HND MICBIAS_HND MICIN_HED MICBIAS_HED DESCRIPTION IO Supply Hardware power down Hardware reset General purpose IO General purpose IO Touch screen drivers, PLL analog power supply Analog ground Audio ADC, DAC, reference, SAR, ADC analog power supply X+ Position input and driver Y+ Position input and driver X- Position input and driver Y- Position input and driver Analog ground Reference voltage Battery monitor input Secondary auxiliary input First auxiliary input Buzzer input Output to cell phone module Input from cell phone module Handset microphone input Handset microphone bias voltage Headset microphone input Headset microphone bias voltage PIN 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 NAME OUT32N SPK1 SPK2 DRVDD SPKFC VGND DRVSS1 OUT8N BVDD OUT8P DRVSS2 PINTDAV SS MOSI MISO SCLK MCLK SDOUT SDIN WCLK BCLK DVDD DVSS DESCRIPTION Receiver driver output Headset driver output/receiver driver output Headset driver output Headphone driver power supply Driver feedback/ speaker detect input Virtual ground for audio output Driver ground Loudspeaker driver output Battery power supply Loudspeaker driver output Driver ground Pin interrupt/data available output SPI Serial data input SPI Serial data output SPI Serial clock input Master clock Audio data output Audio data input Audio word clock Audio bit clock Digital core supply Digital core and IO ground SPI Slave select input MIC_DETECT_IN Microphone detect input
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1) UNITS AVDD1/2 to AVSS1/2 DRVDD to DRVSS1/2 BVDD to DRVSS1/2 IOVDD to DVSS Digital input voltage to GND Operating temperature range Storage temperature range Junction temperature (TJ Max) Power dissipation QFN package JA Thermal impedance Infrared (15 sec) -0.3 V to 3.9 V -0.3 V to 3.9 V -0.3 V to 4.5 V -0.3 V to 3.9 V -0.3 V to IOVDD + 0.3 V -40C to 85C -65C to 105C 105C (TJ Max - TA)/JA 27C/W
Lead temperature 240C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
3
PRODUCT PREVIEW
TSC2101
www.ti.com SLAS392- JUNE 2003
ELECTRICAL CHARACTERISTICS
At +25C, AVDD1, AVDD2, DRVDD, IOVDD = 3.3 V, BVDD = 3.9 V, DVDD = 1.8 V, Vref = 2.5 V, Fs (Audio) = 48 kHz, unless otherwise noted PARAMETER TOUCH SCREEN AUXILIARY ANALOG INPUT Input voltage range Input capacitance Input leakage current BATTERY MONITOR INPUTS Input voltage range Input leakage current Accuracy TOUCH SCREEN A/D CONVERTER Resolution No missing codes Integral nonlinearity Programmable: 8-, 10-,12-bits 12-Bit resolution -5 -6 -6 50 VREF VREF output programmed = 2.5 V Voltage range Voltage range Reference drift Current drain AUDIO CODEC ADC CHANNEL FILTER CHARACTERISTICS Filter gain from 0 to 0.39 Fs Filter gain at 0.4125 Fs Filter gain at 0.45 Fs Filter gain at 0.5 Fs Filter gain from 0.55 Fs to 64 Fs Group delay 0.1 -0.6 -3.25 -17.5 -75 17/Fs dB dB dB dB dB sec VREF output programmed = 1.25 V External reference Internal VREF = 1.25 V Extra current drawn when the internal reference is turned on. 1.1 200 500 2.5 1.25 2.5 V V ppm/C A 8 11 5 6 6 12 Bits Bits LSB LSB LSB
Vrms
TEST CONDITIONS
MIN
TYP
MAX
UNITS
0 AUX1/2 i input selected as input by t l td i tb touch-screen 25 1 0.5 Battery conversion not selected Variation across temperature after system calibration at room temperature 1 25
+VREF
V pF A
6.0
V A mV
PRODUCT PREVIEW
Offset error Gain error Noise VOLTAGE REFERENCE
4
TSC2101
www.ti.com SLAS392- JUNE 2003
ELECTRICAL CHARACTERISTICS (continued)
At +25C, AVDD1, AVDD2, DRVDD, IOVDD = 3.3 V, BVDD = 3.9 V, DVDD = 1.8 V, Int. Vref = 2.5 V, Fs (Audio) = 48 kHz, unless otherwise noted (continued) PARAMETER MICROPHONE INPUT TO ADC Full-scale input voltage (0 dB) Input common mode SNR THD PSRR Mute attenuation Input resistance Input capacitance HEADSET MICROPHONE BIAS D7D8=00 control register 1DH/Page 2 Voltage range PSRR D7D8=01 control register 1DH/Page 2 D7D8=1X control register 1DH/Page 2 217 Hz, 100 mV on AVDD1/2 217 Hz, 100 mV on BVDD 1020 Hz, 100 mV on AVDD1/2 1020 Hz, 100 mV on BVDD Sourcing current HANDSET MICROPHONE BIAS D6=0 control register 1DH/Page 2 Voltage range PSRR Sourcing current DAC INTERPOLATION FILTER Pass band Pass band ripple Transition band Stop band Stop band attenuation Filter group delay De-emphasis error (1) ADC PSRR measurement is calculated as: 0.45Fs 0.5501Fs 65 21/Fs 0.1 20 0.06 0.5501Fs 7.455Fs 0.45Fs Hz dB Hz Hz dB Sec dB D6=1 control register 1DH/Page 2 217 Hz, 100 mV on AVDD1/2 1020 Hz, 100 mV on AVDD1/2 3 2.5 55 55 1 mA V dB 3.3 2.5 2 55 70 55 70 1 mA dB V Measured as idle channel noise, 0 dB gain, A-weighted 0.63 Vrms input, 0-dB gain 217 Hz, 100 mV on AVDD1/2(1) 1020 Hz, 100 mV on AVDD1/2(1) Output code with 0.63 Vrms sine wave input at 1kHz Only ADC on ADC and Sidetone on 15 8 10 TEST CONDITIONS MICIN_HED 1020 Hz sine wave input, Fs = 48 ksps 0.707 1.5 88 80 55 55 0000h 50 16 k k pF Vrms V dBA dB dB dB MIN TYP MAX UNITS
PSRR + 20 log 10
VSIG sup V ADCOUT
where VSIGsup is the ac signal applied on AVDD, which is 100 mVPP at 1 kHz, and Amplitude of Digital Output Max Possible Digital Amplitude 5
V
ADCOUT
+
PRODUCT PREVIEW
TSC2101
www.ti.com SLAS392- JUNE 2003
ELECTRICAL CHARACTERISTICS (continued)
At +25C, AVDD1, AVDD2, DRVDD, IOVDD = 3.3 V, BVDD = 3.9 V, DVDD = 1.8 V, Vref = 2.5 V, Fs (Audio) = 48 kHz, unless otherwise noted (continued) PARAMETER DAC HEADPHONE OUTPUT Full-scale output voltage (0dB) Output common mode SNR THD PSRR Interchannel isolation Mute attenuation Maximum output power Digital volume control Digital volume control step size Channel separation Between SPK1 and SPK2 Load = 8 (differential), 50 pF 1.838 1.75 Measured as idle channel noise, A-weighted -1 dBFS Input, 0-dB gain 217 Hz, 100 mV on AVDD1/2 217 Hz, 100 mV on BVDD 1020 Hz, 100 mV on AVDD1/2 1020 Hz, 100 mV on BVDD Interchannel isolation Mute attenuation Maximum output power CELLPHONE MIC INPUT TO CPOUT Full-scale input voltage (0 dB) Input common mode Full-scale output voltage (0 dB) Output common mode SNR THD PSRR Interchannel isolation Mute attenuation (1) DAC PSRR measurement is calculated as: PSRR + 20 log 10 VSIG sup V SPK1 2 Measured as idle channel noise, A-weighted 0 dBFS Input, 0-dB gain 217 Hz, 100 mV on AVDD1/2 1020 Hz, 100 mV on AVDD1/2 CP_IN to CP_OUT CP_OUT muted 1020-Hz Sine wave input on MICIN_HND, load on CP_OUT = 10 k, 50 pF 0.707 1.5 0.707 1.5 90 -72 45 45 75 90 dB dB Vrms V Vrms V dBA dB dB Coupling from ADC to DAC 95 -65 70 70 70 70 90 90 335 dB dB mW Vrms V dBA dB dB Per channel -63.5 0.5 -75 Measured as idle channel noise, A-weighted -1 dBFS Input, 0-dB gain 217 Hz, 100 mV on AVDD1/2(1) 1020 Hz, 100 mV on AVDD1/2(1) Coupling from ADC to DAC TEST CONDITIONS Load = 16 (single-ended), 50 pF 0.848 1.5 90 -65 55 55 80 90 35 0 Vrms V dBA dB dB dB dB dB mW dB dB dB MIN TYP MAX UNITS
PRODUCT PREVIEW
DAC SPEAKER OUTPUT Full-scale output voltage (0 dB) Output common mode SNR THD PSRR
6
TSC2101
www.ti.com SLAS392- JUNE 2003
ELECTRICAL CHARACTERISTICS (continued)
At +25C, AVDD1, AVDD2, DRVDD, IOVDD = 3.3 V, BVDD = 3.9 V, DVDD = 1.8 V, Vref = 2.5 V, Fs (Audio) = 48 kHz, unless otherwise noted (continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS CP_IN TO 32 RECEIVER (SPK1-OUT32N) 1020-Hz Sine wave input on CP_IN, load on SPK1 - OUT32N = 32 (differential), 50 pF Full-scale input voltage (0 dB) Input common mode Full-scale output voltage (0 dB) Output common mode SNR THD PSRR Interchannel isolation Mute attenuation DIGITAL INPUT / OUTPUT Logic level: VIH VIL VOH VOL Capacitive load IIH = +5 A IIL = +5 A IOH = 2 TTL loads IOL = 2 TTL loads 0.7xIOVDD -0.3 0.8xIOVDD 0.1xIOVDD 10 0.3xIOVDD V V V V pF Logic family 0.707 1.5 0.697 1.5 95 -80 45 45 76 90 CMOS dB dB Vrms V Vrms V dBA dB dB
7
PRODUCT PREVIEW
TSC2101
www.ti.com SLAS392- JUNE 2003
ELECTRICAL CHARACTERISTICS (continued)
At +25C, AVDD1, AVDD2, DRVDD, IOVDD = 3.3 V, BVDD = 3.9 V, DVDD = 1.8 V, Vref = 2.5 V, Fs (Audio) = 48 kHz, unless otherwise noted (continued) PARAMETER POWER SUPPLY REQUIREMENTS Power supply voltage AVDD1, AVDD2 DRVDD BVDD IOVDD DVDD IAVDD1, host controlled AUX1 conversion at 10 ksps with external reference Touch-screen Touch screen ADC quiescent current IDVDD, host controlled AUX1 conversion at 10 ksps IAVDD1 with loudspeaker output (no signal), PLL off Max MCLK = 100 MHz Max MCLK = 50 MHz 3 3 3.5 2 1.1 1.65 1.8 55 A A 100 2.4 7.8 mA 2.2 3.1 2.5 4.4 1.5 5.4 1.5 1.1 0.9 10 50 40 A mA mA mA mA mA 3.3 3.3 3.6 3.6 4.2 3.6 3.6 1.95 V
V V
TEST CONDITIONS
MIN
TYP
MAX
UNITS
V V V
PRODUCT PREVIEW
IBVDD with loudspeaker output (no signal), PLL off Analog supply current - audio play back only IAVDD1 with headphone output (no signal), VGND off, PLL off IDRVDD with headphone output (no signal), VGND off, PLL off Digital supply current - audio play back only IDVDD, PLL off IAVDD1, headset mic, PLL off Analog su ly current - mic record only supply Digital supply current - mic record only Analog supply current Digital supply current IBVDD, headset mic, PLL off IAVDD1, handset mic, PLL off IDVDD, PLL off IAVDD2, PLL on IDVDD, PLL on Hardware power down Only headset/button detection enabled Total current Only auto temperature measurement with 5.59 min delay Headset/button detection and auto temperature measurement with 5.59 min delay
65
8
TSC2101
www.ti.com SLAS392- JUNE 2003
FUNCTIONAL BLOCK DIAGRAM
AVDD1
Y+ X- X+ Y- VBAT
AVDD2
DRVDD
BVDD
DVDD
IOVDD
Touch Panel Drivers Battery Monitor Temperature Measurement
SCLK
OSC Touch Screen Processing and SPI Interface
SAR ADC
SS MOSI MISO PINTDAV
VREF MICBIAS_HED MIC_DETECT_IN MICBIAS_HND AUX1 AUX2 MICIN_HED MICIN_HND CP_IN BUZZ_IN
2.0/2.5/3.3
Internal 2.5V Reference
RESET
To Detection block 2.0/2.5
AGC 0 to 59.5dB (0.5dB steps)
MCLK PWR_DN
12 to -34.5dB (0.5dB steps)
-
ADC
SDOUT WCLK
0 to -45dB (3dB steps) 12 to -34.5dB (0.5dB steps)
Sidetone
To ADC and DAC
PLL Digital Audio Processing and Serial Interface
SDIN BCLK
OUT8P OUT8N
-1
Headset detect and Button detect
OUT32N SPK1
-1
-
DAC
Vol Ctl 0 to -63.5dB (0.5dB steps)
SPK2
0 to -63.5dB (0.5dB steps)
CP_OUT
-
DAC
Vol Ctl
SPKFC VGND
1.5V
To Detection block
GPIO Interface
GPIO1 GPIO2
AVSS1
AVSS2
DRVSS1 DRVSS2
DVSS
9
PRODUCT PREVIEW
0 to 59.5dB (0.5dB steps)
MECHANICAL DATA
MPQF123 - FEBRUARY 2002
RGZ (R-PQFP-N48)
7,15 6,85
PLASTIC QUAD FLATPACK
7,15 6,85
1,00 0,80
Pin 1 Index Area Top and Bottom 0,20 REF. Seating Plane
0,08 5,25 MAX SQ. 0,50 48X 0,30 48 1
0,05 0,00
12
0,50
13
Exposed Thermal Die Pad (See Note C) 37 36 5,50 25 24 0,30 0,18 0,10 NOTES: A. B. C. D. E. 4204101/A 01/02
48X
All linear dimensions are in millimeters. This drawing is subject to change without notice. Quad Flatpack, No-leads, (QFN) package configuration. The package thermal performance may be enhanced by bonding the thermal die pad to an external thermal plane. Falls within JEDEC M0-220.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
1
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