View SOES029_1004128.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TSL1401 128 x 1 LINEAR SENSOR ARRAY WITH HOLD
SOES029 - JUNE 1996
D D D D D D D
128 x 1 Sensor-Element Organization 400 Dots-Per-Inch (DPI) Sensor Pitch High Linearity and Uniformity for 256 Gray-Scale (8-Bit) Applications Output Referenced to Ground Low Image Lag . . . 0.5% Typ Operation to 2 MHz Single 5-V Supply
(TOP VIEW)
SI CLK AO VDD
1 2 3 4
8 7 6 5
NC GND GND NC
NC - No internal connection
description
The TSL1401 linear sensor array consists of a 128 x 1 array of photodiodes, associated charge amplifier circuitry, and a pixel data-hold function that provides simultaneous-integration start and stop times for all pixels. The pixels measure 63.5 m (H) by 55 m (W) with 63.5-m center-to-center spacing and 8.5-m spacing between pixels. Operation is simplified by internal control logic that requires only a serial-input (SI) signal and a clock.
functional block diagram
Pixel 1 Integrator Reset Pixel 2 Pixel 3 Pixel 128 Analog Bus Output Amplifier Sample/ Output 3 6,7 AO RL (External Load)
VDD 4
+ _
Switch Control Logic
Gain Trim Q3 Q128
Hold
Q1
Q2
CLK SI
2 1
128-Bit Shift Register
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright (c) 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
1
TSL1401 128 x 1 LINEAR SENSOR ARRAY WITH HOLD
SOES029 - JUNE 1996
Terminal Functions
TERMINAL NAME AO CLK GND NC SI VDD NO. 3 2 6, 7 5, 8 1 4 Analog output Clock. The clock controls charge transfer, pixel output, and reset. Ground (substrate). All voltages are referenced to the substrate. No internal connection Serial input. SI defines the start of the data-out sequence. Supply voltage. Supply voltage for both analog and digital circuits. DESCRIPTION
detailed description
The sensor consists of 128 photodiodes arranged in a linear array. Light energy impinging on a photodiode generates photocurrent, which is integrated by the active integration circuitry associated with that pixel. During the integration period, a sampling capacitor connects to the output of the integrator through an analog switch. The amount of charge accumulated at each pixel is directly proportional to the light intensity and the integration time. The output and reset of the integrators is controlled by a 128-bit shift register and reset logic. An output cycle is initiated by clocking in a logic 1 on SI. This causes all 128 sampling capacitors to be disconnected from their respective integrators and starts an integrator reset period. As the SI pulse is clocked through the shift register, the charge stored on the sampling capacitors is sequentially connected to a charge-coupled output amplifier that generates a voltage on analog output AO. The integrator reset period ends 18 clock cycles after the SI pulse is clocked in. Then the next integration period begins. AO is driven by a source follower that requires an external pulldown resistor. When the output is not in the output phase, it is in a high-impedance state. The output is nominally 0 V for no light input and 2 V for a nominal full-scale output. The TSL1401 is intended for use in a wide variety of applications, including: image scanning, mark and code reading, optical character recognition (OCR) and contact imaging, edge detection and positioning, and optical linear and rotary encoding.
2
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
TSL1401 128 x 1 LINEAR SENSOR ARRAY WITH HOLD
SOES029 - JUNE 1996
absolute maximum ratings
Supply voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Digital input current range, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 20 mA to 20 mA Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 25C to 85C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions (see Figure 1 and Figure 2)
MIN Supply voltage, VDD Input voltage, VI High-level input voltage, VIH Low-level input voltage, VIL Wavelength of light source, Clock frequency, fclock Sensor integration time, tint Setup time, serial input, tsu(SI) Hold time, serial input, th(SI) (see Note 1) Operating free-air temperature, TA NOTE 1: SI must go low before the rising edge of the next clock pulse. CLK 4.5 0 VDD x 0.7 0 400 5 0.0645 0 20 0 70 NOM 5 MAX 5.5 VDD VDD VDD x 0.3 700 2000 100 UNIT V V V V nm kHz ms ns ns C
SI
Internal Reset 18 Clock Cycles Integration Not Integrating Integrating
128 Clock Cycles AO
Hi-Z
IIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIII
Hi-Z
Figure 1. Timing Waveforms
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
3
TSL1401 128 x 1 LINEAR SENSOR ARRAY WITH HOLD
SOES029 - JUNE 1996
electrical characteristics at fclock = 200 kHz, VDD = 5 V, TA = 25C, p = 565 nm, tint = 5 ms, RL = 330 , Ee = 14 W/cm2 (unless otherwise noted) (see Note 2)
PARAMETER Analog output voltage (white, average over 128 pixels) Analog output voltage (dark, average over 128 pixels) PRNU Pixel response nonuniformity Nonlinearity of analog output voltage Output noise voltage Saturation exposure Analog output saturation voltage All pixels, See Note 6 All except pixel 1, See Note 6 See Note 7 VI = VDD VI = 0 5 Ee = 0 Ee = 0 Ee = 0 See Note 3 See Note 4 See Note 5 136 3 TEST CONDITIONS MIN 1.8 0 TYP 2 0.1 4% 0.4% 1 175 3.5 0.08 0.017 0.5% 2.5 4 1 1 mA A A pF 0.120 V 0.035 MAX 2.2 0.2 7.5% FS mVrms nJ/cm2 V UNIT V V
DSNU
Dark signal nonuniformity
IL IDD IIH IIL Ci
Image lag Supply current High-level input current Low-level input current Input capacitance
NOTES: 2. Clock duty cycle is assumed to be 50%. 3. PRNU is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of the device under test when the array is uniformly illuminated. 4. Nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percent of analog output voltage (white). 5. RMS noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period. 6. DNSU is the difference between the maximum and minimum of dark-current voltage. 7. Image lag is a residual signal left in a pixel from a previous exposure. It is defined as a percent of white-level signal remaining after a pixel is exposed to a white condition followed by a dark condition:
IL
+V
* VAO(dark) AO(white)
V
AO
-V
AO(dark)
100
4
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
TSL1401 128 x 1 LINEAR SENSOR ARRAY WITH HOLD
SOES029 - JUNE 1996
operating characteristics over recommended ranges of supply voltage and operating free-air temperature (see Figure 2)
PARAMETER tw(H) tw(L) ts Clock pulse duration (high) Clock pulse duration (low) Analog output settling time to 1% RL = 330 , CL = 50 pF TEST CONDITIONS MIN 50 50 350 TYP MAX UNIT ns ns ns
tw CLK tsu(SI) SI
1
2
128
129 2.5 V
5V 0V 5V 0V
50% th(SI) ts ts
AO
Pixel 1
Pixel 128
Figure 2. Operational Waveforms
TYPICAL CHARACTERISTICS
PHOTODIODE SPECTRAL RESPONSIVITY
1 TA = 25C 0.8 Normalized Responsivity
0.6
0.4
0.2
0 300
400
500
600
700
800
900
1000 1100
- Wavelength - nm
Figure 3
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
5
TSL1401 128 x 1 LINEAR SENSOR ARRAY WITH HOLD
SOES029 - JUNE 1996
APPLICATIONS INFORMATION
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated with an electrically nonconductive clear plastic compound.
Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 SI CLK AO VDD NC GND GND NC
0.260 (6,60) 0.240 (6,10) 0.075 (1,91) 0.040 (1,02) 15 TYP Pixel 4 is centered horizontally on Pin 1 0.430 (10,92) 0.370 (9,40) 8 5
0.325 (8,26) 0.300 (7,62) 0.017 (0,43) 1 4
C L
C (pixel) L
0.030 (0,76) D NOM
0.020 (0,51) R NOM 4 Places 7 MAX TYP 0.075 (1,91) 0.040 (1,02)
0.065 (1,65) 0.200 (5,08) 0.045 (1,14) 0.155 (3,94)
Seating Plane 0.020 (0,51) R MAX 4 Places 105 90 8 Places 0.300 (7,62) T.P. 0.012 (0,30) 0.008 (0,20) 0.050 (1,27) 0.020 (0,51) 0.060 (1,52) 0.015 (0,38) 0.065 (1,65) 0.045 (1,14) 0.150 (3,81) 0.125 (3,18) 0.022 (0,56) 0.014 (0,36) 0.100 (2,54) T.P.
True position when unit is installed NOTES: A. All linear dimensions are in inches and parenthetically in millimeters. B. This drawing is subject ot change without notice.
Figure 4. Packaging Configuration
6
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 1999, Texas Instruments Incorporated

▲Up To Search▲

Price & Availability of SOES029

	To Download SOES029 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .