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High Performance Synchronous Buck EVM Using the TPS5210
User's Guide
March 1999
Mixed-Signal Products
SLVU010
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 1999, Texas Instruments Incorporated
Related Documentation From Texas Instruments
Preface
Read This First
About This Manual
This User's Guide describes how to connect and evaluate a synchronous buck regulator using a TI TPS5210 Programmable Synchronous Buck Regulator Controller. The User's Guide describes the TPS5210EVM-119 Buck Converter Evaluation Module (SLVP119) that provides a convenient method for evaluating the performance of a synchronous buck converter using the TPS5210 Ripple Regulator Controller designed to meet or exceed the Intel VRM8.3 DC-DC converter electrical specifications. A complete designed and tested power supply is presented. Test results can be found in Designing Fast Response Synchronous Buck Regulators Using the TPS5210 Application Report, Literature Number SLVA044
How to Use This Manual
This document contains the following chapters:
-
Chapter 1 Introduction Chapter 2 Schematic Chapter 3 Physical Layouts Chapter 4 Bills of Material
Related Documentation From Texas Instruments
Designing Fast Response Synchronous Buck Regulators Using the TPS5210 Application Report, Literature Number SLVA044. TPS5210 PROGRAMMABLE SYNCHRONOUS-BUCK REGULATOR CONTROLLER Data Sheet, Literature Number SLVS171
Related Documentation From Intel
VRM 8.3 DC-DC Converter Design Guidelines Intel document Order number: 243870-001, June 1998.
Read This First
iii
Trademarks
FCC Warning
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference.
Trademarks
TI is a trademark of Texas Instruments Incorporated.
iv
Running Title--Attribute Reference
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Performance Specification Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Voltage Identification Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1-2 1-3 1-4
2
Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2.1 Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Physical Layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 3.1 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.2 Input/Output Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
3
4
Figures
2-1 3-1 3-2 SLVP119 Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 SLVP119 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 SLVP119 Input/Output Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
Tables
1-1 1-2 4-1 Performance Specification Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 Voltage Identification Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 SLVP119 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
Contents
v
vi
Chapter 1
Introduction
This user's guide describes the TPS5210EVM-119 Synchronous Buck Converter Evaluation Module (SLVP119). The SLVP119 provides a convenient method for evaluating the performance of a synchronous buck converter using the TPS5210 Ripple Regulator Controller. The TPS5210 meets or exceeds the Intel VRM8.3 dc-dc converter electrical specifications. A complete designed and tested power supply is presented. The power supply is a programmable step-down dc-dc EVM that can deliver up to 20 A of continuous output current at a programmable output voltage from 1.3 V to 3.5 V determined by a 5 bit DAC code. The PWB board layout provides test points for viewing waveforms.
Topic
1.1 1.2 1.3
Page
Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Performance Specification Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 Voltage Identification Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
Introduction
1-1
Background
1.1 Background
New high performance microprocessors may require from 40 to 80 watts of power for the CPU alone. Load current must be supplied with up to 30 A/s slew rate while keeping the output voltage within tight regulation and response time tolerances. Parasitic interconnect impedances between the power supply and the processor must be kept to a minimum. Fast responding synchronous buck dc/dc converters controlled by the Texas Instruments TPS5210 hysteretic controller are ideally suited for microprocessor power applications requiring fast response and precise regulation to rapidly changing loads. Conventional synchronous regulator control techniques include fixed frequency voltage-mode, fixed frequency current-mode, variable frequency currentmode, variable on-time, or variable off-time. CPU power supplies that are designed using these types of control methods require additional bulk storage capacitors on the output to maintain VO within the regulation limits during the high di/dt load transients because of the limited bandwidth of the controller. Some controllers add a fast loop around the slower main control loop to improve the response time, but VO must deviate outside a fixed tolerance band before the fast loop becomes active. The hysteretic control method employed by the TPS5210 offers superior performance with no requirements for additional output capacitance or difficult loop compensation design. The TPS5210 controller was optimized for tight VO regulation under static and dynamic load conditions for improved system efficiency. The TP5520 can operate in systems that derive main power from 12 V or 5 V.
1-2
Introduction
Performance Specification Summary
1.2 Performance Specification Summary
This section summarizes the performance specifications of the SLVP119 converter. Table 1-1 gives the performance specifications of the converters.
Table 1-1. Performance Specification Summary
SPECIFICATION Main power (VI) Input voltage range Output voltage range Static voltage tolerance Line regulation Load regulation Transient response Output current range Current limit Output ripple Soft-start risetime Operating frequency Efficiency, 10 A load Efficiency, 4 A load
Notes: 1) IO = 12 A. 2) VID inputs set for VREF = 2 V. 3) Input voltage can be at any point over entire range. 4) Input voltage adjusted to 12 Vdc. 5) IO can be at any point over entire range. 6) IO pulsed from 0 A to 16 A, di/dt = 30 A/s.
TEST CONDITIONS
MIN 4.5 4.5 11.4
TYP 5 12 2 2 0.05% 0.1% 55 50
MAX UNITS 13 5.5 13 3.5 2.02 0.1% 0.4% mV pk sec 20 A A mV ms kHz V V V V V
5-V input 12-V input See Note 1 See Note 2 See Notes 1 and 3 See Notes 4 and 5 See Note 6 See Note 3 See Note 3 See Notes 3 and 5 See Note 4 See Notes 1 and 4 See Notes 2 and 4 See Notes 2 and 4
1.3 1.98
0 20 35 10 125 90% 86%
Introduction
1-3
Voltage Identification Codes
1.3 Voltage Identification Codes
The output voltage is programmed by driving the 5 VID inputs. The output voltage for a given VID input is shown in Table 1-2.
Table 1-2. Voltage Identification Codes
VID Terminals (0 = GND, 1 = floating or pull-up to 5 V) VID3 VID2 VID1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 VREF VID0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 (Vdc) 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.05 No CPU 2.10 2.20 2.30 2.40 2.50 2.60 2.70 2.80 2.90 3.00 3.10 3.20 3.30 3.40 3.50
VID4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1-4
Introduction
Chapter 2
Schematic
This chapter contains the schematic diagram for the SLVP119 EVM.
Topic
2.1
Page
Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
Schematic
2-1
Schematic Diagram
2.1 Schematic Diagram
Figure 2-1 shows the SLVP119 EVM schematic diagram.
2-2
Schematic
Figure 2-1. SLVP119 Schematic Diagram
L1 JP2 P2 TP1 C36 0.1 F C3 22 F C4- C6 C7-C9 TP7 (Parallel Traces) Q1 SI4410 Note 1 Q2 SI4410 R2 10 R3 10 TP3 L1 Q5 SI4410 Q6 SI4410 R7B 2 R5 3.3 C13B 1000 pF 1 1 H CL R7C 2 R6 3.3 C13C 1000 pF C14-C17 820 F C22-C24 0.1 F C18-C21 10 F
Power GND
Vin GND 1.15 H Q8 NDS0605 C35 1F 470 F 1F R24 10 k C10-C12 0.1 F
12 V R18 1 k 1% R17 1 k 1% C33 0.1 F TP12 P1 Q3 SI4410
GND
TP8
GND
5V
C32 0.033 F
C1 C2 47 F 0.1 F R19 2 k C31 1 F R22 1 M D1 Green PWRGD TP4 R1 10 Note 1 R23 10 k Q7 2N7002 C30 0.1 F Q4 SI4410 R7A 2 C13A 1000 pF R4 3.3
28 27 26 25 24 23 22 21 20 19 18 17 16 15 Inhibit VID4 VID3 VID2 VID1 VID0
R16 100 U1 TPS5210
J2 Vo 2 R20 3.3 RETURN
C28
1 2 3 4 5 6 7 8 9 10 11 12 13 14
IOUT PWRGD DRCCP VID0 OCP VID1 VHYST VID2 VID3 VREFB VID4 VSENSE ANAGND INHIBIT OUTLO SLOWST LOSENSE BIAS LODRV HSENSE LOHIB BOOTLO DRVGND HIGHDR LOWDR BOOT DRV VIN12 V
0.01 F
TP12 TP5
TP9 R12 TP17 C26 0.1 F C27 1F
C29
1F
TP6 R8 3.92 k 1% R13 100 150 1% TP10 R14 20 k C25 1000 pF
R10 4.32 k 1%
J4 FB Loop TP11 TP14
Analog GND
2 1 TP13 C34 0.1 F R21 3.3
TP15 R9 1 k 1% R15 1 k 1%
TP16
+ Remote - Sense
R11 1 k 1%
Schematic
Schematic Diagram
Note 1: Q1, R1, R7A, R7C, C13A, and C13C not installed.
2-3
Schematic Diagram
2-4
Schematic
Chapter 3
Physical Layouts
This chapter contains the board layout and I/O connection drawings for the SLVP119 EVM.
Topic
3.1 3.2
Page
Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Input/Output Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
Physical Layouts
3-1
Board Layout
3.1 Board Layout
The power supply module consists of one PWB. The board layout includes many test points so that waveforms may be viewed during operation. Figure 3-1 shows the front view and back view of the SLVP119 EVM board.
Figure 3-1. SLVP119 Board Layout
Top Assembly
Bottom Layer (Top View)
3-2
Physical Layouts
Input/Output Connections
3.2 Input/Output Connections
Figure 3-2 shows the input/output connections to the SLVP119.
Figure 3-2. SLVP119 Input/Output Connections
Power Supply
5-V, 15-A Supply
-
AWG20 AWG12
+
AWG12
Power Supply
AWG20
12-V, 50-mA Supply
AWG20 Load
-
+
- +
Note: All wire pairs should be twisted.
Physical Layouts
3-3
3-4
Physical Layouts
Chapter 4
Bill of Materials
This chapter contains the bill of materials required for the SLVP119EVM.
Topic
4.1
Page
Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
Bill of Materials
4-1
Bill of Materials
4.1 Bill of Materials
Table 4-1 lists materials required for the SLVP119 EVM.
Table 4-1. SLVP119 Bill of Materials
REF DES C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13A C13B C13C C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 PART NUMBER ECS-H1AD476R DESCRIPTION Capacitor, Tantalum, 47 F, 10 V, 20% MFG Panasonic muRata Panasonic Sanyo Sanyo Sanyo muRata muRata muRata muRata muRata muRata muRata muRata muRata Sanyo Sanyo Sanyo Sanyo TDK TDK TDK TDK muRata muRata muRata muRata muRata
GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R ECS-H1CD226R 16SA470M 16SA470M 16SA470M GRM42-6Y5V105Z025A GRM42-6Y5V105Z025A GRM42-6Y5V105Z025A Capacitor, Tantalum, 22 F, 16 V, 20% Capacitor, Os-Con, 470 F, 16 V, 20% Capacitor, Os-Con, 470 F, 16 V, 20% Capacitor, Os-Con, 470 F, 16 V, 20% Capacitor, Ceramic, 1 F, 25 V, 80%-20%, Y5V Capacitor, Ceramic, 1 F, 25 V, 80%-20%, Y5V Capacitor, Ceramic, 1 F, 25 V, 80%-20%, Y5V
GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R GRM42-6X7R102K050A Capacitor, Ceramic, 1000 pF, 50 V, 10%, X7R GRM42-6X7R102K050A Capacitor, Ceramic, 1000 pF, 50 V, 10%, X7R GRM42-6X7R102K050A Capacitor, Ceramic, 1000 pF, 50 V, 10%, X7R 4SP820M 4SP820M 4SP820M 4SP820M GRM235Y5V106Z016A GRM235Y5V106Z016A GRM235Y5V106Z016A GRM235Y5V106Z016A Capacitor, OS-Con, 820 F, 4 V, 20% Capacitor, OS-Con, 820 F, 4 V, 20% Capacitor, OS-Con, 820 F, 4 V, 20% Capacitor, OS-Con, 820 F, 4 V, 20% Capacitor, Ceramic, 10 F, 16 V, Y5V Capacitor, Ceramic, 10 F, 16 V, Y5V Capacitor, Ceramic, 10 F, 16 V, Y5V Capacitor, Ceramic, 10 F, 16 V, Y5V
GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R GRM42-6X7R102K050A Capacitor, Ceramic, 1000 pF, 50 V, 10%, X7R GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R
C13A and C13C not installed.
4-2
Bill of Materials
Bill of Materials
Table 4-1. SLVP119 Bill of Materials (Continued)
REF DES C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 D1 J2 J3 J4 L1 PART NUMBER GRM42-6Y5V105Z025A DESCRIPTION Capacitor, Ceramic, 1 F, 25 V, 80%-20%, Y5V MFG muRata muRata muRata muRata muRata muRata muRata muRata muRata muRata Lumex Phoenix OST OST MicroMetals
GRM42-6X7R103K050A Capacitor, Ceramic, 0.01 F, 50 V, 10%, X7R GRM42-6Y5V105Z025A Capacitor, Ceramic, 1 F, 25 V, 80%-20%, Y5V
GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R GRM42-6Y5V105Z025A Capacitor, Ceramic, 1 F, 25 V, 80%-20%, Y5V
GRM42-6X7R333Z050A Capacitor, Ceramic, 0.033 F, 50 V, 10%, X7R GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R GRM42-6Y5V105Z025A Capacitor, Ceramic, 1 F, 25 V, 80%, -20%, Y5V
GRM42-6X7R104K050A Capacitor, Ceramic, 0.1 F, 50 V, 10%, X7R SML-LX2832GC-TR MKDS3/2-5.08 ED1516-ND ED1514-ND Diode. LED, Green, 2.1 V, SM Terminal Block, 2-Pin, 32A, 5.08 mm Terminal Block, 4-Pin, 6A, 3.5 mm Terminal Block, 2-Pin, 6A, 3.5 mm Inductor, Filter, 1.15 H, 11 A (8T #18 on T44-8/90 Core) Inductor, Filter, 1 H, 25 A (7T #16 on T68-8/90 Core) 929836-09-36-ND A19350-ND Si4410DY Si4410DY Si4410DY Si4410DY Si4410DY Si4410DY SN7002 NDS0605 Std Std Std Header, Straight, 2x6, 0.1 (72-Pin cut down) Header, Straight, 1x2, 0.1 center FET, N-ch, 30-V, 10-A, 13-m FET, N-ch, 30-V, 10-A, 13-m FET, N-ch, 30-V, 10-A, 13-m FET, N-ch, 30-V, 10-A, 13-m FET, N-ch, 30-V, 10-A, 13-m FET, N-ch, 30-V, 10-A, 13-m FET, N-ch, 60-V, 115 mA, 1.2- FET, N-ch, 60-V, 180 mA, 5- Resistor, Chip, Zero Ohm, 1/10 W, 5% Resistor, Chip, Zero Ohm, 1/10 W, 5% Resistor, Chip, Zero Ohm, 1/10 W, 5%
L2
MicroMetals
P1 P2 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 R1 R2 R3
3M AMP Siliconix Siliconix Siliconix Siliconix Siliconix Siliconix Diodes Inc. Fairchild
R1, Q1 not installed.
Bill of Materials
4-3
Bill of Materials
Table 4-1. SLVP119 Bill of Materials (Continued)
REF DES J1 R4 R5 R6 R7A R7B R7C R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 TP1-9, 12, 14-18 TP10,11, 19,20 TP13 PART NUMBER MKDS3/2-5.08 Std Std Std Std Std Std Std Std Std Std Std Std Std Std Std Std Std Std Std Std Std Std Std 240-345 DESCRIPTION Terminal Block, 2-Pin, 32A, 5.08 mm Resistor, Chip, 3.3 , 1/10 W, 5% Resistor, Chip, 3.3 , 1/10 W, 5% Resistor, Chip, 3.3 , 1/10 W, 5% Resistor, Chip, 2.7 , 1/8 W, 5% Resistor, Chip, 2.7 , 1/8 W, 5% Resistor, Chip, 2.7 , 1/8 W, 5% Resistor, Chip, 3.92 k, 1/10 W, 1% Resistor, Chip, 1 k, 1/10 W, 1% Resistor, Chip, 4.32 k, 1/10 W, 1% Resistor, Chip, 1 k, 1/10 W, 1% Resistor, Chip, 150 , 1/10 W, 1% Resistor, Chip, 100 , 1/10 W, 1% Resistor, Chip, 20 k, 1/10 W, 1% Resistor, Chip, 10 k, 1/10 W, 1% Resistor, Chip, 100 , 1/10 W, 5% Resistor, Chip, 1 k, 1/10 W, 1% Resistor, Chip, 1 k, 1/10 W, 1% Resistor, Chip, 2 k, 1/10 W, 5% Resistor, Chip, 3.3 , 1/10 W, 5% Resistor, Chip, 3.3 , 1/10 W, 5% Resistor, Chip, 1 M, 1/10 W, 5% Resistor, Chip, 10 k, 1/10 W, 5% Resistor, Chip, 10 k, 1/10 W, 5% Test Point, Red Farnell MFG Phoenix
240-333
Test Point, Black
Farnell
131-4244-00
Adaptor, 3.5-mm probe clip ( or 131-5031-00)
Tektronix
R7A, R7C not installed.
4-4
Bill of Materials
Bill of Materials
Table 4-1. SLVP119 Bill of Materials (Continued)
REF DES U1 Current Jumper FB Loop NA NA PART NUMBER TPS5210DW 9912 8021 929950-00-ND SLVP119 DESCRIPTION IC, PWM Ripple Controller, Adjustable Output Wire, PVC, Stranded, 12AWG, 600 V, 1055C Wire, Bare, Solid, 22AWG Shunt, Jumper, 0.1 (for P1) PCB, TPS5210 EVM Board TI Belden Belden 3M MFG
Bill of Materials
4-5

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