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UCC5672 Multimode (LVD/SE) SCSI 9 Line Terminator FEATURES * Auto Selection Multi-Mode Single Ended or Low Voltage Differential Termination * 2.7V to 5.25V Operation * Differential Failsafe Bias * Built-in SPI-3 Mode Change Filter/ Delay * Meets SCSI-1, SCSI-2, Ultra2 (SPI-2 LVD) and Ultra3/Ultra160 Standards * Supports Active Negation * 3pF Channel Capacitance DESCRIPTION The UCC5672 Multi-Mode Low Voltage Differential and Single Ended Terminator is both a single ended terminator and a low voltage differential terminator for the transition to the next generation SCSI Parallel Interface (SPI-3). The low voltage differential is a requirement for the higher speeds at a reasonable cost and is the only way to have adequate skew budgets. The automatic mode select/change feature switches the terminator between Single Ended or LVD SCSI Termination, depending on the bus mode. If the bus is in High Voltage Differential Mode, the terminator lines transition into a High Impedance state. The UCC5672 is SPI-3, SPI-2, and SCSI-2 compliant. This device is offered in a 28 pin TSSOP package to minimize the footprint. The UCC5672 is also available in a 36 pin MWP package. BLOCK DIAGRAM 2.1V DIFFB 17 0.6V FILTER/ DELAY HPD LVD SE DIFSENS REF 1.3V ENABLE SOURCE/SINK REGULATORS SE REF 2.7V 10A DISCNCT 13 LVD REF 1.25V ENABLE SE GROUND SWITCH 110 HS/GND HS/GND GND 6 22 14 MODE SE LVD HPD DISCNCT SW1 UP DOWN DOWN OPEN OTHER SWITCHES UP DOWN OPEN OPEN 124 56mV - + 56mV + - 52 SW1 110 56mV - + 56mV + - 52 16 DIFSENS TRMPWR TRMPWR 28 27 124 3 52 2 L1- L1+ 26 52 25 L9- L9+ SE GROUND SWITCH 1 Note: Indicated pinout is for 28 pin TSSOP package. REG UDG-99125 SLUS414A - FEBRUARY 2000 UCC5672 ABSOLUTE MAXIMUM RATINGS TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 5V Storage Temperature . . . . . . . . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . -55C to +150C Lead Temperature (Soldering, 10sec.) . . . . . . . . . . . . . +300C QSOP-36 (TOP VIEW) MWP Package 1 2 REG N/C N/C L1+ L1- L2+ L2- HS/GND HS/GND HS/GND L3+ L3- L4+ L4- L5+ L5- DISCNCT GND TRMPWR N/C N/C N/C L9- L9+ L8- L8+ HS/GND HS/GND HS/GND L7- L7+ L6- L6+ DIFF B DIFSENS N/C 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Databook for thermal limitations and considerations of packages. 3 4 5 6 7 RECOMMENDED OPERATING CONDITIONS TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.25V CONNECTION DIAGRAM TSSOP-28 (TOP VIEW) PWP Package 8 9 10 11 REG L1+ L1- L2+ L2- HS/GND L3+ L3- L4+ L4- L5+ L5- DISCNCT GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 TRMPWR 12 TRMPWR 13 L9- 14 L9+ 15 L8- 16 L8+ HS/GND L7- L7+ L6- L6+ DIFFB DIFSENS N/C 17 18 2 UCC5672 ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = TJ = 0C to 70C, TRMPWR = 2.7V to 5.25V. PARAMETER TRMPWR Supply Current Section TRMPWR Supply Current LVD SCSI Mode SE Mode DISCNCT Mode Regulator Section 1.25V Regulator Output Voltage 1.25V Regulator Source Current 1.25V Regulator Sink Current 2.7V Regulator Output Voltage 2.7V Regulator Source Current 2.7V Regulator Sink Current Diff Sense Driver (DIFSENS) Section 1.3V DIFSENS Output Voltage 1.3V DIFSENS Source Current 1.3V DIFSENS Sink Current Differential Termination Section Differential Impedance Common Mode Impedance Differential Bias Voltage Common Mode Bias Output Capacitance Single Ended Termination Section Impedance Single Ended Measurement to Ground (Note 1) 100 108 (Note 2) 100 110 100 1.15 1.25 105 150 110 165 125 1.35 3 116 mV V pF DIFSENS VDIFSENS = 0V VDIFSENS = 2.75V 1.2 -15 50 1.3 1.4 -5 200 V mA A LVD SCSI Mode VREG= 0V VREG= 3.3V SE Mode VREG= 0V VREG= 3.3V 1.15 -800 100 2.5 -800 100 1.25 -420 180 2.7 -420 180 1.35 -225 420 3.0 -225 420 V mA mA V mA mA 23 14 250 35 25 500 mA mA A TEST CONDITIONS MIN TYP MAX UNITS Z= (VLX - 0 . 2V ) ILX , (Note 3) -25.4 -22.4 -23 -20 -17 400 3 20 0.8 -30 0.5 1.9 -1 -10 0.7 2.4 1 60 2.0 mA mA nA pF V A V V A Termination Current Output Leakage Output Capacitance Single Ended GND SE Impedance DISCNCT Threshold DISCNCT Input Current DIFFB SE to LVD SCSI Threshold DIFFB LVD SCSI to HPD Threshold DIFFB Input Current Signal Level 0.2V, All Lines Low Signal Level 0.5V Single Ended Measurement to Ground (Note 1) I= 10mA Disconnect (DISCNCT) and Diff Buffer (DIFFB) Input Section 3 UCC5672 ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = TJ = 0C to 70C, TRMPWR = 2.7V to 5.25V. PARAMETER Time Delay/Filter Section Mode Change Delay A new mode change can start any time after a previous mode change has been detected. (Note4 ) 100 180 300 ms TEST CONDITIONS MIN TYP MAX UNITS Note 1: Guaranteed by design. Not 100% tested in production. Note 2: Z CM = 1. 2V ; Where VCM = Voltage measured with L+ tied to L- and zero current applied; I(V CM + 0. 6V ) - I(V CM - 0. 6V ) Note 3: VLX= Output voltage for each terminator minus output pin (L1- through L9-) with each pin unloaded. ILX = Output current for each terminator minus output pin (L1- through L9-) with the minus output pin forced to 0.2V. Note 4: Noise on DIFFB will not cause a false mode change. The time delay is that same for a change from any mode to any other mode. Within 300ms after power is applied the mode is defined by the voltage of DIFFB. PIN DESCRIPTIONS DIFFB: Input pin for the comparators that select SE, LVD SCSI, or HIPD modes of operation. This pin should be decoupled with a 0.1F capacitor to ground and then coupled to the DIFSENS pin through a 20k resistor. DIFSENS: Connects to the Diff Sense line of the SCSI bus. The bus mode is controlled by the voltage level on this pin. DISCNCT: Input pin used to shut down the terminator if the terminator is not connected at the end of the bus. Connect this pin to ground to activate the terminator or open pin to disable the terminator. HS/GND: Heat sink ground pins. These should be connected to large ground area PC board traces to increase the power dissipation capability. GND: Power Supply return. L1- thru L9-: Termination lines. These are the active lines in SE mode and are the negative lines for LVD SCSI mode. In HIPD mode, these lines are high impedance. L1+ thru L9+: Termination lines. These lines switch to ground in SE mode and are the positive lines for LVD SCSI mode. In HIPD mode, these lines are high impedance. REG: Regulator bypass pin, must be connected to a 4.7 F capacitor to ground. TRMPWR: 2.7V to 5.25V power input pin. Bypass near the terminators with a 4.7 F capacitor to ground. APPLICATION INFORMATION All SCSI buses require a termination network at each end to function properly. Specific termination requirements differ, depending on which types of SCSI devices are present on the bus. The UCC5672 is used in multi-mode active termination applications, where single ended (SE) and low voltage differential (LVD) SCSI devices might coexist. The UCC5672 has both SE and LVD SCSI termination networks integrated into a single monolithic component. The correct termination network is automatically determined by the SCSI bus "DIFSENS" signal. The SCSI bus DIFSENS signal line is used to identify which types of SCSI devices are present on the bus. On power-up, the UCC5672 DIFSENS drivers will try to de4 liver 1.3V to the DIFSENS line. If only LVD SCSI devices are present, the DIFSENS line will be successfully driven to 1.3V and the terminators will configure for LVD SCSI operation. If any single ended devices are present, they will present a short to ground on the DIFSENS line, signaling the UCC5672(s) to configure into the SE mode, accommodating the SE devices. Or, if any high voltage differential (HVD) SCSI devices are present, the DIFSENS line is pulled high and the terminator will enter a high impedance state, effectively disconnecting from the bus. The DIFSENS line is monitored by each terminator through a 50Hz noise filter at the DIFFB input pin. A set of comparators detect and select the appropriate termi- UCC5672 APPLICATION INFORMATION (cont.) nation for the bus as follows. If the DIFSENS signal is below 0.5V, the termination network is set for single ended. Between 0.7V and 1.9V, the termination network switches to LVD SCSI, and above 2.4V indicates HVD SCSI, causing the terminators to disconnect from the bus. These thresholds accommodate differences in ground potential that can occur with long lines. Three UCC5672 multi-mode parts are required at each end of the bus to terminate 27 (18 data, plus 9 control) lines. Each part includes a DIFSENS driver, but only one is necessary to drive the line. The DIFFB inputs on all three parts are connected together, allowing them to share the same 50Hz noise filter. This multi-mode terminator operates in full specification down to 2.7V TRMPWR voltage. This accommodates 3.3V systems, Termpower 28 UCC5672 TRMPWR L1+ L1- 27 TRMPWR L9+ L9- REG 1 4.7F DIFFB 17 25 26 16 20k 0.1F DIFF SENSE 20k 2 3 CONTROL LINES (9) 25 26 16 L9+ L9- DIFFB 17 2 3 L1+ L1- UCC5672 TRMPWR 28 Termpower TRMPWR 27 13 DISCNCT DISCNCT 13 REG 1 4.7F 0.1F UCC5672 28 TRMPWR L1+ L1- 27 4.7F TRMPWR L9+ L9- REG 1 4.7F DIFFB 17 25 26 2 3 DATA LINES (9) 25 26 L9+ L9- DIFFB 17 2 3 L1+ L1- UCC5672 TRMPWR 28 TRMPWR 27 13 DISCNCT DISCNCT 13 4.7F REG 1 4.7F UCC5672 28 TRMPWR L1+ L1- 27 TRMPWR L9+ L9- REG 1 4.7F DIFFB 17 25 26 2 3 DATA LINES (9) 25 26 L9+ L9- DIFFB 17 2 3 L1+ L1- UCC5672 TRMPWR 28 TRMPWR 27 13 DISCNCT DISCNCT 13 REG 1 4.7F Note: Indicated pinout is for 28 pin TSSOP package. Figure 1. Application diagram. 5 UCC5672 APPLICATION INFORMATION (cont.) with allowance for the 3.3V supply tolerance (+/- 10%), a unidirectional fusing device and cable drop. In 3.3V TRMPWR systems, the UCC3918 is recommended in place of the fuse and diode. The UCC3918's lower voltage drop allows additional margin over the fuse and diode, for the far end terminator. Layout is critical for Ultra2 and Ultra3/Ultra160 systems. The SPI-2 standard for capacitance loading is 10pF maximum from each positive and negative signal line to ground, and a maximum of 5pF between the positive and negative signal lines of each pair is allowed. These maximum capacitances apply to differential bus termination circuitry that is not part of a SCSI device, (e.g. a cable terminator). If the termination circuitry is included as part of a SCSI device, (e.g., a host adaptor, disk or tape drive), then the corresponding requirements are 30pF maximum from each positive and negative signal line to ground and 15pF maximum between the positive and negative signal lines of each pair. The SPI-2 standard for capacitance balance of each pair and balance between pairs is more stringent. The standard is 0.75pF maximum difference from the positive and negative signal lines of each pair to ground. An additional requirement is a maximum difference of 2pF when comparing pair to pair. These requirements apply to differential bus termination circuitry that is not part of a SCSI device. If the termination circuitry is included as part of a device, then the corresponding balance requirements are 2.25pF maximum difference within a pair, and 3pF from pair to pair. Feed-throughs, through-hole connections, and etch lengths need to be carefully balanced. Standard multi-layer power and ground plane spacing add about 1pF to each plane. Each feed-through will add about 2.5pF to 3.5pF. Enlarging the clearance holes on both power and ground planes will reduce the capacitance. Similarly, opening up the power and ground planes under the connector will reduce the capacitance for through-hole connector applications. Capacitance will also be affected by components, in close proximity, above and below the circuit board. Unitrode multi-mode terminators are designed with very tight balance, typically 0.1pF between pins in a pair and 0.3pF between pairs. At each L+ pin, a ground driver drives the pin to ground, while in single ended mode. The ground driver is specially designed to not effect the capacitive balance of the bus when the device is in LVD SCSI or disconnect mode. Multi-layer boards need to adhere to the 120 impedance standard, including the connectors and feedthroughs. This is normally done on the outer layers with 4 mil etch and 4 mil spacing between runs within a pair, and a minimum of 8 mil spacing to the adjacent pairs to reduce crosstalk. Microstrip technology is normally too low of impedance and should not be used. It is designed for 50 rather than 120 differential systems. Careful consideration must be given to the issue of heat management. A multi-mode terminator, operating in SE mode, will dissipate as much as 130mW of instantaneous power per active line with TRMPWR = 5.25V. The UCC5672 is offered in a 28 pin TSSOP. This package includes two heat sink ground pins. These heat sink/ground pins are directly connected to the die mount paddle under the die and conduct heat from the die to reduce the junction temperature. Both of the HS/GND pins need to be connected to etch area or four feed-through per pin connecting to the ground plane layer on a multi-layer board. UNITRODE CORPORATION 7 CONTINENTAL BLVD. * MERRIMACK, NH 03054 TEL. (603) 424-2410 * FAX (603) 424-3460 6 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof. Copyright (c) 2000, Texas Instruments Incorporated |
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