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W48C20
Audio Subsystem Clock Generator
Features
* * * * * * * Two independent phase-locked loops Four independent output frequencies 250 ps maximum cycle-to-cycle jitter 3 ns rise/fall time (20%-80% VDD). Options available for a wide range of applications Supports 3.3V and 5V operation Low power CMOS design available in: -- 8-pin SOIC (Small Outline Integrated Circuit)
Overview
The W48C20 is a general-purpose device that features two phase-locked loops. Through the use of metal masks, the chip can be tailored to a wide variety of applications. The W48C20 has four clock outputs, each of which is maskable to a different frequency. Because the chip offers four outputs in eight pins, it is suited to applications that require multiple frequencies and have space constraints. Table 1. Product Selection Guide Mask -01A -08 -09 Pin 4 Pin 5 Pin 6 Pin 7 27.00 25.00 Application DVD Hard Disk Drives
16.9344 24.576 33.8688 14.318 Audio/Crystal 33.8688 18.432 16.9344 40.00 22.50 20.00
Functional Block Diagram
VCC X1 XTAL OSC OUTPUT OUTPUT PLL 1 OUTPUT Crystal load capacitors as needed
XTAL
X2
PLL 2
OUTPUT
GND
Pin Configuration
X1 VCC GND OUTPUT 1 2 3 4 8 7 6 5 X2 OUTPUT OUTPUT OUTPUT
Cypress Semiconductor Corporation
*
3901 North First Street
*
San Jose
*
CA 95134 * 408-943-2600 December 20, 1999, rev. **
W48C20
Pin Definitions
Pin Name X1 VDD GND OUTPUT OUTPUT OUTPUT OUTPUT X2 Pin No. 1 2 3 4 5 6 7 8 Pin Type I P P O O O O I Pin Description Crystal connection or external clock frequency input (14.318 MHz). Power supply connection. Ground connection. 16.9344-MHZ clock output for stereo codec. 24.576-MHz clock output for stereo codec. 33.868-MHz clock output for OPL4. 14.318-MHz clock buffered output for OPL3 or PCMCIA controller. Crystal connection. Leave this pin unconnected when using an external clock. The crystal load capacitance can be increased by adding a capacitor to each of the X1 and X2 pins and ground. This enables the use of a crystal specifying a load greater than 12 pF without changing the output frequency. Duty cycle is also maintained when using an external clock source (connected to X1, X2 left unconnected) as long as the external clock has good duty cycle. The circuit exhibits about 50% less clock jitter from the 14.318-MHz output when compared to similar devices.
External Components/Crystal Selection
The W48C20 incorporates a crystal oscillator circuit designed to provide 50% duty cycle over a range of operating conditions, including the addition of external crystal load capacitors to pins X1 and X2. A parallel resonant 14.318-MHz, 12-pF load crystal is recommended. A series-resonant crystal or a parallel resonant crystal specifying a different load can be used, but either will result in frequencies which are slightly different from the ideal (up to 0.06%).
14.318 MHz IN Pin 1 8 33 (optional) V 2.2 F (optional) 0.1 F 36 G 45 33 (optional) 33.9 MHz OUT
27
14.3 MHz OUT
33 (optional)
33 (optional)
16.9 MHz OUT
24.6 MHz OUT
Figure 1. Suggested Layout
2
W48C20
Absolute Maximum Ratings
Stresses greater than those listed in this table may cause permanent damage to the device. These represent a stress rating only. Operation of the device at these or any other conditions Parameter VCC, VIN TSTG TA TB TSOLD Description Voltage on any Pin with Respect to GND Storage Temperature Operating Temperature Ambient Temperature under Bias Soldering Temperature, Max. 20 seconds above those specified in the operating sections of this specification is not implied. Maximum conditions for extended periods may affect reliability Rating -0.5 to +7.0 -65 to +150 0 to +70 -55 to +125 260 Unit V C C C C
Electrical Characteristics at 5.0V DC Electrical Characteristics: TA = 0C to +70C; VCC = 5V 10%
Parameter VDD VIH VIL VOH VOL IDD Description Operating Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Operating Supply Current Input Capacitance
[1]
Conditions
Min 4.5 3.5
Typ 2.5 2.5
Max 5.5 1.5 0.4
Unit V V V V V mA pF
IOH = 25 mA IOL = 25 mA No Load
2.4 18 7 0.2
Actual Mean Frequency versus Target
%
AC Characteristics: TA = 0C to +70C; VCC = 5V 10%
Parameter Input Clock Frequency Input Clock Duty Cycle, 14.318 MHz Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle, 24.576 MHz Output Clock Duty Cycle, 16.9344 MHz Output Clock Duty Cycle, 33.868 MHz Output Clock Duty Cycle, 14.318 MHz[2] Absolute Clock Period Jitter, except 14.3 Time above 2.5V 0.8V to 2.0V 2.0V to 0.8V Time above 1.5V Time above 1.5V Time above 1.5V Time above 1.5V Pins 4, 5, 6 only 40 45 45 45 -400 45 50 50 50 200 60 20 Test Condition/Comments Min Typ 14.31818 80 1.5 1.5 60 55 55 55 400 Max Unit MHz % ns ns % % % % ps ps
One Sigma Clock Period Jitter, except 14.3 Pins 4, 5, 6 only
Notes: 1. If crystal is used as input Crystal Load Capacitance (CL) = 12 pF. 2. If a clock is used as input, the duty cycle of the 14.318-MHz output will be the same as the input clock.
Ordering Information
Ordering Code W48C20 Freq. Mask Code 01A 08 09 Package Name G Package Type 8-pin SOIC (150-mil)
Document #: 38-00879
3
W48C20
Package Diagram
8-Pin Small Outline Integrated Circuit, Narrow (SOIC, 0.150 inch)
(c) Cypress Semiconductor Corporation, 1999. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

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