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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SGLS091A - JUNE 1995 - REVISED JANUARY 1997
D D D D D D D D D
Nine Differential Channels for the Data and Control Paths of the Differential Small Computer Systems Interface (SCSI) and Intelligent Peripheral Interface (IPI-2) Meets or Exceeds the Requirements of ANSI Standard RS-485 and ISO 8482:1987(E) Packaged in 380-mil Fine Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacing Designed to Operate at 10 Million Transfers Per Second Low Disabled Supply Current 1.4 mA Typical Thermal Shutdown Protection Power-Up/Power-Down Glitch Protection Positive and Negative Output Current Limiting Open-Circuit Fail-Safe Receiver Design
WD PACKAGE (TOP VIEW)
description
The SN55LBC976 is a 9-channel differential transceiver based on the SN55LBC176 LinASICTM cell. Use of TI's LinBiCMOSTM process technology allows the power reduction necessary to integrate nine differential transceivers. On-chip enabling logic makes this device applicable for the data path (eight data bits plus parity) and the control path (nine bits) for both the Small Computer Systems Interface (SCSI) and the Intelligent Peripheral Interface (IPI-2) standard data interfaces.
GND BSR CRE 1A 1DE/RE 2A 2DE/RE 3A 3DE/RE 4A 4DE/RE VCC GND GND GND GND GND VCC 5A 5DE/RE 6A 6DE/RE 7A 7DE/RE 8A 8DE/RE 9A 9DE/RE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
CDE2 CDE1 CDE0 9B + 9B - 8B + 8B - 7B + 7B - 6B + 6B - VCC GND GND GND GND GND VCC 5B + 5B - 4B + 4B - 3B + 3B - 2B + 2B - 1B + 1B -
The switching speed and testing capabilities of the SN55LBC976 are sufficient to transfer data over the data bus at 10 million transfers per second. Each of the nine channels conforms to the requirements of the ANSI RS-485 and ISO 8482:1987(E) standards referenced by ANSI X3.129-1986 (IPI), ANSI X3.131-1993 (SCSI-2), and the proposed SCSI-3 standards. The SN55LBC976 is characterized for operation from - 55C to 125C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Patent pending LinASIC and LinBiCMOS are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 1997, Texas Instruments Incorporated
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SGLS091A - JUNE 1995 - REVISED JANUARY 1997
logic diagram (positive logic)
CDE0 CDE1 54 55
BSR 2
1A 4
30 1B + 29 1B -
1DE/RE 5 6 7 8 9 10 11 CDE0 CDE2 56 32 31 34 33 36 35
2A 2DE/RE 3A 3DE/RE 4A 4DE/RE
Channel 2 Channel 3 Channel 4
2B + 2B - 3B + 3B - 4B + 4B -
CRE
3 BSR 19 BSR 38 5B + 37 5B -
5A
5DE/RE 20 21 22 23 24 25 26 BSR BSR CRE CDE0 47 46 49 48 51 50
6A 6DE/RE 7A 7DE/RE 8A 8DE/RE
Channel 6 Channel 7 Channel 8
6B + 6B - 7B + 7B - 8B + 8B -
9A 27 28
53 9B + 52 9B -
9DE/RE
For additional logic diagrams, see Application Information, Table 1, and Figures 7 through 44.
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schematics of inputs and outputs
ALL INPUTS EXCEPT CDE0, CDE1, AND CDE2 VCC 22 k INPUTS CDE0, CDE1, AND CDE2 VCC
Input
Input
50 k
B+ AND B - I/O PORTS VCC 100 k B+ Only 18 k Receiver Driver 3 k
RECEIVER OUTPUT VCC
A Output
100 k B - Only
12 k 1 k
B+ or B -
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.3 V to 7 V Bus voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 10 V to 15 V Data I/O and control (A-side) voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.3 V to 7 V Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 55C to 125C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to GND.
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SGLS091A - JUNE 1995 - REVISED JANUARY 1997
trecommended operating conditions
MIN Supply voltage, VCC Voltage at any bus terminal (separately or common mode) VO, VI, or VIC common-mode), High-level input voltage, VIH Low-level input voltage, VIL High-level High level output current IOH current, Low-level Low level output current, IOL current Operating free-air temperature, TA B + or B - All except B + and B - All except B + and B - B + or B - A B + or B - A - 55 2 0.8 - 60 -8 60 8 125 4.75 NOM 5 MAX 5.25 12 -7 UNIT V V V V mA mA mA mA C
device electrical characteristics over recommended ranges of operating conditions (unless otherwise noted)
PARAMETER IIH IIL High-level High level input current Low level input current Low-level BSR, A, DE/RE, and CRE CDE0, CDE1, and CDE2 BSR, A, DE/RE, and CRE CDE0, CDE1, and CDE2 All drivers and receivers disabled ICC Supply current All receivers enabled All drivers enabled Co Cpd d Bus-port output capacitance Power dissipation capacitance See Figure 3 VIL = 0 8 V 0.8 BSR and CDE0 at 5 V, Other inputs at 0 V No load, VID = 5 V, All other inputs at 0 V BSR at 0 V, No load, All other inputs at 5 V B + or B - One driver One receiver 1.4 29 4.8 16 460 50 TEST CONDITIONS VIH = 2 V MIN TYP MAX - 200 100 - 200 100 5 50 15 UNIT A A A A mA mA mA pF pF pF
All typical values are at VCC = 5 V, TA = 25C. Cpd determines the no-load dynamic current consumption; IS = Cpd
VCC f + ICC.
driver electrical characteristics over recommended ranges of operating conditions (unless otherwise noted)
PARAMETER | VOD | IOS IOZ Differential output voltage Output short-circuit current High-impedance-state output current TEST CONDITIONS Vtest = -7 V to 12 V, See Figure 1 See Figure 2 MIN 1 TYP 2 250 MAX UNIT V mA
See receiver input current
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receiver electrical characteristics over recommended ranges of operating conditions (unless otherwise noted)
PARAMETER VOH VOL VIT + VIT - Vhys High-level output voltage Low-level output voltage Positive-going input threshold voltage Negative-going input threshold voltage Receiver input hysteresis ( VIT + - VIT - ) VI = 12 V, Other input at 0 V, VI = 12 V, Other input at 0 V, VI = - 7 V, Other input at 0 V, VI = - 7 V, Other input at 0 V, IOZ High-im edance-state output High-impedance-state out ut current See Figure 3 VCC = 5 V, See Figure 3 VCC = 0 V, See Figure 3 VCC = 5 V, See Figure 3 VCC = 0 V, See Figure 3 VO = GND VO = VCC TEST CONDITIONS VID = 200 mV, See Figure 3 VID = - 200 mV, See Figure 3 IOH = - 8 mA, IOH = - 8 mA, See Figure 3 IOL = 8 mA, IOH = - 8 mA, IOL = 8 mA, See Figure 3 TA = - 55C, See Figure 3 - 0.2 45 0.7 0.8 - 0.5 - 0.4 1.5 1.5 -1 -1 - 200 50 MIN 2.5 0.8 0.2 0.5 V V mV mA mA mA mA A TYP MAX UNIT V V
II
Receiver input current
B+ and B -
All typical values are at VCC = 5 V, TA = 25C. This parameter is not tested to meet RS-485 or SCSI standards at -55C.
driver switching characteristics over recommended operating conditions (unless otherwise noted) (see Figure 4)
PARAMETER tdD tsk(lim) k(li ) Differential delay time, high-to-low-level output ( dDH) or y ,g (t low-to-high-level output (tdDL ) Skew limit, the maximum difference in propagation delay times , g y between any two drivers on any two devices TEST CONDITIONS VCC = 5 V, VCC = 5 V, TA = 25C See Note 2 10 MIN 4 9 TYP MAX 30 17 12 8 6 UNIT ns ns ns ns
tsk(p) Pulse skew ( | tdDL - tdDH | ) tt Transition time (tr or tf) All typical values are at VCC = 5 V, TA = 25C. NOTE 2: This specification applies to any 5C band within the operating temperature range.
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SGLS091A - JUNE 1995 - REVISED JANUARY 1997
receiver switching characteristics over recommended operating conditions (see Figure 5) (unless otherwise noted)
PARAMETER tpd d tsk(lim) k(li ) tsk(p) k( Propagation delay time, high-to-low-level output ( PHL) or g y ,g (t low-to-high-level output (tPLH) Skew limit, the maximum difference in propagation delay times , g y between any two drivers on any two devices Pulse skew ( | tPHL - tPLH| ) TEST CONDITIONS VCC = 5 V, VCC = 5 V, TA = - 55C 3 TA = 25C See Note 2 2 MIN 16 21 TYP MAX 36 31 12 9 6 10 UNIT ns ns ns ns ns
tt Transition time ( tr or tf ) All typical values are at VCC = 5 V, TA = 25C. NOTE 2: This specification applies to any 5C band within the operating temperature range.
transceiver switching characteristics over recommended operating conditions
PARAMETER ten(RXL) ten(RXH) ten(TXL) ten(TXH) Enable time, transmit-to-receive to low-level output Enable time, transmit-to-receive to high-level output Enable time, receive-to-transmit to low-level output Enable time, receive-to-transmit to high-level output 180* See Figure 6 TEST CONDITIONS MIN MAX 180* 180* 110* 110* UNIT ns ns ns ns ns
tsu Setup time, CDE0, CDE1, CDE2, BSR, or CRE to active input(s) or output(s) * This parameter is not production tested.
thermal characteristics
PARAMETER RJA RJC Junction-to-free-air thermal resistance Junction-to-case thermal resistance TEST CONDITIONS Board mounted, No air flow MIN TYP 95.4 5.67 MAX UNIT C/ W C/ W
PARAMETER MEASUREMENT INFORMATION
B+ B- CDE0 at 5 V, DE/RE at 5 V, BSR at 0 V Others Open (see Note A) VOD VO, VOH, or VOL - IOH, - IOL, - IOS, or - IOZ
A - IIH or - IIL VIH or VIL
NOTE A: For the IOZ test, the BSR input is at 5 V and all others are at 0 V.
Figure 1. Driver Test Circuit and Input Conditions
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PARAMETER MEASUREMENT INFORMATION
Vtest R1 = 165 B+ 0 V or 3 V A RL = 75 VOD B- CDE0 at 5 V, DE/RE at 5 V, BSR at 0 V, Others Open R2 = 165 Vtest
Figure 2. Driver VOD Test Circuit
CDE0, CDE1, CDE2, CRE, and BSR at 0 V, Others Open, (see Note A)
- II, - IIH, or - IIL
VI, VIC, VIH, or VIL
VIT + , VIT - , or VID
B+ A B- VOH or VOL - IOH, - IOL, or - IOZ
NOTE A: For the IOZ measurement, BSR is at 5 V and CDE0, CDE1, and CDE2 are at 0 V.
Figure 3. Receiver Test Circuit and Input Conditions
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SGLS091A - JUNE 1995 - REVISED JANUARY 1997
PARAMETER MEASUREMENT INFORMATION
GND R1 = 165 B+ Input (see Note A) A RL = 75 Output B- R2 = 165 CDE0 at 5 V, DE/RE at 5 V, BSR at 0 V, Others Open 5V 50 pF 50 pF
Includes probe and jig capacitance. NOTE A: The input is provided by a pulse generator with an output of 0 V to 3 V, PRR of 1 MHz, 50% duty cycle, tr and tf < 6 ns, and ZO = 50 . TEST CIRCUIT
Input
3V 1.5 V 0V tdDH tdDL
Output
90% 10% tr
90% 10% tf
0V
VOLTAGE WAVEFORMS
Figure 4. Driver Test Circuit and Voltage Waveforms
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
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PARAMETER MEASUREMENT INFORMATION
CDE0, CDE1, CDE2, CRE, and BSR at 0 V, All Others Open
Input (see Note A) 1.5 V
B+ B-
A
15 pF
Output
Includes probe and jig capacitance. NOTE A: The input is provided by a pulse generator with an output of 0 to 3 V, PRR of 1 MHz, 50% duty cycle, tr and tf < 6 ns, and ZO = 50 . TEST CIRCUIT 3V 1.5 V 0V tPLH tPHL VOH 1.4 V VOL
Input
90% Output 10% tt
90% 10% tt
VOLTAGE WAVEFORMS
Figure 5. Receiver Test Circuit and Voltage Waveforms
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SGLS091A - JUNE 1995 - REVISED JANUARY 1997
PARAMETER MEASUREMENT INFORMATION
0V3V S1 S3 74HC241 A B+ 50 pF 50 pF R2 165 5V S2 0V 75 VOD R1 165 0V 5V
B- CDE0 at 5 V, CDE1, CDE2, BSR, and CRE at 0 V, All Others Open
Input (see Note A)
DE/RE
VA
Includes probe and jig capacitance. NOTE A: The input is provided by a pulse generator with an output of 0 V to 3 V, PRR of 1 MHz, 50% duty cycle, tr and tf < 6 ns, and ZO = 50 . TEST CIRCUIT 3V Input 1.5 V 1.5 V 0V ten(RXL) VA ten(TXH) 0V 1.4 V S1 to 0 V S2 to 5 V S3 to 3 V
VOD
3V Input 1.5 V 1.5 V 0V ten(RXH) VA ten(TXL) VOD VOLTAGE WAVEFORMS 0V 1.4 V S1 to 5 V S2 to 0 V S3 to 0 V
Figure 6. Enable Time Test Circuit and Voltage Waveforms
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
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TYPICAL CHARACTERISTICS
AVERAGE SUPPLY CURRENT vs FREQUENCY
1000 I CC - Average Supply Current - mA 400 I I - Input Current - A 0 VCC = 4.75 V TA = 25C A, DE/RE, CRE, BSR
INPUT CURRENT vs INPUT VOLTAGE
- 10
100 40 9 Unloaded Receivers
- 20
- 30
10 4 9 Unloaded Drivers
- 40
- 50
1 0.001
0.004 0.01
0.04
1
2
4
10
- 60 0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
f - Frequency - MHz
VI - Input Voltage - V
Figure 7
INPUT CURRENT vs INPUT VOLTAGE
5 4 3 I I - Input Current - mA 2 1 0 -1 -2 -3 -4 -5 - 20 - 16 - 12 - 8 - 4 0 4 8 12 16 20 B+ and B -
Figure 8
VI - Input Voltage - V
Figure 9
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
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TYPICAL CHARACTERISTICS
DRIVER DRIVER
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
2.1 2 VOL - Low-Level Output Voltage - V 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 0 10 20 30 40 50 60 70 80 90 100 IOL - Low-Level Output Current - mA VCC = 5 V B+ and B - 5 4.75 VOH - High-Level Output Voltage - mV 4.5 4.25 4
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
B+ and B -
VCC = 5.25 V 3.75 3.5 3.25 3 2.75 2.5 0 - 10 - 20 - 30 - 40 - 50 - 60 - 70 - 80 - 90 IOH - High-Level Output Current - mA VCC = 4.75 V VCC = 5 V
Figure 10
DRIVER
Figure 11
DIFFERENTIAL OUTPUT VOLTAGE vs OUTPUT CURRENT
5 VOD - Differential Output Voltage - V TA = 25C 4
3 VCC = 5 V 2 VCC = 5.25 V
1 VCC = 4.75 V 0 0 10 20 30 40 50 60 70 80 90 100 IO - Output Current - mA
Figure 12
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TYPICAL CHARACTERISTICS
DRIVER DRIVER
LOW-LEVEL OUTPUT CURRENT vs SUPPLY VOLTAGE
80 70 60 50 40 30 20 10 0 2 2.5 3 3.5 4 4.5 5 5.5 VCC - Supply Voltage - V I OH - High-Level Output Current - mA B+ and B - I OL - Low-Level Output Current - mA 0
HIGH-LEVEL OUTPUT CURRENT vs SUPPLY VOLTAGE
B+ and B - - 10 - 20 - 30 - 40 - 50 - 60 - 70 - 80 2 2.5 3 3.5 4 4.5 5 5.5 VCC - Supply Voltage - V
Figure 13
RECEIVER
Figure 14
RECEIVER
HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
VOL - Low-Level Output Voltage - 0.5 V/div 5.5 VOH - High-Level Output Voltage - V 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 - 10 - 20 - 30 - 40 - 50 - 60 - 70 IOH - High-Level Output Current - mA 0 0 VCC = 4.75 V VCC = 5.25 V VCC = 5 V 2
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
VCC = 5 V VCC = 4.75 V 1.5 VCC = 5.25 V
1
0.5
10
20
30
40
50
60
IOL - Low-Level Output Current - mA
Figure 15
Figure 16
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
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TYPICAL CHARACTERISTICS
DRIVER RECEIVER
DIFFERENTIAL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
B+ and B - VOD - Differential Output Voltage - V 0.8 t PHL or t PLH - Propagation Delay Time - ns 1 35 30 25 20 15 10 5 0 - 25
PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE
VCC = 4.75 V VCC = 5.25 V
0.6
0.4
0.2
0 160
165
170
175
0
25
50
75
100
TA - Free-Air Temperature - C
TA - Free-Air Temperature - C
Figure 17
DRIVER
Figure 18
PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE
25 t PHL or t PLH - Propagation Delay Time - ns
20 VCC = 4.75 V 15 VCC = 5.25 V 10
5
0 - 25
0
25
50
75
100
TA - Free-Air Temperature - C
Figure 19
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
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APPLICATION INFORMATION
Table 1. Typical Signal and Terminal Assignments
SIGNAL CDE0 CDE1 CDE2 BSR CRE 1A 1DE/RE 2A 2DE/RE 3A 3DE/RE 4A 4DE/RE 5A 5DE/RE 6A 6DE/RE 7A 7DE/RE 8A 8DE/RE 9A 9DE/RE TERMINAL 54 55 56 2 3 4 5 6 7 8 9 10 11 19 20 21 22 23 24 25 26 27 28 SCSI DATA DIFFSENSE GND GND GND GND DB0, DB8 DBE0, DBE8 DB1, DB9 DBE1, DBE9 DB2, DB10 DBE2, DBE10 DB3, DB11 DBE3, DBE11 DB4, DB12 DBE4, DBE12 DB5, DB13 DBE5, DBE13 DB6, DB14 DBE6, DBE14 DB7, DB15 DBE7, DBE15 DBP0, DBP1 DBPE0, DBPE1 SCSI CONTROL DIFFSENSE GND GND GND GND ATN INIT EN BSY BSY EN ACK INIT EN RST GND MSG TARG EN SEL SEL EN C/D TARG EN REQ TARG EN I/O TARG EN IPI DATA VCC XMTA, XMTB XMTA, XMTB GND, BSR GND AD7, BD7 GND AD6, BD6 GND AD5, BD5 GND AD4, BD4 GND AD3, BD3 GND AD2, BD2 GND AD1, BD1 GND AD0, BD0 GND AP, BP XMTA, XMTB IPI CONTROL VCC GND SLAVE/MASTER GND VCC NOT USED GND NOT USED GND SYNC IN GND SLAVE IN GND NOT USED GND SYNC OUT GND MASTER OUT GND SELECT OUT GND ATTENTION IN VCC
ABBREVIATIONS: DBn, data bit n, where n = (0,1, . . . ,15) DBEn, data bit n enable, where n = (0,1, . . . ,15) DBP0, parity bit for data bits 0 through 7 or IPI bus A DBPE0, parity bit enable for P0 DBP1, parity bit for data bits 8 through 15 or IPI bus B DBPE1, parity bit enable for P1 ADn or BDn, IPI Bus A - Bit n (ADn) or Bus B - Bit n (BDn), where n = (0,1, . . . ,7) AP or BP, IPI parity bit for bus A or bus B XMTA or XMTB, transmit enable for IPI bus A or B BSR, bit significant response INIT EN, common enable for SCSI initiator mode TARG EN, common enable for SCSI target mode NOTE 3: Signal inputs are shown as active high. When only active-low inputs are available, logic inversion is accomplished by reversing the B + and B - connecter terminal assignments.
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
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APPLICATION INFORMATION
Function Tables
RECEIVER B+ A B- A DRIVER B+ B-
INPUTS B + B - L H H L
OUTPUT A L H
INPUT A L H
OUTPUTS B+ B- L H H L
TRANSCEIVER B+ A DE/RE B-
DRIVER WITH ENABLE B+ A DE/RE B-
DE/RE L L H H
INPUTS A B + - - L H L H - -
B - H L - -
A L H - -
OUTPUTS B- B+ - - L H - - H L
INPUTS DE/RE A L L H H L H L H
OUTPUTS B- B+ Z Z L H Z Z H L
WIRED-OR DRIVER
TWO-ENABLE INPUT DRIVER B+ A B+ B- DE/RE B-
A
INPUT A L H
OUTPUTS B+ B- Z H Z L
INPUTS DE/RE A L L H H L H L H
OUTPUTS B- B+ Z H L H Z L H L
H = high level, L = low level, X = irrelevant, Z = high impedance (off) An H in this column represents a voltage that is 200 mV higher than the other bus input. An L represents a voltage that is 200 mV lower than the other bus input. Any voltage less than 200 mV results in an indeterminate receiver output.
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APPLICATION INFORMATION
VCC 560 nA SCSI Connector nB + I/O EN nB - + - EN nDE/RE nDE/RE I/O VCC 560 nA SCSI Connector nB + nB - - +
(a) ACTIVE-HIGH BIDIRECTIONAL I/O WITH SEPARATE ENABLE
(b) ACTIVE-LOW BIDIRECTIONAL I/O WITH SEPARATE ENABLE
VCC 560 I O
VCC 560 nA
VCC SCSI Connector nB + nB - + - I O EN 560 nA SCSI Connector nB + nB - + -
nDE/RE
nDE/RE
(c) WIRED-OR DRIVER AND ACTIVE-HIGH INPUT
(d) SEPARATE ACTIVE-HIGH INPUT, OUTPUT, AND ENABLE
VCC 560 I O EN nA SCSI Connector nB + nB - - + nDE/RE I O
VCC 560 nA
SCSI Connector nB+ nB - - +
nDE/RE 560
(e) SEPARATE ACTIVE-LOW INPUT AND OUTPUT AND ACTIVE-HIGH ENABLE
(f) WIRED-OR DRIVER AND ACTIVE-LOW INPUT
When this resistor is 0 , the circuit is open drain. Must be open-drain or 3-state output NOTE A: The BSR, CRE, A, and DE/RE inputs have internal pullups. CDE0, CDE1, and CDE2 have internal pulldowns.
Figure 20. Typical SCSI Transceiver Connections
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SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
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APPLICATION INFORMATION channel logic configurations with control input logic
The following logic diagrams show the positive-logic representation for all combinations of control inputs. The control inputs are from MSB to LSB; the BSR, CDE0, CDE1, CDE2, and CRE bit values are shown below the diagrams. Channel 1 is at the top of the logic diagrams; channel 9 is at the bottom of the logic diagrams.
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Figure 21. 00000
Figure 22. 00001
Figure 23. 00010
Figure 24. 00011
Figure 25. 00100
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APPLICATION INFORMATION
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Figure 26. 00101
Figure 27. 00110
Figure 28. 00111
Figure 30. 01001
Figure 29. 01000
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
19
SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SGLS091A - JUNE 1995 - REVISED JANUARY 1997
APPLICATION INFORMATION
Figure 34. 01101
Figure 35. 01110
Figure 31. 01010
Figure 32. 01011
Figure 33. 01100
20
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SGLS091A - JUNE 1995 - REVISED JANUARY 1997
APPLICATION INFORMATION
Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z
Figure 36. 01111
Figure 37. 10000 and 10001
Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z
Figure 38. 10010 and 10011
Figure 39. 10100 and 10101
Hi-Z
Figure 40. 10110 and 10111
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
21
SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SGLS091A - JUNE 1995 - REVISED JANUARY 1997
APPLICATION INFORMATION
Hi-Z
Figure 41. 11000 and 11001
Hi-Z Hi-Z
Figure 42. 11010 and 11011
Figure 43. 11100 and 11101
Hi-Z
Figure 44. 11110 and 11111
22
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN55LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SGLS091A - JUNE 1995 - REVISED JANUARY 1997
MECHANICAL INFORMATION
WD (R-GDFP-F**)
48 PIN SHOWN
CERAMIC DUAL FLATPACK
NO. OF PINS** 48 0.120 (3,05) 0.075 (1,91) 0.005 (0,13) NOM 56
A MIN 0.630 (16,00) 0.610 (15,49) MAX 0.730 (18,54) 0.710 (18,03)
1.200 (30,50) 0.950 (24,13) 0.390 (9,91) 0.370 (9,40) 1 48
0.025 (0,64)
A
0.010 (0,25) TYP
24
25 4040176 / B 03/95
NOTES: A. B. C. D. E.
All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for pin identification only Falls within MIL-STD-1835: GDFP1-F48 and JEDEC MO -146AA GDFP1-F56 and JEDEC MO -146AB
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
23
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