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| SN54BCT373, SN74BCT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS016C - SEPTEMBER 1988 - REVISED NOVEMBER 1993 * * * * * State-of-the-Art BiCMOS Design Significantly Reduces Standby Current Full Parallel Access for Loading 3-State True Outputs Drive Bus Lines or Buffer Memory Address Registers ESD Protection Exceeds 2000 V Per MIL-Std-883C, Method 3015 Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic and Ceramic 300-mil DIPs (J, N) SN54BCT373 . . . J OR W PACKAGE SN74BCT373 . . . DB, DW, OR N PACKAGE (TOP VIEW) OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q LE description These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches of the BCT373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs will follow the data (D) inputs. When the latch enable is taken low, the Q outputs will be latched at the logic levels that were set up at the D inputs. SN54BCT373 . . . FK PACKAGE (TOP VIEW) 1D 1Q OE VCC 2D 2Q 3Q 3D 4D 4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13 8Q 8D 7D 7Q 6Q 6D A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. The output enable (OE) does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN74BCT373 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN54BCT373 is characterized for operation over the full military temperature range of - 55C to 125C. The SN74BCT373 is characterized for operation from 0C to 70C. FUNCTION TABLE (each latch) INPUTS OE L L L H LE H H L X D H L X X OUTPUT Q H L Q0 Z PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1993, Texas Instruments Incorporated POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 4Q GND LE 5Q 5D 2-1 SN54BCT373, SN74BCT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS016C - SEPTEMBER 1988 - REVISED NOVEMBER 1993 logic symbol OE LE 1D 2D 3D 4D 5D 6D 7D 8D 1 11 3 4 7 8 13 14 17 18 EN C1 1D 2 5 6 9 12 15 16 19 logic diagram (positive logic) OE LE 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q To Seven Other Channels 1D 3 C1 1D 2 1Q 1 11 This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to 7 V Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . - 0.5 V to 5.5 V Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VCC Input clamp current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 30 mA Current into any output in the low state: SN54BCT373 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74BCT373 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Power dissipation (DB package only) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 650 mW Operating free-air temperature range: SN54BCT373 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 55C to 125C SN74BCT373 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Power dissipation is application dependent and is a function of supply voltage, operating temperature, the number of outputs switching simultaneously, and output duty cycle. Because the thermal resistance of the DB package is higher than that of the DW or N packages, the DB package may not be suitable for some applications. recommended operating conditions SN54BCT373 MIN VCC VIH VIL IIK IOH IOL TA Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature - 55 4.5 2 0.8 -18 -12 48 125 0 NOM 5 MAX 5.5 SN74BCT373 MIN 4.5 2 0.8 -18 -15 64 70 NOM 5 MAX 5.5 UNIT V V V mA mA mA C 2-2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN54BCT373, SN74BCT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS016C - SEPTEMBER 1988 - REVISED NOVEMBER 1993 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VCC = 4.5 V, VCC = 4.5 V TEST CONDITIONS II = -18 mA IOH = - 3 mA IOH = -12 mA IOH = -15 mA IOL = 48 mA IOL = 64 mA VI = 5.5 V VI = 2.7 V VI = 0.5 V VO = 0 VO = 2.7 V VO = 0.5 V 37 2 5 VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V 6 -100 MIN SN54BCT373 TYP MAX -1.2 2.4 2 3.3 3.2 2 0.38 0.55 0.42 0.4 20 - 0.6 - 225 50 - 50 60 5 8 37 2 5 6 11 -100 0.55 0.4 20 - 0.6 - 225 50 - 50 60 5 8 3.1 V mA A mA mA A A mA mA mA pF pF 2.4 3.3 V MIN SN74BCT373 TYP MAX -1.2 UNIT V VOL II IIH IIL IOS IOZH IOZL ICCL ICCH ICCZ Ci VCC = 4 5 V 4.5 VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V VCC = 5.5 V VCC = 5.5 V VCC = 5 V, Co VCC = 5 V, 11 All typical values are at VCC = 5 V, TA = 25C. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) VCC = 5 V, TA = 25C MIN tw tsu th Pulse duration, LE high Setup time, data before LE Hold time, data after LE 7.5 2 5.5 MAX SN54BCT373 MIN 7.5 2 5.5 MAX SN74BCT373 MIN 7.5 2 5.5 MAX ns ns ns UNIT POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2-3 SN54BCT373, SN74BCT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS016C - SEPTEMBER 1988 - REVISED NOVEMBER 1993 switching characteristics (see Note 3) VCC = 5 V, CL = 50 pF, R1 = 500 , R2 = 500 , TA = 25C BCT373 MIN tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ D LE Q Q Q Q 2 2 2 2 1 1 1 1 TYP 5.9 6.7 6.2 5.9 7.8 8.2 4.9 5 MAX 7.7 8.5 8.2 7.8 9.6 10.2 6.6 6.7 VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 , R2 = 500 , TA = MIN to MAX SN54BCT373 MIN 1.5 1 2 2 1 1 1 1 MAX 10.1 10.3 10.1 9.2 12.3 12.5 7.4 8.1 SN74BCT373 MIN 2 1.5 2 2 1 1 1 1 MAX 9.3 9.5 9.3 8.8 11.8 12 7 7.4 ns ns ns ns PARAMETER FROM (INPUT) TO (OUTPUT) UNIT OE OE For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 3: Load circuits and voltage waveforms are shown in Section 1. 2-4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN54BCT373, SN74BCT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS016C - SEPTEMBER 1988 - REVISED NOVEMBER 1993 TYPICAL CHARACTERISTICS Figures 1 through 4 show the typical power dissipation for an SN74BCT373 over variations in outputs switching, output frequency, and capacitive load. POWER DISSIPATION vs FREQUENCY 1050 900 750 600 450 300 One Switching 150 0 0 10 20 30 40 50 f - Frequency - MHz Four Switching VCC = 5.5 V TA = 70C RL = 500 Air Flow = 0 CL = 15 pF 1050 900 750 600 450 One Switching 300 150 0 0 10 20 30 40 50 f - Frequency - MHz VCC = 5.5 V TA = 70C RL = 500 Air Flow = 0 CL = 50 pF Eight Switching POWER DISSIPATION vs FREQUENCY PD - Power Dissipation - mW Eight Switching PD - Power Dissipation - mW Four Switching Figure 1 POWER DISSIPATION vs FREQUENCY 1400 1200 1000 800 600 400 200 0 0 10 20 30 40 50 f - Frequency - MHz One Switching VCC = 5.5 V TA = 70C RL = 500 Air Flow = 0 CL = 100 pF Eight Switching PD - Power Dissipation - mW 1200 1000 800 600 1400 VCC = 5.5 V TA = 70C RL = 500 Air Flow = 0 CL = 150 pF Figure 2 POWER DISSIPATION vs FREQUENCY Eight Switching Four Switching PD - Power Dissipation - mW Four Switching One Switching 400 200 0 0 10 20 30 f - Frequency - MHz 40 50 Figure 3 The dashed lines are for the DB package only. Figure 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2-5 SN54BCT373, SN74BCT373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS016C - SEPTEMBER 1988 - REVISED NOVEMBER 1993 2-6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof. Copyright (c) 1998, Texas Instruments Incorporated |
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