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19-3604; Rev 0; 3/05
MAX5875 Evaluation Kit
General Description
The MAX5875 evaluation kit (EV kit) is a fully assembled and tested circuit board that contains all the components necessary to evaluate the performance of the MAX5875 digital-to-analog converter (DAC). The MAX5875 is a dual 16-bit, parallel, 200Msps DAC that integrates a 1.20V voltage reference and provides a differential current output. The EV kit operates with CMOS-compatible digital data inputs, a single-ended clock input, and requires a 3.3V/1.8V dual-output power supply for simple board operation. The MAX5875 EV kit circuit also contains an external 1.25V reference voltage that can be used to drive the input reference voltage pin of the MAX5875. The MAX5875 EV kit can also be used to evaluate the MAX5874 (14-bit) and MAX5873 (12-bit) DACs. CMOS-Compatible Inputs SMA Coaxial Connectors for Clock Input and Analog Outputs On-Board External 1.25V Reference Voltage 50 Matched Clock Input and Analog Output Signal Lines Single-Ended-to-Differential Clock Signal Conversion Circuitry Differential Current to Single-Ended Voltage Output Conversion Circuitry Full-Scale Current Output Configured for 20mA Fully Assembled and Tested Also Evaluates the MAX5874 (14-Bit) and MAX5873 (12-Bit) DACs
Features
Fast Evaluation and Performance Testing
Evaluates: MAX5873/MAX5874/MAX5875
Ordering Information
PART MAX5875EVKIT TEMP RANGE 0C to +70C IC PACKAGE 68 QFN-EP
Component List
DESIGNATION C1, C2, C4-C14, C37 QTY DESCRIPTION 0.1F 10%, 10V X5R ceramic capacitors (0402) TDK C1005X5R1A104K or Taiyo Yuden LMK105BJ104KV 1F 10%, 6.3V X5R ceramic capacitor (0402) TDK C1005X5R0J105K 1F 10%, 10V X5R ceramic capacitors (0603) TDK C1608X5R1A105K 10F 10%, 10V tantalum capacitors (A) AVX TAJA106K010R or Kemet T494A106K010AS 47F 10%, 6.3V tantalum capacitors (B) AVX TAJB476K006R or Kemet T494B476K006AS DESIGNATION C30-C36 CLK, OUTPUTI, OUTPUTQ J1, J2 JU1, JU2, JU3 JU4, JU5 L1-L5 OUTIP, OUTIN, OUTQP, OUTQN R1, R2, R4, R5 R3, R6 R7 QTY 0 3 DESCRIPTION Not installed, ceramic capacitors (0603) SMA PC-mount vertical connectors 2 x 20-pin surface-mount headers (0.1in) Samtec TSM-120-02-S-MT 3-pin headers 2-pin headers Ferrite bead cores (0805) Fair-Rite 2508051217Z0 Not installed, SMA connectors 49.9 0.1% resistors (0603) IRC PFC-W0603R-03-49R9-B 100 1% resistors (0603) 2k 1% resistor (0603)
14
C3
1
2 3 2 5 0 4 2 1
C15-C19
5
C20-C24
5
C25-C29
5
________________________________________________________________ Maxim Integrated Products
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MAX5875 Evaluation Kit Evaluates: MAX5873/MAX5874/MAX5875
Component List (continued)
DESIGNATION R8, R9 R10-R47 T1, T2, T3 T4, T5 U1 QTY 2 0 3 2 1 DESCRIPTION 24.9 1% resistors (0603) Not installed, resistors (0603) 1:1 RF transformers Mini-Circuits ADTL1-12 1:1 RF transformers Coilcraft TTWB3010-1 MAX5875EGK (68-pin QFN-EP 10mm x 10mm) None None 5 1 U2 1 DESIGNATION QTY DESCRIPTION 1.25V voltage reference (8-pin SO) MAX6161AESA or MAX6161BESA Shunts (JU1-JU5) MAX5875 PC board
Component Suppliers
SUPPLIER AVX Coilcraft Fair-Rite Products IRC Kemet Mini-Circuits Taiyo Yuden TDK PHONE 843-946-0238 847-639-6400 845-895-2055 361-992-7900 864-963-6300 718-934-4500 800-348-2496 847-803-6100 FAX 843-626-3123 847-639-1469 845-895-2629 361-992-3377 864-963-6322 718-934-7092 847-925-0899 847-390-4405 WEBSITE www.avxcorp.com www.coilcraft.com www.fair-rite.com www.irctt.com www.kemet.com www.minicircuits.com www.t-yuden.com www.component.tdk.com
Note: Indicate that you are using the MAX5875 when contacting these manufacturers.
Quick Start
Recommended Equipment
* * * * * Three 3.3V, 100mA DC power supplies Two 1.8V, 100mA DC power supplies Two signal generators with low phase noise and low jitter for clock inputs (e.g., HP 8664A) A dual, 16-bit digital pattern generator for data inputs (e.g., DG2020A) Spectrum analyzer (e.g., HP 8560E)
3) Verify that no shunts are installed across jumpers JU4 and JU5 (internal reference). 4) Install a shunt across pin J1-37 (header J1) and ground (pin J1-38) (XOR disabled). 5) Install a shunt across pin J1-33 (header J1) and DGND (pin J1-34) to ground the SELIQ pin (recommended for dual-port input operation). 6) Synchronize the digital pattern generator (DG2020A) and the spectrum analyzer with the clock signal generator (HP 8664A). 7) Connect the clock signal generator to the CLK SMA connector on the EV kit. 8) Verify that the digital pattern generator is programmed for valid CMOS output voltage levels and offset binary digital outputs. 9) Connect the digital pattern generator outputs to the J1 and J2 input header connectors on the EV kit board. The input header pins are labeled for proper connection to the digital pattern generator. 10) Connect the spectrum analyzer to the OUTPUTQ SMA connector or to the OUTPUTI SMA connector.
* Voltmeter The MAX5875 EV kit is a fully assembled and tested surface-mount board. Follow the steps below for board operation. Do not turn on power supplies or enable signal generators until all connections are completed (Figure 1). 1) Verify that a shunt is installed across pins 1 and 2 of jumper JU1 (dual-port input enabled). 2) Verify that shunts are installed across pins 2 and 3 of jumpers JU2 (normal operation), and JU3 (offset binary input mode).
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MAX5875 Evaluation Kit Evaluates: MAX5873/MAX5874/MAX5875
VARIABLE OUTPUT POD 2 VARIABLE OUTPUT POD 1 PATTERN GENERATOR DG2020A POD A* POD B* CLOCK INPUT* 16 (A0-A15) 16 (B0-B15)
MASTER SIGNAL GENERATOR HP 8664A INT* RF OUTPUT
SLAVE SIGNAL GENERATOR HP 8664A EXT* RF OUTPUT CLK
MAX5875 EV KIT SPECTRUM ANALYZER HP 8560E OUTPUTI OUTPUTQ J2 INPUT EXT*
J1
*THESE CONNECTORS ARE LOCATED ON THE BACK SIDE OF THE EQUIPMENT.
Figure 1. MAX5875 EV Kit Quick Start Setup
11) Connect a 1.8V, 100mA power supply to the AVDD1 PC board pad. Connect the ground terminal of this supply to AGND. 12) Connect a 3.3V, 100mA power supply to the AVDD2 PC board pad. Connect the ground terminal of this supply to AGND. 13) Connect a 1.8V, 100mA power supply to the DVDD1 PC board pad. Connect the ground terminal of this supply to DGND. 14) Connect a 3.3V, 100mA power supply to the DVDD2 PC board pad. Connect the ground terminal of this supply to DGND. 15) Connect a 3.3V, 100mA power supply to the VDD_CK PC board pad. Connect the ground terminal of this supply to CLKGND. 16) Turn on all five power supplies. 17) Enable the clock signal generators (HP 8664A) and the digital pattern generator. 18) Set the clock signal generator output power between +8dBm to +12dBm and the frequency (fCLK) to 200MHz. 19) Use the spectrum analyzer to view the MAX5875 output spectrum or view the single-ended output waveforms using an oscilloscope on SMA connectors OUTPUTQ or OUTPUTI.
Detailed Description
The MAX5875 EV kit is designed to simplify the evaluation of the MAX5875 dual 16-bit, 200Msps, current-output DAC. The MAX5875 operates with CMOS-compatible digital data inputs, a single-ended clock input signal, an internal 1.20V reference voltage, 3.3V and 1.8V power supplies. The MAX5875 EV kit provides header connectors J1 and J2 to interface with a pattern generator, circuitry that converts the differential current outputs to singleended voltage signals, and circuitry to convert a usersupplied single-ended clock signal to a differential clock signal. The EV kit circuit also includes an external 1.25V reference voltage source U2 (MAX6161) and a test point connector that can be used to overdrive the MAX5875 internal 1.20V bandgap reference. The EV kit board layout separates the circuit power into digital, analog, and clock planes to improve dynamic performance.
Power Supplies
The MAX5875 EV kit can operate from a single 1.8V power supply connected to the DVDD1 and AVDD1 input power pads, and a single 3.3V power supply connected to the DVDD2, AVDD2, and VDD_CK input power pads for board operation. However, five separate power supplies are recommended for optimum dynamic performance.
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MAX5875 Evaluation Kit Evaluates: MAX5873/MAX5874/MAX5875
The EV kit PC board layout is divided into three sections: digital, analog, and clock. Using separate power supplies for each section reduces crosstalk noise and improves the integrity of the output signal. When using separate power supplies, connect a 1.8V power supply across the DVDD1 and DGND pads and a 3.3V power supply across DVDD2 and DGND pads (digital). Connect a 1.8V power supply across the AVDD1 and AGND pads and a 3.3V power supply across the AVDD2 and AGND pads (analog). Connect a 3.3V power supply across the VDD_CK and CLKGND pads (clock).
Clock Signal
The MAX5875 operates with a differential clock input signal. However, the EV kit board only requires an external single-ended clock signal connected to the CLK SMA connector. The EV kit features circuitry that converts the single-ended clock signal to a differential clock signal. The clock signal can be either a sine or a square wave. A minimum signal power amplitude of +8dBm is recommended to drive the clock input.
Two's-Complement/Offset Binary Input Format
The MAX5875 EV kit's two's-complement or offset binary input modes can be configured with jumper JU3. Apply either a two's-complement or offset binary formatted input code to connectors J1 and J2. See Table 1 for jumper JU3 configuration.
CMOS Digital Input Data
The MAX5875 EV kit provides two 0.1in 2 x 20 headers (J1 and J2) to interface a dual 16-bit CMOS pattern generator to the EV kit. The header data pins are labeled on the PC board with their appropriate data bit designations for channel A (J1) and channel B (J2). Use the labels on the EV kit board to match the data bits from the pattern generator to the corresponding data pins on headers J1 and J2. The input data is latched on the rising edge of the clock signal. The MAX5875 SELIQ and XOR functions can also be controlled by applying a high or low logic signal to the corresponding J1 header pins. Refer to the CMOS DAC Inputs section in the MAX5875 IC data sheet for detailed information on the SELIQ and XOR functions.
Dual-Port (Parallel)/Single-Port (Interleaved) Input Mode
The MAX5875 EV kit's dual- or single-port input modes can be configured with jumper JU1. In dual-port input mode the digital input signal is captured on both input ports. In interleaved-port input mode the digital input signal is captured on pins B0-B15. A control signal on SELIQ indicates when I- or Q-channel data is available. See Table 2 for jumper JU1 configuration.
Table 1. Jumper JU3 TORB Configuration
SHUNT POSITION 1-2 2-3 Not Installed TORB PIN CONNECTION Connected to DVDD2 Connected to DGND MAX5875 has an internal pulldown resistor EV KIT FUNCTION Two's-complement digital signal input format Offset binary digital signal input format
Table 2. Jumper JU1 DORI Configuration Mode
SHUNT LOCATION 1-2 2-3 Not Installed DORI PIN CONNECTION Connected to DVDD2 Connected to DGND MAX5875 has an internal pulldown resistor EV KIT FUNCTION Dual-port (parallel) input mode Single-port (interleaved) input mode
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MAX5875 Evaluation Kit
Reference Voltage
The MAX5875 requires a reference voltage to set the full-scale output current of the DAC. The MAX5875 integrates a stable 1.20V on-chip bandgap reference that is selected by default during initial power-up. An external voltage reference must be connected to test point TP1 when the internal voltage reference is overdriven. The EV kit circuit also features an on-board external 1.25V reference voltage (U2, MAX6161) that can be used to overdrive the internal bandgap reference. U2 has a tighter voltage output tolerance and is less susceptible to temperature variations. See Table 3 to select the voltage reference source. age signals with a 50 impedance. In dual-port mode, data at pins A15-A0 are loaded into Q-DAC and the reconstructed single-ended signal is available at OUTPUTQ SMA connector. Data at pins B15-B0 are loaded into I-DAC and the reconstructed single-ended signal is available at OUTPUTI SMA connector. When outputs OUTPUTQ and OUTPUTI are terminated with 50 external loads, the full-scale output signal level is equal to -2dBm. To evaluate the converter's single-ended outputs, remove transformers T1 and T2. Then probe the single-ended signals at the OUTIP and OUTIN SMA connectors (must be installed) for the I-DAC. Probe the single-ended signals at the OUTQP and OUTQN SMA connectors (must be installed) for the Q-DAC. In single-ended configuration the DAC output signal amplitude is equal to 1VP-P at each of the outputs.
Evaluates: MAX5873/MAX5874/MAX5875
Full-Scale Output Current
The MAX5875 requires an external resistor to set the full-scale output current. The MAX5875 EV kit full-scale current is set to 20mA by resistor R7 (2k). Replace resistor R7 to adjust the full-scale output current. Refer to the Reference Architecture and Operation section in the MAX5875 IC data sheet to select different values for resistor R7.
Power-Down Mode
The MAX5875 EV kit power-down mode can be configured with jumper JU2. Install a shunt across pins 1 and 2 of jumper JU2 to power down the MAX5875 EV kit circuit. Install a shunt across pins 2 and 3 of jumper JU2 for normal operation. Removing the shunt from jumper JU2 will also place the circuit in normal operation mode, as the MAX5875 contains an internal pulldown resistor at the PD pin. See Table 4 for jumper JU2 configuration.
Outputs
The dual-output channels of the MAX5875 are configured for differential current mode to achieve the best dynamic performance. The resistor and transformer networks at the DAC outputs are designed to convert the differential current signals into single-ended volt-
Table 3. Reference Voltage
SHUNT LOCATION ON JUMPER JU4 Not Installed Installed SHUNT LOCATION ON JUMPER JU5 Not Installed Installed REFIO PIN CONNECTION Open (REFIO becomes the output of the internal bandgap reference) Connected to U2 (MAX6161) EV KIT FUNCTION Internal 1.20V reference enabled or connect an external reference to TP1 U2 provides a precision 1.25V voltage reference
Note: Installing JU5 without JU4 is NOT allowed.
Table 4. Jumper JU2 Power-Down Configuration
SHUNT LOCATION 1-2 2-3 Not Installed PD PIN CONNECTION Connected to DVDD2 Connected to DGND MAX5875 has an internal pulldown resistor Power-down Normal operation EV KIT FUNCTION
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MAX5875 Evaluation Kit Evaluates: MAX5873/MAX5874/MAX5875
Evaluating the MAX5874/MAX5873
The MAX5875 EV kit can be used to evaluate the MAX5874 or the MAX5873 DACs. The MAX5874 is a 14-bit dual DAC and the MAX5873 is a 12-bit dual DAC. Both DACs are also specified for a maximum 200Msps update rate. The MAX5874 and MAX5873 are pin compatible with the MAX5875 except for the digital data input. Replace the MAX5875 (U1) with the desired DAC for evaluation. Review the MAX5875 EV kit schematic and the IC data sheet of the respective DAC for appropriate digital input connections. Use the connector guide (Table 5) to match the input data to the EV kit board connectors J1 and J2.
Table 5. MAX5875 EV Kit Board Connector Guide
EV KIT CONNECTOR PIN J1-37 J1-33 J2-9 J2-11 J2-13 J2-15 J2-17 J2-19 J2-21 J2-23 J2-25 J2-27 J2-29 J2-31 J2-33 J2-35 J2-37 J2-39 J1-1 J1-3 J1-5 J1-7 J1-9 J1-11 J1-13 J1-15 J1-17 J1-19 J1-21 J1-23 J1-25 J1-27 J1-29 J1-31 MAX5875 INPUT XOR SELIQ A0 (LSB) A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 (MSB) B0 (LSB) B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 (MSB) MAX5874 INPUT XOR SELIQ N.C. N.C. A0 (LSB) A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 (MSB) N.C. N.C. B0 (LSB) B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 (MSB) MAX5873 INPUT XOR SELIQ N.C. N.C. N.C. N.C. A0 (LSB) A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 (MSB) N.C. N.C. N.C. N.C. B0 (LSB) B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 (MSB)
PC Board Layout
The MAX5875 EV kit is a four-layer PC board design optimized for high-speed signals. All high-speed signal lines are routed through 50 impedance-matched transmission lines. The length of these 50 transmission lines is matched to within 40 mils (1mm) to minimize layout-dependent data skew. The PC board layout separates the digital, analog, and clock sections of the circuit for optimum performance.
N.C. = No connection.
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MAX5875 Evaluation Kit Evaluates: MAX5873/MAX5874/MAX5875
J1 HEADER 2 x 20 DVDD3.3 J1-40 J1-39 R47 SHORT (PC TRACE) 1 DORI 42 XOR 41 2 JU1 3 DVDD3.3 1 GND PD 40 DVDD3.3 SELIQ 1 45 B15 TORB 39 2 JU3 3 46 R43 SHORT (PC TRACE) R42 SHORT (PC TRACE) R41 SHORT (PC TRACE) R40 SHORT (PC TRACE) R39 SHORT (PC TRACE) R38 SHORT (PC TRACE) R37 SHORT (PC TRACE) R36 SHORT (PC TRACE) R35 SHORT (PC TRACE) R34 SHORT (PC TRACE) R33 SHORT (PC TRACE) R32 SHORT (PC TRACE) R31 SHORT (PC TRACE) R30 SHORT (PC TRACE) B14 CLKP 47 B13 38 C12 0.1F CLK 4 T3 DVDD1 3 DGND 6 1 C25 47F 6.3V C20 10F 10V L1 DVDD1.8 2 JU2 3
J1-38
J1-37
J1-36
J1-35
43 R46 SHORT (PC TRACE) R45 SHORT (PC TRACE) R44 SHORT (PC TRACE)
J1-34
J1-33
44
J1-32
J1-31
J1-30
J1-29
J1-28
J1-27
J1-26
J1-25
48
C30 OPEN
R8 24.9 1%
B12 C31 OPEN R9 24.9 CLKGND 1%
J1-24
J1-23
49
B11 CLKN 37
C11 0.1F
J1-22
J1-21
50
B10
CLKGND AVCLK 35 C10 0.1F C19 1F C24 10F 10V L5 C29 47F 6.3V VDD_CK
J1-20
J1-19
51
B9
J1-18
J1-17
52
B8
GND
36
CLKGND DVDD3.3 DVDD2 L2 C26 47F 6.3V C21 10F 10V C16 1F
J1-16
J1-15
53
B7 34
AVDD1.8 AVDD1.8
CLKGND
J1-14
J1-13
54
B6
J1-12
J1-11
55
B5
GND AVDD3.3
33 32 31
C9 0.1F C8 AVDD3.3 0.1F C7 0.1F OUTIP
J1-10
J1-9
56
B4 U1
AVDD3.3
J1-8
J1-7
57
B3
GND
30
AVDD1.8 58
MAX5875
B2 OUTIP 29 R1 49.9 0.1% 4 R3 100 1% R10 OPEN 6 C32 OPEN 1 T1 3 4 5 6 T4 3 2 1 R12 OPEN OUTPUTI
J1-6
J1-5
AVDD1 C27 47F 6.3V
L3 C22 10F 10V C17 1F
J1-4
J1-3
59
B1
AGND
J1-2
J1-1 DVDD1.8
60
B0 R2 49.9 0.1%
61 C15 1F J2 HEADER 2 x 20 R29 SHORT (PC TRACE) J2-40 J2-39 R28 SHORT (PC TRACE) R27 SHORT (PC TRACE) R26 SHORT (PC TRACE) R25 SHORT (PC TRACE) R24 SHORT (PC TRACE) R23 SHORT (PC TRACE) R22 SHORT (PC TRACE) R21 SHORT (PC TRACE) R20 SHORT (PC TRACE) R19 SHORT (PC TRACE) R18 SHORT (PC TRACE) R17 SHORT (PC TRACE) R16 SHORT (PC TRACE) R15 SHORT (PC TRACE) R14 SHORT (PC TRACE) 62 C13 0.1F
DVDD1.8
OUTIN
28 OUTIN
GND GND
27 26 OUTQP
A15
OUTQP
25 R4 49.9 0.1% 4 R6 100 1% R11 OPEN 6 C33 OPEN 1 T2 3
4 5 6
T5
3 2 1 R13 OPEN
OUTPUTQ
J2-38
J2-37
63
A14
J2-36
J2-35
64
A13
AVDD3.3 AVDD2 C28 47F 6.3V L4 C23 10F 10V C18 1F
J2-34
J2-33
65
A12
R5 49.9 0.1% OUTQN GND 24 23 C6 0.1F C5 0.1F C4 AVDD1.8 0.1F AVDD3.3
J2-32
J2-31
66
OUTQN
A11
J2-30
J2-29
67
A10
AVDD3.3 AVDD3.3 GND
22 21 20
J2-28
J2-27
68
A9
J2-26
J2-25
1
A8
AVDD1.8
19
J2-24
J2-23
2
A7
DACREF
18 R7 2k 1%
J2-22
J2-21
3
A6 FSADJ A5 REFIO 17 16
C3 1F
C34 OPEN
5 TP1 JU5 6 C37 0.1F
N.C.
GND
4 AVDD3.3
J2-20
J2-19
4
OUT
J2-18
J2-17
5
A4
GND
15
C35 OPEN C2 0.1F
C36 OPEN AVDD3.3
U2
N.C.
3 JU4
7
N.C. MAX6161
IN
2 C14 0.1F
J2-16
J2-15
6
A3
AVDD3.3 GND
14 13
8
N.C.
N.C.
1
CLKGND
J2-14
J2-13
7
A2
J2-12
J2-11
8
A1
GND
12 DVDD3.3 11
C1 0.1F
J2-10
J2-9
9
A0
DVDD3.3
J2-8
J2-7
GND
10
J2-6
J2-5
J2-4
J2-3
J2-2
J2-1
Figure 2. MAX5875 EV Kit Schematic _______________________________________________________________________________________ 7
MAX5875 Evaluation Kit Evaluates: MAX5873/MAX5874/MAX5875
Figure 3. MAX5875 EV Kit Component Placement Guide--Component Side 8 _______________________________________________________________________________________
MAX5875 Evaluation Kit Evaluates: MAX5873/MAX5874/MAX5875
Figure 4. MAX5875 EV Kit PC Board Layout--Component Side (Layer 1)
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MAX5875 Evaluation Kit Evaluates: MAX5873/MAX5874/MAX5875
Figure 5. MAX5875 EV Kit PC Board Layout--Ground Planes (Layer 2) 10 ______________________________________________________________________________________
MAX5875 Evaluation Kit Evaluates: MAX5873/MAX5874/MAX5875
Figure 6. MAX5875 EV Kit PC Board Layout--Power Planes (Layer 3)
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MAX5875 Evaluation Kit Evaluates: MAX5873/MAX5874/MAX5875
Figure 7. MAX5875 EV Kit PC Board Layout--Solder Side (Layer 4)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.

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