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 www.fairchildsemi.com
KM4210
Dual, 0.5mA, Low Cost, +2.7V & +5V, 75MHz Rail-to-Rail Amp
Features
I I I I I I I I I I I I
General Description
The KM4210 is a dual, low power, low cost, voltage feedback amplifier. The KM4210 uses only 505A of supply current per amplifier, and is designed to operate on +2.7V, +5V, or 2.5V supplies. The input voltage range extends 300mV below the negative rail and 1.2V below the positive rail. The KM4210 offers high bipolar performance at a low CMOS price. The KM4210 offers superior dynamic performance with a 75MHz small signal bandwidth and 50V/s slew rate. The combination of low power, high bandwidth, and rail-to-rail performance make the KM4210 well suited for battery-powered communication/computing systems. The KM4110 (single) and KM4120 (single with disable) are also available.
505A supply current 75MHz bandwidth Power down to Is = 33A (KM4120) Fully specified at +2.7V and +5V supplies Output voltage range: 0.07V to 4.86V; Vs = +5 Input voltage range: -0.3V to +3.8V; Vs = +5 50V/s slew rate 15mA linear output current 30mA output short circuit current 12nV/Hz input voltage noise Directly replaces AD8032 in single supply applications Small package options (SOIC-8 and MSOP-8)
Applications
I I I I I
Portable/battery-powered applications A/D buffer Active filters Signal conditioning Portable test instruments
Non-Inverting Freq. Response Vs = +5V Normalized Magnitude (1dB/div)
0.1
G=2 Rf = 1k
KM4210 Packages
SOIC-8
Out1 -In1 +In1 -Vs 1 2 3 4
+
8 7
+
+Vs Out2 -In2 +In2
6 5
1
10
100
MSOP-8
Out1 -In1 +In1 -Vs 1 2 3 4
+
Frequency (MHz)
8 7
+
+Vs Out2 -In2 +In2
6 5
REV. 1 August 2001
DATA SHEET
KM4210
KM4210 Electrical Characteristics
Parameters Case Temperature Frequency Domain Response -3dB bandwidth full power bandwidth gain bandwidth product Time Domain Response rise and fall time settling time to 0.1% overshoot slew rate Distortion and Noise Response 2nd harmonic distortion 3rd harmonic distortion THD input voltage noise crosstalk DC Performance input offset voltage average drift input bias current average drift input offset current power supply rejection ratio open loop gain quiescent current per channel Input Characteristics input resistance input capacitance input common mode voltage range common mode rejection ratio Output Characteristics output voltage swing linear output current short circuit output current power supply operating range
(Vs = +2.7V, G = 2, RL = 1k to Vs/2, Rf = 1k; unless noted) TYP +25C Min & Max +25C MHz MHz MHz MHz ns ns % V/s dBc dBc dB nV/Hz dB 5 3.5 350 60 65 600 mV V/C A nA/C nA dB dB A M pF V dB V V mA mA V 2 2 2 2 2 2 1 UNITS NOTES
Conditions
G = +1, Vo = 0.05Vpp G = +2, Vo < 0.2Vpp G = +2, Vo = 2Vpp 0.2V step 1V step 1V step, 2V step, G = -1 1Vpp, 1MHz 1Vpp, 1MHz 1Vpp, 1MHz >10kHz 100kHz
65 30 12 28 7.5 60 4 40 67 72 65 12 90 0 10 1.2 3.5 30 66 98 470 9 1.7 -0.3 to 1.5 98 0.05 to 2.6 0.09 to 2.53 15 25 2.7
DC
DC, Vcm = 0V to Vs - 1.5 RL = 10k to Vs/2 RL = 1k to Vs/2
78
2
0.2 to 2.35 2.5 to 5.5
2
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. NOTES:
1) For G = +1, Rf = 0. 2) 100% tested at +25C.
Absolute Maximum Ratings
supply voltage 0 to +6V maximum junction temperature +175C storage temperature range -65C to +150C lead temperature (10 sec) +260C operating temperature range (recommended) -40C to +85C input voltage range +Vs +0.5V; -Vs -0.5V internal power dissipation see power derating curves
Package Thermal Resistance
Package
8 lead SOIC 8 lead MSOP
JA
152C/W 206C/W
2
REV. 1 August 2001
KM4210
DATA SHEET
KM4210 Electrical Characteristics
PARAMETERS Case Temperature Frequency Domain Response -3dB bandwidth full power bandwidth gain bandwidth product Time Domain Response rise and fall time settling time to 0.1% overshoot slew rate Distortion and Noise Response 2nd harmonic distortion 3rd harmonic distortion THD input voltage noise crosstalk DC Performance input offset voltage average drift input bias current average drift input offset current power supply rejection ratio open loop gain quiescent current per channel Input Characteristics input resistance input capacitance input common mode voltage range common mode rejection ratio Output Characteristics output voltage swing linear output current short circuit output current power supply operating range
(Vs = +5V, G = 2, RL = 1k to Vs/2, Rf = 1k; unless noted) TYP +25C MIN & MAX UNITS +25C MHz MHz MHz MHz ns ns % V/s dBc dBc dB nV/Hz dB mV V/C A nA/C nA dB dB A M pF V dB V V mA mA V 1 NOTES
CONDITIONS
G = +1, Vo = 0.05Vpp G = +2, Vo < 0.2Vpp G = +2, Vo = 2Vpp 0.2V step 2V step 2V step, 2V step, G = -1 2Vpp, 1MHz 2Vpp, 1MHz 2Vpp, 1MHz >10kHz 100kHz
75 35 15 33 6 60 3 50 64 62 60 12 90 -1 10 1.2 3.5 30 65 80 505 9 1.5 -0.3 to 3.8 92 0.08 to 4.84 0.13 to 4.73 15 30 5
DC
DC, Vcm = 0V to Vs - 1.5 RL = 10k to Vs/2 RL = 1k to Vs/2
2.5 to 5.5
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. NOTES:
1) For G = +1, Rf = 0.
REV. 1 August 2001
3
DATA SHEET
KM4210
KM4210 Performance Characteristics (Vs = +5V, G = 2, RL = 1k to Vs/2, Rf = 1k; unless noted)
Non-Inverting Freq. Response Vs = +5V Normalized Magnitude (1dB/div)
G=1 Rf = 0 G=2 Rf = 1k
Inverting Freq. Response Vs = +5V Normalized Magnitude (1dB/div)
G = -2 Rf = 1k
G = 10 Rf = 1k
G = -10 Rf = 1k G = -5 Rf = 1k G = -1 Rf = 1k
G=5 Rf = 1k
0.1
1
10
100
0.1
1
10
100
Frequency (MHz) Non-Inverting Freq. Response Vs = +2.7V Normalized Magnitude (2dB/div) Normalized Magnitude (1dB/div)
G=1 Rf = 0 G=2 Rf = 1k
Frequency (MHz) Inverting Freq. Response Vs = +2.7V
G = -1 Rf = 1k
G = -2 Rf = 1k G = -10 Rf = 1k G = -5 Rf = 1k
G = 10 Rf = 2k G=5 Rf = 1k
0.1
1
10
100
0.1
1
10
100
Frequency (MHz) Frequency Response vs. CL
CL = 10pF Rs = 0
Frequency (MHz) Frequency Response vs. RL
RL = 1k
Magnitude (1dB/div)
CL = 100pF Rs = 100 CL = 50pF Rs = 100
+ 1k 1k Rs CL RL
CL = 20pF Rs = 100
Magnitude (1dB/div)
RL = 10k
RL = 100
0.1
1
10
100
0.1
1
10
100
Frequency (MHz) Large Signal Frequency Response
Vo = 1Vpp
Frequency (MHz) Frequency Response vs. Temperature
Magnitude (1dB/div)
Vo = 2Vpp
Vo = 4Vpp
0.1
Magnitude (1dB/div)
0.01
1
10
100
0.1
1
10
100
Frequency (MHz)
Frequency (MHz)
4
REV. 1 August 2001
KM4210
DATA SHEET
KM4210 Performance Characteristics (Vs = +5V, G = 2, RL = 1k to Vs/2, Rf = 1k; unless noted)
Open Loop Gain & Phase vs. Frequency
90 80 70 60 50 40 30 20 10 0 -10 100 1k 10k 100k 1M 10M
Phase
Input Voltage Noise
70 60 50 40 30 20 10 0 0.0001
0 -45 -90
-135 -180 100M
Voltage Noise (nV/Hz)
Open Loop Gain (dB)
|Gain|
Open Loop Phase (deg)
0.001
0.01
0.1
1
10
Frequency (Hz) 2nd & 3rd Harmonic Distortion; Vs = +5V
-20
Vo = 2Vpp
Frequency (MHz) 2nd & 3rd Harmonic Distortion; Vs = +2.7V
-20
Vo = 1Vpp
-30
3rd RL = 1k
-30
Distortion (dBc)
Distortion (dBc)
-40 -50 -60 -70 -80 -90 0 1
3rd RL = 150
-40 -50 -60 -70 -80 -90
3rd RL = 150
3rd RL = 1k
2nd RL = 1k 2nd RL = 150
2nd RL = 1k 2nd RL = 150
2
3
4
5
0
1
2
3
4
5
Frequency (MHz) 2nd Harmonic Distortion vs. Vo
-20 -30 -20 -30
Frequency (MHz) 3rd Harmonic Distortion vs. Vo
Distortion (dBc)
-50 -60 -70
500kHz 1MHz
Distortion (dB)
-40
-40 -50 -60
500kHz
-70 -80
1MHz 100kHz
-80
100kHz
-90 0.5 1 1.5 2 2.5
-90 0.5 1.0 1.5 2.0 2.5
Output Amplitude (Vpp) PSRR
0 -10 -20 -30 -40 -50 -60 -70 -80 100 1k 10k 100k 1M 10M 100M 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 100 1k
Output Amplitude (Vpp) CMRR
CMRR (dB)
PSRR (dB)
10k
100k
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
REV. 1 August 2001
5
DATA SHEET
KM4210
KM4210 Performance Characteristics (Vs = +5V, G = 2, RL = 1k to Vs/2, Rf = 1k; unless noted)
Output Current
3
Small Signal Pulse Response Vs = +5V Output Voltage (20mV/div)
Output Voltage (0.6V/div)
0
-3 50 0 -50
Time (10ns/div)
Output Current (10mA/div) Small Signal Pulse Response Vs = +2.7V Output Voltage (20mV/div) Output Voltage (0.5V/div) Time (10ns/div) Large Signal Pulse Response Vs = +5V
Time (10ns/div)
Output Swing; Vs = +2.7V; G = -1
2.7
Crosstalk vs. Frequency
-60 -65
Output Voltage (0.5V/div)
Crosstalk (dB)
0
-70 -75 -80 -85 -90 -95
Time (1s/div)
0.01
0.1
1
10
Frequency (MHz)
6
REV. 1 August 2001
KM4210
DATA SHEET
Magnitude (1dB/div)
General Description The KM4110 is a single supply, general purpose, voltage-feedback amplifier fabricated on a complementary bipolar process. The KM4110 offers 75MHz unity gain bandwidth, 50V/s slew rate, and only 505A supply current. It features a rail-to-rail output stage and is unity gain stable. The design utilizes a patent pending topology that provides increased slew rate performance. The common mode input range extends to 300mV below ground and to 1.2V below Vs. Exceeding these values will not cause phase reversal. However, if the input voltage exceeds the rails by more than 0.5V, the input ESD devices will begin to conduct. The output will stay at the rail during this overdrive condition. The design uses a Darlington output stage. The output stage is short circuit protected and offers "soft" saturation protection that improves recovery time. The typical circuit schematic is shown in Figure 1.
G=2 RL = 1k
Rf = 2k
Rf = 1k
0.1
1
10
100
Frequency (MHz)
Figure 2: Frequency Response vs. Rf Power Dissipation The maximum internal power dissipation allowed is directly related to the maximum junction temperature. If the maximum junction temperature exceeds 150C, some reliability degradation will occur. If the maximum junction temperature exceeds 175C for an extended time, device failure may occur. The KM4110 is short circuit protected. However, this may not guarantee that the maximum junction temperature (+150C) is not exceeded under all conditions. Follow the maximum power derating curves shown in Figure 3 to ensure proper operation.
p Maximum Power Dissipation (W)
2.0
+Vs 6.8F
+
In
+ Rg
0.01F Out Rf
KM4110
1.5
SOIC-8 lead
1.0
MSOP-8 lead
0.5
0 -50 -30 -10 10 30 50 70 90
Figure 1: Typical Configuration For optimum response at a gain of +2, a feedback resistor of 1k is recommended. Figure 2 illustrates the KM4110 frequency response with both 1k and 2k feedback resistors.
Ambient Temperature ( C)
Figure 3: Power Derating Curves Overdrive Recovery For an amplifier, an overdrive condition occurs when the output and/or input ranges are exceeded. The recovery time varies based on whether the input or output is overdriven and by how much the ranges are exceeded. The KM4110 will typically recover in less than 20ns from an overdrive condition. Figure 4 shows the KM4110 in an overdriven condition.
REV. 1 August 2001
7
DATA SHEET
KM4210
G=5
Output
Output Voltage (1V/div)
When evaluating only one channel, complete the following on the unused channel 1. Ground the non-inverting input 2. Short the output to the inverting input Refer to the evaluation board layouts shown in Figure 7 for more information. Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of this device:
Eval Board KEB006 KEB010 Description Dual Channel, Dual Supply 8 lead SOIC Dual Channel, Dual Supply 8 lead MSOP Products KM4210IC8 KM4210IM8
Input Voltage (0.5V/div)
Input
Time (200ns/div)
Figure 4: Overdrive Recovery Driving Capacitive Loads The Frequency Response vs. CL plot on page 4, illustrates the response of the KM4110 and KM4120. A small series resistance (Rs) at the output of the amplifier, illustrated in Figure 5, will improve stability and settling performance. Rs values in the Frequency Response vs. CL plot were chosen to achieve maximum bandwidth with less than 1dB of peaking. For maximum flatness, use a larger Rs.
Evaluation board schematics and layouts are shown in Figure 6 and Figure 7. The KEB006 evaluation board is built for dual supply operation. Follow these steps to use the board in a single supply application: 1. Short -Vs to ground 2. Use C3 and C4, if the -Vs pin of the KM4210 is not directly connected to the ground plane.
+ Rf Rg
Rs CL RL
Figure 5: Typical Topology for driving a capacitive load Layout Considerations General layout and supply bypassing play major roles in high frequency performance. Fairchild has evaluation boards to use as a guide for high frequency layout and to aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: Include 6.8F and 0.01F ceramic capacitors Place the 6.8F capacitor within 0.75 inches of the power pin I Place the 0.01F capacitor within 0.1 inches of the power pin I Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance I Minimize all trace lengths to reduce series inductances
I I
Figure 6: Evaluation Board Schematic
8
REV. 1 August 2001
KM4210
DATA SHEET
KM4210 Evaluation Board Layout
Figure 7a: KEB006 (top side)
Figure 7b: KEB006 (bottom side)
Figure 7c: KEB010 (top side)
Figure 7d: KEB010 (bottom side)
REV. 1 August 2001
9
DATA SHEET
KM4210
KM4210 Package Dimensions
SOIC-8
D e ZD C L 7 SYMBOL A1 B C D E e H h L A ZD A2 L MIN MAX 0.10 0.25 0.36 0.46 0.19 0.25 4.80 4.98 3.81 3.99 1.27 BSC 5.80 6.20 0.25 0.50 0.41 1.27 1.52 1.72 8 0 0.53 ref 1.37 1.57
SOIC
C L
E
H
Pin No. 1
B
DETAIL-A
h x 45
NOTE:
DETAIL-A 1. All dimensions are in millimeters. 2. Lead coplanarity should be 0 to 0.10mm (.004") max. 3. Package surface finishing: (2.1) Top: matte (charmilles #18~30). (2.2) All sides: matte (charmilles #18~30). (2.3) Bottom: smooth or matte (charmilles #18~30). 4. All dimensions excluding mold flashes and end flash from the package body shall not exceed o.152mm (.006) per side(d).
A
A1
A2
C
e
S
02
MSOP-8
t1 SYMBOL MIN A 1.10 A1 0.10 A2 0.86 D 3.00 D2 2.95 E 4.90 E1 3.00 E2 2.95 E3 0.51 E4 0.51 R 0.15 R1 0.15 t1 0.31 t2 0.41 b 0.33 b1 0.30 c 0.18 c1 0.15 01 3.0 02 12.0 03 12.0 L 0.55 L1 0.95 BSC aaa 0.10 bbb 0.08 ccc 0.25 e 0.65 BSC S 0.525 BSC MAX - 0.05 0.08 0.10 0.10 0.15 0.10 0.10 0.13 0.13 +0.15/-0.06 +0.15/-0.06 0.08 0.08 +0.07/-0.08 0.05 0.05 +0.03/-0.02 3.0 3.0 3.0 0.15 - - - - - -
MSOP
E/2 2X
-H-
R1 t2 R Gauge Plane
E1
3
7
0.25mm
-B-
2
03 b L1 c1 b1 Section A - A
5
L
01
E3 E4 1 2
2 4 6
ccc A B C c D2 A2
-C-
Detail A Scale 40:1 Detail A
E2
A b
aaa A bbb M A B C
-A-
A A E1 E
A1
D
3 4
NOTE:
1 All dimensions are in millimeters (angle in degrees), unless otherwise specified.
2 3 4 5 6 7
Datums - B - and - C - to be determined at datum plane - H - . Dimensions "D" and "E1" are to be determined at datum - H - . Dimensions "D2" and "E2" are for top package and dimensions "D" and "E1" are for bottom package. Cross sections A - A to be determined at 0.13 to 0.25mm from the leadtip. Dimension "D" and "D2" does not include mold flash, protrusion or gate burrs. Dimension "E1" and "E2" does not include interlead flash or protrusion.
10
REV. 1 August 2001
KM4210
DATA SHEET
Ordering Information
Model KM4210 KM4210 KM4210 KM4210 Part Number KM4210IC8 KM4210IC8TR3 KM4210IM8 KM4210IM8TR3 Package SOIC-8 SOIC-8 MSOP-8 MSOP-8 Container Rail Reel Rail Reel Pack Qty 95 2500 50 4000
Temperature range for all parts: -40C to +85C
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICES TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
(c) 2001 Fairchild Semiconductor Corporation


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