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| E5310Y Analog Clock IC with Melody Description The E5310Y is an integrated circuit in low-power CMOS technology for analog timers with high-quality melody and hourly chime output. Features D Digital synthesizer for high-quality melody sound D Mask-programmable melody ROM D Two sequences with 64 notes each or one sequence with 128 notes D Day/ night sound attenuation D Melody on/ off capability D 4.192-MHz on-chip quartz oscillator D Motor pulse output with a pulse lenght of 47 ms (31 ms available as option) D Hourly chime D Quarter or half hour melody mode Block Diagram OSCIN OSCOUT Tone driver ST Control H1_4 Counter Prescaler Timing generator Motor driver M1 M2 AMPIN BPNP BNPN D_N CH1_2 IA_ID Melody ROM Chime ROM Tone ROM D/A converter Envelope generator ENV2 ENV1 DAC Figure 1. Block diagram Ordering Information Extended Type Number E5310Yx Package SO28 Remarks Tube Rev. A1, 27-Sep-99 1 (7) E5310 Pin Description V3V BPNP BNPN VSS AMPIN DAC ENV1 ENV2 OSCIN 1 2 3 4 5 6 7 8 9 28 VDD 27 M1 26 M2 25 T4 24 T3 23 T2 22 T1 21 ID 20 IC 19 18 17 16 15 IB n.c. IA ST H1_4 OSCOUT 10 n.c. 11 CH1_2 12 D_N 13 n.c. 14 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Symbol V3V BPNP *) BNPN VSS AMPIN *) DAC ENV1 ENV2 OSCIN OSCOUT n.c. CH1_2 D_N n.c. H1_4 ST IA n.c. IB IC ID T1 T2 T3 T4 M2 M1 VDD Function Supply voltage 2 Speaker output Speaker output Supply reference Volume control D/A converter output Envelope adjust Envelope adjust Oscillator input Oscillator output Not connected Function select Function select Not connected Function select Function select Hourly chime programm. Not connected Hourly chime programm. Hourly chime programm. Hourly chime programm. Internal testpin Internal testpin Internal testpin Internal testpin Motor output 2 Motor output 1 Supply voltage 1 Figure 2. Pinning E5310Y *) These pins are not available for type E5310YA Absolute Maximum Ratings Parameters Supply voltage 1 Supply voltage 2 Input voltage range (on any pins) Output voltage Output current Power dissipation (DIL package) Operating ambient temperature range Storage temperature range Soldering temperature (tt10 s) Symbol VDD V3V VIN VOUT IOUT Ptot Tamb Tstg Tsd Value -0.3 to +2.0 V -0.3 to +4.0 V (VSS - 0.3 V) (VDD + 0.3 V) IN (VSS - 0.3 V) (VDD + 0.3 V) OUT 30 125 mW -10 to +60 -40 to +125 260 xV x xV x Unit V V V V mA mW C C C Absolute maximum ratings define parameter limits which, if exceeded, may permanently change or damage the device. All inputs and outputs in this circuit are protected against electrostatic discharges. However, precautions to minimize the build-up of electrostatic charges during handling are recommended. This circuit is protected against supply voltage reversal for typically 5 minutes. 2 (7) Rev. A1, 27-Sep-99 E5310Y Operating Characteristics VDD = 1.5 V, VSS = 0 V, Tamb = +25C; unless otherwise specified. All voltage levels are measured with reference to VSS. The current flowing into the device is positive. Parameters Test Conditions / Pins Symbol Min. Typ. Max. Unit Supply voltage 1 VDD 1.2 1.5 1.8 V Supply voltage 2 V3V 2.4 3.0 3.6 V Operating current Note 1 IDD 60 110 mA Motor outputs M1 and M2 Output current RL = 200 W, VDD = 1.2 V IM 3.5 4 mA Motor period tM 1 s Pulse width *) Mask option tPW 31.2 *) 46.8 ms Hour code input pins IA, IB, IC and ID Input current high VIN = VDD IIH 4 15 mA Control input pins D_N anf CH1_2 Input current high VIN = VDD IIH 1 4 mA Input current low VIN = VSS IIL -1 -4 mA Quartz oscillator Frequency fC 4.194 MHz Start-up time VDD = 1.2 V tStart 2 3 s Frequency stability DVDD = 100 mV Df/f 0.2 0.6 ppm E5310A Note 2 Output current BNPN = VSS IBNPN 0.2 0.5 mA E5310B Note 2 Output current BNPN = VSS, AMPIN = VSS IBNPN 0.25 mA p BPNP = VDD, AMPIN = VDD IBPNP -0.3 mA DAC = VDD IDAC 13 28 mA E5310C with V3V = 3 V Note 2 Output current BNPN = VSS, AMPIN = VSS IBNPN 2.0 mA p BPNP = 3 V, AMPIN = 3 V IBPNP 2.5 mA DAC = VDD IDAC 13 28 mA Note 1: This current is measured when the crystal oscillator is active, not in melody mode and no motor load Note 2: Output current measured with RENV2 = 560 kW and all tone ROM output bits = 1 Table 1. Truth Table for Hourly Chime ID 0 0 0 0 0 0 0 1 1 1 1 1 IC 0 0 0 IB 0 1 1 0 0 1 1 0 0 1 1 0 IA 1 0 1 0 1 0 1 0 1 0 1 0 Hour 1:00 2:00 3:00 4:00 5:00 6:00 7:00 8:00 9:00 10:00 11:00 12:00 Chimes 1 2 3 4 5 6 7 8 9 10 11 12 1 1 1 1 0 0 0 0 1 Rev. A1, 27-Sep-99 3 (7) E5310 Application Circuit Diagrams Using the E5310Y Function select according to switch position: CH1_2 CH1_2 CH1_2 D_N D_N D_N H1_4 H1_4 ST = = = = = = = = = VSS VDD open VSS VDD open Melody off Melody 1 (Westminster) Melody 2 (Bim-bam) No sound during night time Half volume level at night Same volume level for day and nigth VDD Chime on full hour only VSS or open 1/4, 2/4, 3/4 and 4/4 h chime VSS>VDD Positive edge trigger for hourly chime +1.5V Hour code VDD 4.192MHz OSCIN OSCOUT DAC 50k Vol 560k ENV2 0.56 VSS CH1_2 D_N H1_4 BNPN ST ENV1 M2 V3V IA IB IC ID M1 M +1.5V E5310YA 4.7 +1.5V Figure 3. Class A output buffer at supply voltage of 1.5 V 4 (7) Rev. A1, 27-Sep-99 E5310Y +1.5V 100p 560k Hour code VDD AMPIN M 820p 560n 560k ENV2 OSCIN OSCOUT VSS CH1_2 D_N H1_4 BNPN ST DAC ENV1 M2 +1.5V V3V IA IB IC ID M1 120k 47n Vol 50k E5310YB BPNP 470p 470p 220 +1.5V Figure 4. Class B output buffer at supply voltage of 1.5 V 1M 100p 120k 10n Vol 50k +1.5V +3V Hour code VDD AMPIN M +3V DAC ENV1 M2 V3V IA IB IC ID M1 820p 560n 560k E5310YC ENV2 OSCIN OSCOUT VSS CH1_2 D_N H1_4 BPNP 1n 1n BNPN ST 220 +1.5V Figure 5. Class B output buffer at supply voltage of 3 V Rev. A1, 27-Sep-99 5 (7) E5310 16 15 14 13 12 11 10 17 9 18 19 8 E5310Y 7 6 20 21 5 22 23 24 25 1 2 3 4 Pad size = 90 mm 90 mm Chip size = 2.33 mm 2.22 mm = 5.17 mm2 Figure 6. Pad layout of the E5310 chip Table 2. Pad coordinates Pad Number 1 2 3 4 5 6 7 8 9 10 11 12 13 Pin Name V3V BPNP BNPN VSS AMPIN DAC ENV1 ENV2 OSCIN OSCOUT CH1_2 D_N H1_4 X Position 97 266 788 952 954 954 954 954 954 954 602 434 -12 Y Position -986 -986 -986 -986 -803 -426 -258 119 287 845 985 985 985 Pad Number 14 15 16 17 18 19 20 21 22 23 24 25 Pin Name ST IA IB IC ID T1 T2 T3 T4 M2 M1 VDD X Position -180 -557 -956 -954 -954 -954 -954 -954 -954 -763 -241 -73 Y Position 985 985 985 479 102 -66 -443 -611 -986 -986 -986 -986 6 (7) Rev. A1, 27-Sep-99 E5310Y Package Information Package SO28 Dimensions in mm 18.05 17.80 9.15 8.65 7.5 7.3 2.35 0.4 1.27 28 16.51 15 0.25 0.10 0.25 10.50 10.20 technical drawings according to DIN specifications 1 14 We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify TEMIC Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2594, Fax number: 49 ( 0 ) 7131 67 2423 Rev. A1, 27-Sep-99 7 (7) |
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