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High Power DP3T Switch with Logic Control
Preliminary
PreliminaryCXG1215UR
Description
The CXG1215UR can be used in wireless communication systems, for example, dual-band CDMA handsets. This IC has on-chip logic for operation with 3 COMS control inputs. The Sony JPHEMT process is used for low insertion loss and on-chip logic circuit. (Applications: Antenna switch for cellular handsets, dual-band CDMA)
Features
Low insertion loss: 0.35dB@900MHz, 0.5dB@2GHz 3 CMOS compatible control line
Package
Small package size: 16-pin UQFN
Structure
GaAs JPHEMT MMIC
Absolute Maximum Ratings
(Ta = 25C) Input power max (RF port) Bias voltage Control voltage Operating temperature Storage temperature Pin VDD Vctl Topr Tstg 37 7 5 -35 to +85 -65 to +150 dBm V V
C C
This IC is ESD sensitive device. Special handling precautions are required. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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PE06233
CXG1215UR
Block Diagram and Recommended Circuit
RF2(2GHz)
CRF 14 GND 13 RF1 (800MHz) 12 F7 11 GND CRF
GND
16 RF5(Ext) 1 CRF GND 2 F11
GND 15 F4
F8
F3 F2 F1 F6
RF4(Ant) 3 CRF GND 4
RF3 (GPS) 10 F9 9 GND CRF
F5 F10
5 VDD
6 CTLA
7 CTLB
8 CTLC
When using this IC, the following external components should be used: CRF: This capacitor is used for RF decoupling and must be used for all applications. Cbypass: This capacitor is used for DC line filtering.
Truth Table
State CTLA CTLB CTLC 1 2 3 4 5 6 L L H L L H L H L L H L H H H L L L ON state F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11
RF4 - 1 (Ant-800MHz) ON OFF OFF OFF OFF OFF OFF ON RF4 - 2 (Ant-2GHz) RF4 - 3 (Ant-GPS)
Cbypass (1000pF)
ON OFF ON
OFF OFF ON OFF OFF OFF ON OFF ON OFF ON OFF OFF OFF OFF ON OFF ON ON OFF OFF ON ON ON OFF
RF5 - 1 (EXT-800MHz) OFF ON OFF OFF OFF OFF OFF ON RF5 - 2 (EXT-2GHz) RF5 - 3 (EXT-GPS)
OFF OFF OFF ON OFF OFF ON OFF ON ON OFF OFF OFF OFF OFF OFF ON ON ON OFF ON OFF
DC Bias Conditions
(Ta = 25C) Item Vctl (H) Vctl (L) VDD Min. 2.0 0 2.6 Typ. 2.6 -- 2.85 Max. 3.2 0.5 3.2 Unit V V V
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CXG1215UR
Electrical Characteristics (Target Specifications)
(Ta = 25C) Item Symbol Condition 830 to 930MHz Insertion loss IL 1.525GHz 1.92 to 2.17GHz 830 to 930MHz Isolation ISO 1.525GHz 1.92 to 2.17GHz VSWR Switching speed 1dB compression input power VSWR TSW P1dB 2fo Harmonics 3fo 2fo 3fo Input IP3 Bias current Control current
*1 *2 *3 *4
Min.
Typ. 0.35 0.40 0.50
Max. 0.50 0.55 0.65
Unit dB dB dB dB dB dB
25 23 20
30 30 30 1.2 5 1.4 10
50
-- s dBm
VDD = 2.85V
*1 *1 *2 *2 *3
32 -70 -70 -65 -65 55 55 60 60 150 15 190 20 -65 -65 -60 -60
dBc dBc dBc dBc dBm dBm A A
IP3 Idd Ictl
*4
VDD = 2.85V Vctl(H) = 2.6V
Pin = 25dBm, 0/2.6V control, VDD = 2.85V, 890 to 930MHz Pin = 25dBm, 0/2.6V control, VDD = 2.85V, 1.92 to 1.98GHz Pin = 25dBm (900MHz) + 25dBm (901MHz), 0/2.6V control, VDD = 2.85V Pin = 25dBm (1.9GHz) + 25dBm (1.901GHz), 0/2.6V control, VDD = 2.85V
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CXG1215UR
Package Outline
(Unit: mm)
16PIN UQFN
PLASTIC
x4 0.1 S 0.4 0.1 A-B C
2.3
0.55 0.05
0.9 C 4-R0.2
12 13
9 8 2.3
A
B
16 1 4
5
0.4 0.18 PIN 1 INDEX 0.07 0.25 0.05 M S A-B C Thermal Die Pad
0.14
0. 26
0.05
S
S
Solder Plating + 0.09 0.14 - 0.03 + 0.09 0.25 - 0.03
MAX0.02
S
TERMINAL SECTION
Note:Cutting burr of lead are 0.05mm MAX.
SONY CODE EIAJ CODE JEDEC CODE UQFN-16P-01
PACKAGE STRUCTURE
PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.01g
LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18m
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Sony Corporation

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