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300mA LDO Linear Regulator with P Reset General Description The AAT3258 combines a high performance, low noise, 300mA Low Dropout Linear Regulator with a Microprocessor Reset Monitor. The 300mA output capability of the LDO regulator makes this device ideal for use with microprocessors and DSP cores in portable products. The microprocessor reset monitor section has very low quiescent current consumption and has an active low reset output. The AAT3258 has separate input pins for the reset monitor and LDO regulator so they may be operated from independent sources for increased design flexibility. This device features very low quiescent current, typically less than 71A. The LDO regulator has low dropout voltage, typically 400mV at the full output current level, making it ideal for portable applications where extended battery life is critical. The AAT3258 LDO regulator section has complete over current/short circuit and over temperature protection circuits to guard against extreme operating conditions. The device also has an active output pull down function when disabled. The AAT3258 is available in a space saving 8-pin TSOPJW package. This device is capable of operation over a -40C to 85C temperature range. AAT3258 Features * * * * * * * * * * * * * * * * PowerLinearTM Integrated LDO regulator with P Reset 300mA output LDO regulator Low Dropout Regulator, 400mV at 300mA High LDO output voltage accuracy, typically 1.5% Very low noise and high PSRR LDO Low Quiescent Current at 71A LDO over current/short circuit protection LDO over-temperature protection LDO power saving shutdown mode Independent device power inputs High accuracy reset monitor threshold: 1.5% Active low push-pull monitor reset output < 2.0 A of shutdown current Uses low ESR ceramic capacitors -40 to +85C Temperature range 8-pin TSOPJW package Applications * * * * * * * Microprocessor/DSP Core/IO Power Cellular Phones Notebook Computers PDAs and Handheld Computers Digital Cameras Portable Communication Devices Handheld instrumentation Typical Application 100k VIN VDET RESET RESET OUT VIN P Reset Manual Reset VOUT LDO VOUT AAT3258 MR GND 1F LDO Shutdown SHDN BYP 10nF 2.2F 3258.2004.08.1.4 1 300mA LDO Linear Regulator with P Reset Pin Descriptions Pin # 1 2 AAT3258 Symbol VIN SHDN Function LDO Voltage regulator input pin. It should be decoupled with 1F or greater capacitor. See application information. LDO Voltage regulator shutdown pin. This pin should not be left floating. When connected to low, all the internal circuitry is powered down. When high, it is in normal operation. Microprocessor reset input power supply pin. It may be connected to VIN Manual reset active low input. A logic low signal on MR asserts a reset condition. Asserted reset continues as long as MR is low and for minimum of 150 ms after MR returns high. Reset output remains low while VDET is below the reset threshold and remains so for a minimum of 150 ms after VDET rises above the reset threshold. Ground connection pin LDO voltage regulator bypass capacitor connection. To improve AC ripple rejection and decrease LDO regulator self noise, connect a 10nF ceramic capacitor between this pin and GND. LDO voltage regulator output pin - should be decoupled with a 2.2F or greater value low ESR ceramic capacitor. 3 4 VDET MR 5 6 7 RESET GND BYP 8 OUT Pin Configuration TSOPJW-8 (Top View) VIN SHDN VDET MR 1 8 OUT BYP GND RESET 2 7 3 6 4 9 2 3258.2004.08.1.4 300mA LDO Linear Regulator with P Reset Absolute Maximum Ratings Symbol VIN VRESET VSHDNIN(MAX) IOUT IRESET VDET/t TJ AAT3258 (TA=25C unless otherwise noted) Value 6.0 -0.3 to VDET+0.3 0.3 PD/(VIN-VO) 20 100 -40 to 150 Description Input Voltage RESET to GND Maximum SHDN to Input Voltage LDO Regulator DC Output Current Maximum Reset Output Current Maximum rate of VDET rise Operating Junction Temperature Range Units V V V mA mA V/s C Note: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any one time. Thermal Information Symbol JA PD Description Maximum Thermal Resistance (TSOPJW-8) Maximum Power Dissipation 1 (TSOPJW-8) 1 Value 150 833 Units C/W mW Note 1: Mounted on a demo board. Recommended Operating Conditions Symbol VIN VDET T Description Input Voltage to LDO 2 Input Voltage to P Reset (0 to 70C) Ambient Temperature Range Value (VOUT+VDO) to 5.5 1.0 to 5.5 -40 to +85 Units V V C Note 2: To calculate minimum input voltage, use the following equation: VIN(MIN) = VOUT(MAX) + VDO(MAX) as long as VIN 2.5V. 3258.2004.08.1.4 3 300mA LDO Linear Regulator with P Reset Electrical Characteristics Symbol VOUT IOUT ISC IGND ISHDN VOUT/VOUT*VIN VOUT (line) VOUT (line) TENDLY VDO VIL VIH IIL IIH PSRR TSD THYS eN TC AAT3258 (TJ = 25C unless otherwise noted) Conditions IOUT = 1mA TA = 25C to 300mA TA = -40C to 85C VOUT > 1.2V VOUT < 0.4V VIN = 5V, no load, SHDN = VIN VIN = 5V, SHDN = 0V VIN = VOUT + 1 to 5.0V IOUT = 300mA, TR/TR = 2s, VIN = VOUT + 1V to VOUT + 2V IOUT = 1mA to 300mA, TR < 5s BYP = open IOUT = 300mA Description Output Voltage Output Current Short Circuit Current Ground Current Shutdown Current Line Regulation Dynamic Line Regulation Dynamic Load Regulation Enable Delay Time Dropout Voltage 1 Input low Voltage Input high Voltage Input low current Input high current Power Supply Rejection Ratio Min -1.5 -2.5 300 Typ Max Units 1.5 2.5 600 70 125 1.0 0.09 2.5 60 15 400 600 0.6 % mA mA A A %/V mV mV s mV V V A A dB C C VRMS/ Hz ppm/C 300mA LDO Regulator 1.5 1.0 1.0 1kHz IOUT = 10mA, 10kHz CBYP = 10nF 1MHz 67 47 45 145 12 50 22 Over Temp Shutdown Threshold Over Temp Shutdown Hysteresis Output Noise eNBW = 300Hz to 50kHz Output Voltage Temp. Coeff. Note 1: VDO is defined as VIN - VOUT when VOUT is 98% of nominal. Note: The specifications are guaranteed to meet performance specification over the -40C to 85C operating temperature range and are assured by design, characterization and correlation with statistical process controls. 4 3258.2004.08.1.4 300mA LDO Linear Regulator with P Reset Electrical Characteristics Symbol VDET IQ IDD IDOFF VTH VTH/C TP TRDY TMR MRGI RMR TMD VIH VIL VOL AAT3258 (T = 25C unless otherwise noted) Conditions TA = 0C to +70C TA = -40C to +85C VCC = 5.5V VCC = 3.0V VDET = 3.0V VDET > VTH AAT3258xxx-x.x-R TA = 25C AAT3258xxx-x.x-Y VDET=VTH to (VTH-100mV) 150 10 30 Description Input Voltage Range Quiescent Current Operating Supply Current Reset Leakage Current Reset Threshold Voltage RESET Threshold Tempco Reset Propagation Delay Reset Active Timeout Period MR Minimum Pulse Width MR Glitch Immunity MR Pull-Up Resistance MR to Reset Propagation Delay MR Input Threshold MR Input Threshold Reset Low Voltage Min 1 1.2 Typ Max 5.5 5.5 3.0 2.0 2.0 1.0 2.67 2.49 Units V A A A V ppm/C s ms s ns k s V V V Microprocessor Reset Monitor 1.05 0.85 0.85 2.59 2.41 2.63 2.45 40 15 250 100 65 0.5 400 90 VOH Reset High Voltage VDET = VTH(MAX) 0.7 x VDET VDET = VTH(MAX) ISINK = 1.2mA, VDET = VTH(MIN), VTH 3.08V, reset asserted ISINK = 3.2mA, VDET = VTH(MIN), VTH > 3.08V, reset asserted ISOURCE = 800A, VDET > 3.08V, VDET-1.5 VDET > VTH(MAX) 0.8*VDET ISOURCE = 500A, VDET > VTH(MAX), VTH 3.08V 0.25 x VDET 0.3 0.4 V Note: The specifications are guaranteed to meet performance specification over the -40C to 85C operating temperature range and are assured by design, characterization and correlation with statistical process controls. 3258.2004.08.1.4 5 300mA LDO Linear Regulator with P Reset Typical Characteristics AAT3258 (Unless otherwise noted, VIN = 5V, TA = 25C) Dropout Voltage vs. Temperature 3.20 Dropout Characteristics 540 Dropout Voltage (mV) 480 420 IL = 300mA 3.00 2.80 IOUT = 0mA 300 240 180 120 60 0 V OUT (V) 360 IL = 150mA IL = 100mA 2.60 2.40 2.20 2.00 2.70 IOUT = 300mA IOUT = 150mA IOUT = 10mA 2.80 IOUT = 100mA IOUT = 50mA IL = 50mA -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 2.90 3.00 3.10 3.20 3.30 Temperature (C) VIN (V) Dropout Voltage vs. Output Current 90.00 500 450 80.00 70.00 60.00 Ground Current vs. Input Voltage Dropout Voltage (mV) 400 IGND (A) 350 300 250 200 150 100 50 0 0 50 100 150 200 250 300 85C 25C -40C 50.00 40.00 30.00 20.00 10.00 0.00 2 2.5 3 IOUT=300mA IOUT=0mA IOUT=150mA IOUT=50mA IOUT=10mA 3.5 4 4.5 5 Output Current (mA) VIN (V) Quiescent Current vs. Temperature 100 Output Voltage vs. Temperature 1.203 1.202 Quiescent Current (A) 90 Output Voltage (V) -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 80 70 60 50 40 30 20 10 0 1.201 1.200 1.199 1.198 1.197 1.196 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 Temperature (C) Temperature (C) 6 3258.2004.08.1.4 300mA LDO Linear Regulator with P Reset Typical Characteristics AAT3258 (Unless otherwise noted, VIN = 5V, TA = 25C) Initial Power Up Response Time CBYP=10nF VSHDN (5V/div) Turn-OFF Response Time CBYP=10nF VSHDN (5V/div) VOUT (1V/div) 400s/div VOUT (1V/div) 50 s/div Turn-ON Time From Enable (VIN present) CBYP = 10nF 6 Line Transient Response 3.04 3.03 3.02 VSHDN (5V/div) 5 4 3 2 VIN V IN (V) V OUT (V) 3.01 3.00 VOUT VOUT = 1V/div 5 s/div VIN = 4V 1 0 2.99 2.98 100s/div Load Transient Response 2.90 2.85 2.80 500 3.00 Load Transient Response 300mA 800 700 VOUT 400 300 200 100 0 2.90 2.80 VOUT (V) 2.70 VOUT 600 500 2.75 2.70 2.65 VOUT (V) I OUT (mA) IOUT (mA) 2.60 2.50 2.40 2.30 2.20 2.10 400 300 200 IOUT 2.60 -100 IOUT 100 0 -100 100S/div 10 s/div 3258.2004.08.1.4 7 300mA LDO Linear Regulator with P Reset Typical Characteristics AAT3258 (Unless otherwise noted, VIN = 5V, TA = 25C) AAT3258 Self Noise COUT = 10F (ceramic) Noise Amplitude (V/rtHz) 10 800 1 0.1 Band Power: 300Hz to 50kHz = 44.6Vrms/rtHz 100Hz to 100kHz = 56.3Vrms/rtHz 0.1 1 10 100 1000 10000 Over Current Protection 1200 1000 IOUT (mA) 600 400 200 0 -200 0.01 0.001 0.01 Time (20 ms/div) Frequency (kHz) LDO SHDN VIH and V IL vs. VIN 1.250 Normalized Reset Threshold vs. Temperature Normalized Threshold 1.003 1.002 1.001 1.000 0.999 0.998 0.997 -40 -20 0 20 40 60 80 1.225 1.200 1.175 1.150 1.125 1.100 1.075 1.050 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIH VIL VIN (V) Temperature (C) Power-Up Reset Timeout vs. Temperature 300 Power-Down Reset Propagation Delay vs. Temperature Reset Propagation Delay (s) 30 25 20 15 10 5 0 -40 320 Power-Up Reset Timeout (ms) 280 260 240 220 200 180 160 -40 -20 0 20 40 60 80 100 VOD=10mV VOD=100mV Temperature (C) -20 0 20 40 60 80 Temperature (C) 8 3258.2004.08.1.4 300mA LDO Linear Regulator with P Reset Typical Characteristics AAT3258 (Unless otherwise noted, VIN = 5V, TA = 25C) Maximum Transient Duration vs. Reset Threshold Overdrive 400 Maximum Transient Duration (S) 350 300 250 200 150 100 50 0 1 10 100 1000 Reset Threshold Overdrive, VTH-VCC (mV) 3258.2004.08.1.4 9 300mA LDO Linear Regulator with P Reset Functional Block Diagram VIN Over - Current Protection Over Temperature Protection Error Amplifier + AAT3258 OUT Voltage Reference BYP SHDN VDET MR + - Reset Generator and Timer RESET Voltage Reference Oscillator GND Functional Description The AAT3258 is intended for LDO regulator applications where output current load requirements range from no load to 300mA. The advanced circuit design of the AAT3258 has been specifically optimized for very fast start-up and shutdown timing. This proprietary CMOS LDO has also been tailored for superior transient response characteristics. These traits are particularly important for applications, which require fast power supply timing, such as GSM cellular telephone handsets. The high-speed turn-on capability is enabled through the implementation of a fast start control circuit, which accelerates the power up behavior of fundamental control and feedback circuits within the LDO regulator. Fast turn-off time response is achieved by an active output pull down circuit, which is enabled when the LDO regulator is placed in the shutdown mode. This active fast shutdown circuit has no adverse effect on normal device operation. The AAT3258 has very fast transient response characteristics, which is an important feature for applications where fast line and load transient response is 10 required. This rapid transient response behavior is accomplished through the implementation of an active error amplifier feedback control. This proprietary circuit design is unique to this MicroPowerTM LDO regulator. The LDO regulator output has been specifically optimized to function with low cost, low ESR ceramic capacitors. However, the design will allow for operation over a wide range of capacitor types. A bypass pin has been provided to allow the addition of an optional voltage reference bypass capacitor to reduce output self noise and increase power supply ripple rejection. Device self noise and PSRR will be improved by the addition of a small ceramic capacitor in this pin. However, increased values of CBYPASS may slow down the LDO regulator turn-on time. This LDO regulator has complete short circuit and thermal protection. The integral combination of these two internal protection circuits give the AAT3258 a comprehensive safety system to guard against extreme adverse operating conditions. Device power dissipation is limited to the package type and thermal dissipation properties. Refer to the thermal considerations discussion in the section for details on device operation at maximum output current loads. 3258.2004.08.1.4 300mA LDO Linear Regulator with P Reset The microprocessor reset section monitors the supply voltage to a microprocessor and assert a reset signal whenever the VDET voltage falls below a factory programmed threshold. This threshold is accurate within +/-1.5% at 25C. The reset signal remains asserted for a minimum of 150ms after VDET has risen above the threshold as shown in Figure 1. To assure the maximum possible performance is obtained from the AAT3258, please refer to the following application recommendations. AAT3258 VTH VDET VTH VTH RESET tRDY tRDY Figure 1 LDO Regulator Applications Information Input Capacitor Typically a 1F or larger capacitor is recommended for CIN in most applications. A CIN capacitor is not required for basic LDO regulator operation. However, if the AAT3258 is physically located more than 3 centimeters from an input power source, a CIN capacitor will be needed for stable operation. CIN should be located as close to the device VIN pin as practically possible. CIN values greater than 1F will offer superior input line transient response and will assist in maximizing the highest possible power supply ripple rejection. Ceramic, tantalum or aluminum electrolytic capacitors may be selected for CIN. There is no specific capacitor ESR requirement for CIN. However, for 300mA LDO regulator output operation, ceramic capacitors are recommended for CIN due to their inherent capability over tantalum capacitors to withstand input current surges from low impedance sources such as batteries in portable devices. Output Capacitor For proper load voltage regulation and operational stability, a capacitor is required between pins VOUT and GND. The COUT capacitor connection to the LDO regulator ground pin should be made as direct as practically possible for maximum device performance. The AAT3258 has been specifically designed to function with very low ESR ceramic capacitors. For best performance, ceramic capacitors are recommended. Typical output capacitor values for maximum output current conditions range from 1F to 10F. Applications utilizing the exceptionally low output noise and optimum power supply ripple rejection characteristics of the AAT3258 should use 2.2F or greater for COUT. If desired, COUT may be increased without limit. In low output current applications where output load is less then 10mA, the minimum value for COUT can be as low as 0.47F. 3258.2004.08.1.4 11 300mA LDO Linear Regulator with P Reset Bypass Capacitor and Low Noise Applications A bypass capacitor pin is provided to enhance the low noise characteristics of the AAT3258 LDO regulator. The bypass capacitor is not necessary for operation. However, for best device performance, a small ceramic capacitor should be placed between the Bypass pin (BYP) and the device ground pin (GND). The value of CBYP may range from 470pF to 10nF. For lowest noise and best possible power supply ripple rejection performance a 10nF capacitor should be used. To practically realize the highest power supply ripple rejection and lowest output noise performance, it is critical that the capacitor connection between the BYP pin and GND pin be direct and PCB traces should be as short as possible. Refer to the PCB Layout Recommendations section of this document for examples. There is a relationship between the bypass capacitor value and the LDO regulator turn on time and turn off time. In applications where fast device turn on time and turn off time is desired, the value of CBYP should be reduced. In applications where low noise performance and/ or ripple rejection are less of a concern, the bypass capacitor may be omitted. The fastest device turn on time will be realized when no bypass capacitor is used. DC leakage on this pin can affect the LDO regulator output noise and voltage regulation performance. For this reason, the use of a low leakage, high quality ceramic (NPO or COG type) or film capacitor is highly recommended. Equivalent Series Resistance (ESR): ESR is a very important characteristic to consider when selecting a capacitor. ESR is the internal series resistance associated with a capacitor, which includes lead resistance, internal connections, size and area, material composition and ambient temperature. Typically capacitor ESR is measured in milliohms for ceramic capacitors and can range to more than several ohms for tantalum or aluminum electrolytic capacitors. Ceramic Capacitor Materials: Ceramic capacitors less than 0.1F are typically made from NPO or COG materials. NPO and COG materials are typically tight tolerance very stable over temperature. Larger capacitor values are typically composed of X7R, X5R, Z5U and Y5V dielectric materials. Large ceramic capacitors, typically greater then 2.2F are often available in the low cost Y5V and Z5U dielectrics. These two material types are not recommended for use with LDO regulators since the capacitor tolerance can vary more than 50% over the operating temperature range of the device. A 2.2F Y5V capacitor could be reduced to 1F over temperature, this could cause problems for circuit operation. X7R and X5R dielectrics are much more desirable. The temperature tolerance of X7R dielectric is better than 15%. Capacitor area is another contributor to ESR. Capacitors which are physically large in size will have a lower ESR when compared to a smaller sized capacitor of an equivalent material and capacitance value. These larger devices can improve circuit transient response when compared to an equal value capacitor in a smaller package size. Consult capacitor vendor data sheets carefully when selecting capacitors for LDO regulators. AAT3258 Capacitor Characteristics Ceramic composition capacitors are highly recommended over all other types of capacitors. Ceramic capacitors offer many advantages over their tantalum and aluminum electrolytic counterparts. A ceramic capacitor typically has very low ESR, is lower cost, has a smaller PCB footprint and is non-polarized. Line and load transient response of the LDO regulator is improved by using low ESR ceramic capacitors. Since ceramic capacitors are non-polarized, they are not prone to incorrect connection damage. Shutdown Function The shutdown pin is designed to turn off the LDO regulator when the device is not in use. This pin is active high and is compatible with CMOS logic. To assure the LDO regulator will switch on, the SHDN turn on control level must be greater than 1.5 volts. The LDO regulator will go into the disable shutdown mode when the voltage falls below 0.6 volts. If the shutdown function is not needed in a specific application, it may be tied to VIN to keep the LDO regulator in a continuously on state. 12 3258.2004.08.1.4 300mA LDO Linear Regulator with P Reset When the LDO regulator is in the shutdown mode, an internal 1.5k resistor is connected between VOUT and GND. This is intended to discharge COUT when the LDO regulator is disabled. The internal 1.5k has no adverse effect on device turn on time. parasitic diode and allow excessive current flow into the VOUT pin possibly damaging the LDO regulator. In applications where there is a possibility of VOUT exceeding VIN for brief amounts of time during normal operation, the use of a larger value CIN capacitor is highly recommended. A larger value of CIN with respect to COUT will effect a slower CIN decay rate during shutdown, thus preventing VOUT from exceeding VIN. In applications where there is a greater danger of VOUT exceeding VIN for extended periods of time, it is recommended to place a Schottky diode across VIN to VOUT (connecting the cathode to VIN and anode to VOUT). The Schottky diode forward voltage should be less than 0.45 volts. AAT3258 Short Circuit Protection The LDO regulator section contains an internal short circuit protection circuit that will trigger when the output load current exceeds the internal threshold limit. Under short circuit conditions the output of the LDO regulator will be current limited until the short circuit condition is removed from the output or LDO regulator package power dissipation exceeds the device thermal limit. Thermal Protection The AAT3258 has an internal thermal protection circuit which will turn on when the device die temperature exceeds 145C. The internal thermal protection circuit will actively turn off the LDO regulator output pass device to prevent the possibility of over temperature damage. The LDO regulator output will remain in a shutdown state until the internal die temperature falls back below the 145C trip point. The combination and interaction between the short circuit and thermal protection systems allow the LDO regulator to withstand indefinite short circuit conditions without sustaining permanent damage. Micro Power Supervisory Circuit Applications Information Reset Output Options The reset pin is an active low push-pull output. In the event of a power down or brown-out condition the reset signal remains valid until the VDET drops below 1.2V. Manual Reset Input A logic low signal on MR asserts a reset condition. Reset continues to be asserted as long as MR is low and for a minimum of 150ms after MR returns high. This input is internally pulled up to VCC via a 20k resistor, so leaving the pin unconnected is acceptable if manual reset function is not needed. The MR input is internally debounced which allows use of a mechanical switch. It should be a normally-open momentary switch connected from MR to GND. Additionally, the MR pin can be driven from TTL, CMOS, or open drain logic outputs. No-Load Stability The LDO regulator is designed to maintain output voltage regulation and stability under operational no-load conditions. This is an important characteristic for applications where the output current may drop to zero. Reverse Output to Input Voltage Conditions and Protection Under normal operating conditions a parasitic diode exists between the output and input of the LDO regulator. The input voltage should always remain greater then the output load voltage maintaining a reverse bias on the internal parasitic diode. Conditions where VOUT might exceed VIN should be avoided since this would forward bias the internal Supply Voltage Transient Behavior In some cases fast negative transients of short duration can appear on the VCC power supply. The AAT3258 series device provides some immunity to line transients which can generate invalid reset pulses. Figure 1 shows typical behavior to short 3258.2004.08.1.4 13 300mA LDO Linear Regulator with P Reset duration pulses verses RESET comparator overdrive. As shown in the Maximum Transient Duration vs. Reset Threshold Overdrive graph, when the transient voltage becomes larger, the time allowed before asserting a reset becomes shorter. e.g. typically a transient of 100mV below the reset threshold would have to present for more than 50s to cause a reset. Immunity can be increased by the addition of a small by-pass capacitor of 0.1F connected as close to the VCC pin as possible. AAT3258 VCC VCC VDET 0.1F MR RESET RESET uP INPUT GND GND Figure 2 14 3258.2004.08.1.4 300mA LDO Linear Regulator with P Reset Evaluation Board Layout The AAT3258 evaluation layout follows the recommend printed circuit board layout procedures and can be used as an example for good application layouts. Note: Board layout shown is not to scale. AAT3258 Figure 3: Evaluation board component side layout Figure 4: Evaluation board solder side layout Figure 5: Evaluation board top side silk screen layout / assembly drawing 3258.2004.08.1.4 15 300mA LDO Linear Regulator with P Reset Ordering Information Package TSOPJW-8 TSOPJW-8 TSOPJW-8 TSOPJW-8 Reset Threshold Voltage 2.63V 2.45V 2.63V 2.63V LDO Regulator 2.80V 2.80V 3.0V 3.3V Marking1 IIXYY IHXYY MEXYY MXXYY Part Number (Tape and Reel) AAT3258ITS-2.8-R-T1 AAT3258ITS-2.8-Y-T1 AAT3258ITS-3.0-R-T1 AAT3258ITS-3.3-R-T1 AAT3258 Note: Sample stock is held on part numbers listed in bold. Consult the factory for any additional reset or low dropout voltages. Note 1: XYY = assembly and date code. Package Information TSOPJW-8 0.325 0.075 2.40 0.10 0.65 BSC 0.65 BSC 0.65 BSC 2.85 0.20 7 3.025 0.075 0.9625 0.0375 1.0175 0.0925 0.04 REF 0.055 0.045 0.010 0.15 0.05 0.45 0.15 2.75 0.25 All dimensions in millimeters. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. AnalogicTech warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with AnalogicTech's standard warranty. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. Advanced Analogic Technologies, Inc. 830 E. Arques Avenue, Sunnyvale, CA 94085 Phone (408) 737-4600 Fax (408) 737-4611 16 3258.2004.08.1.4 |
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