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 INTEGRATED CIRCUITS
DATA SHEET
74HC3G07; 74HCT3G07 Buffers with open-drain outputs
Product specification File under Integrated Circuits, IC06 2003 Aug 21
Philips Semiconductors
Product specification
Buffers with open-drain outputs
FEATURES * Wide supply voltage range from 2.0 to 6.0 V * Symmetrical output impedance * High noise immunity * Low power dissipation * ESD protection: 2000 V Human Body Model (A 114-A) 200 V Machine Model (A 115-A). * Balanced propagation delays * Very small 8 pins package. DESCRIPTION
74HC3G07; 74HCT3G07
The 74HC3G/HCT3G07 is a high-speed Si-gate CMOS device. Specified in compliance with JEDEC standard no. 7A. The 74HC3G/HCT3G07 provides three non-inverting buffers. The outputs of the 74HC3G/HCT3G07 devices are open drains and can be connected to other open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. For digital operation this device must have a pull-up resistor to establish a logic HIGH-level.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 6.0 ns. TYPICAL SYMBOL tPZL tPLZ CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total switching outputs; (CL x VCC2 x fo) = sum of outputs. 2. For HC3G the condition is VI = GND to VCC. For HCT3G the condition is VI = GND to VCC - 1.5 V. FUNCTION TABLE See note 1. INPUTS nA L H Note 1. H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. OUTPUTS nY L Z PARAMETER propagation delay nA to nY propagation delay nA to nY input capacitance power dissipation capacitance notes 1 and 2 CONDITIONS HC3G CL = 50 pF; VCC = 4.5 V CL = 50 pF; VCC = 4.5 V 9 11 1.5 4 HCT3G 11 10 1.5 4 ns ns pF pF UNIT
2003 Aug 21
2
Philips Semiconductors
Product specification
Buffers with open-drain outputs
ORDERING INFORMATION PACKAGES TYPE NUMBER TEMPERATURE RANGE 74HC3G07DP 74HCT3G07DP PINNING PIN 1, 3, 6 2, 5, 7 4 8 SYMBOL 1A, 2A, 3A 3Y, 2Y, 1Y GND VCC data inputs data outputs ground (0 V) DC supply voltage -40 to +125 C -40 to +125 C PINS 8 8 PACKAGE TSSOP-8 TSSOP-8
74HC3G07; 74HCT3G07
MATERIAL plastic plastic
CODE SOT505-2 SOT505-2
MARKING H07 T07
DESCRIPTION
1A 1
3Y 2 2A 3
07
8 VC C 7 1Y 6 3A 5 2Y
1 1A
3 2A 6 3A
1Y 7
2Y 5 3Y 2
G ND 4
Fig.1 Pin configuration.
Fig.2 Logic symbol.
1A 2A 3A
1
3 6
1 1 1
7 5 2
1Y 2Y 3Y
handbook, halfpage
Y
A GND
MNA591
Fig.3 IEC logic symbol.
Fig.4 Logic diagram (one driver).
2003 Aug 21
3
Philips Semiconductors
Product specification
Buffers with open-drain outputs
RECOMMENDED OPERATING CONDITIONS 74HC3G07 SYMBOL VCC VI VO Tamb PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times CONDITIONS MIN. 2.0 0 0 see DC and AC -40 characteristics per device VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V - - - TYP. 5.0 - - +25
74HC3G07; 74HCT3G07
74HCT3G07 UNIT MIN. 4.5 0 0 -40 TYP. 5.0 - - +25 MAX. 5.5 5.5 VCC +125 V V V C
MAX. 6.0 6.0 VCC +125
tr,tf
- 6.0 -
1000 500 400
- - -
- 6.0 -
- 500 -
ns ns ns
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK IOK VO IO ICC Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 110 C the value of PD derates linearly with 8 mW/K. PARAMETER supply voltage input diode current output diode current output voltage output sink current VCC or GND current storage temperature power dissipation per package for temperature range from -40 to +125 C; note 2 VI < -0.5 V or VI > VCC + 0.5 V; note 1 VO < -0.5 V; note 1 active mode; note 1 high-impedance mode; note 1 -0.5 V < VO < 7.0 V; note 1 note 1 CONDITIONS - - -0.5 -0.5 - - -65 - MIN. -0.5 MAX. +7.0 20 -20 VCC + 0.5 7.0 -25 50 +150 300 UNIT V mA mA V V mA mA C mW
2003 Aug 21
4
Philips Semiconductors
Product specification
Buffers with open-drain outputs
DC CHARACTERISTICS
74HC3G07; 74HCT3G07
Type 74HC3G07 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +85 C VIH HIGH-level input voltage 2.0 4.5 6.0 VIL LOW-level input voltage 2.0 4.5 6.0 VOL LOW-level output voltage VI = VIH or VIL IO = 20 A IO = 20 A IO = 20 A IO = 4.0 mA IO = 5.2 mA II IOZ ICC input leakage current VI = VCC or GND 3-state output OFF current VI = VIH or VIL; VO = VCC or GND quiescent supply current VI = VCC or GND; IO = 0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 6.0 - - - - - - - - 0 0 0 0.15 0.16 - - - - - - - - - - - - - - - - - 0.1 0.1 0.1 0.33 0.33 1.0 5.0 10 - - - 0.5 1.35 1.8 0.1 0.1 0.1 0.4 0.4 1.0 10 20 V V V V V A A A 1.5 3.15 4.2 - - - 1.2 2.4 3.2 0.8 2.1 2.8 - - - 0.5 1.35 1.8 V V V V V V VCC (V) MIN. TYP.(1) MAX. UNIT
Tamb = -40 to +125 C VIH HIGH-level input voltage 2.0 4.5 6.0 VIL LOW-level input voltage 2.0 4.5 6.0 VOL LOW-level output voltage VI = VIH or VIL IO = 20 A IO = 20 A IO = 20 A IO = 4.0 mA IO = 5.2 mA II IOZ ICC Note 1. All typical values are measured at Tamb = 25 C. 2003 Aug 21 5 input leakage current VI = VCC or GND 3-state output OFF current VI = VIH or VIL; VO = VCC or GND quiescent supply current VI = VCC or GND; IO = 0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 6.0 - - - - - - - - V V V V V A A A 1.5 3.15 4.2 - - - V V V V V V
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74HC3G07; 74HCT3G07
Type 74HCT3G07 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +85 C VIH VIL VOL HIGH-level input voltage LOW-level input voltage LOW-level output voltage VI = VIH or VIL IO = 20 A IO = 4.0 mA II IOZ ICC ICC input leakage current VI = VCC or GND 3-state output OFF current VI = VIH or VIL; VO = VCC or GND quiescent supply current additional supply current per input VI = VCC or GND; IO = 0 VI = VCC - 2.1 V; IO = 0 4.5 4.5 5.5 5.5 5.5 4.5 to 5.5 - - - - - - 0 0.15 - - - - 0.1 0.33 1.0 5.0 10 375 V V A A A A 4.5 to 5.5 4.5 to 5.5 2.0 - 1.6 1.2 - 0.8 V V VCC (V) MIN. TYP.(1) MAX. UNIT
Tamb = -40 to +125 C VIH VIL VOL HIGH-level input voltage LOW-level input voltage LOW-level output voltage VI = VIH or VIL IO = 20 A IO = 4.0 mA II IOZ ICC ICC Note 1. All typical values are measured at Tamb = 25 C. input leakage current VI = VCC or GND 3-state output OFF current VI = VIH or VIL; VO = VCC or GND quiescent supply current additional supply current per input VI = VCC or GND; IO = 0 VI = VCC - 2.1 V; IO = 0 4.5 4.5 5.5 5.5 5.5 4.5 to 5.5 - - - - - - - - - - - - 0.1 0.4 1.0 10 20 410 V V A A A A 4.5 to 5.5 4.5 to 5.5 2.0 - - - - 0.8 V V
2003 Aug 21
6
Philips Semiconductors
Product specification
Buffers with open-drain outputs
AC CHARACTERISTICS Type 74HC3G07 GND = 0 V; tr = tf 6.0 ns; CL = 50 pF. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS tPZL VCC (V) - - - - - - - - - MIN. 9 7 25 11 10 18 6 5
74HC3G07; 74HCT3G07
Tamb (C) -40 to +85 TYP.(1) 25 MAX. 95 19 16 95 23 23 95 19 16 - - - - - - - - - -40 to +125 MIN. MAX. 125 25 20 125 30 26 125 25 20 ns ns ns ns ns ns ns ns ns UNIT
propagation delay see Figs 5 and 6 2.0 nA to nY 4.5 6.0 propagation delay see Figs 5 and 6 2.0 nA to nY 4.5 6.0 output transition time see Figs 5 and 6 2.0 4.5 6.0
tPLZ
tTHL
Note 1. All typical values are measured at Tamb = 25 C. Type 74HCT3G07 GND = 0 V; tr = tf 6.0 ns; CL = 50 pF. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS tPZL tPLZ tTHL Note 1. All typical values are measured at Tamb = 25 C. VCC (V) - - - -40 to +85 MIN. TYP.(1) 11 10 6 MAX. 27 26 19 - - - Tamb (C) -40 to +125 MIN. MAX. 32 31 22 ns ns ns UNIT
propagation delay see Figs 5 and 6 4.5 nA to nY propagation delay see Figs 5 and 6 4.5 nA to nY output transition time see Figs 5 and 6 4.5
2003 Aug 21
7
Philips Semiconductors
Product specification
Buffers with open-drain outputs
AC WAVEFORMS
74HC3G07; 74HCT3G07
VI
nA i nput
VM
G ND t PLZ VC C nY out put VO L VX t PZL
VM
tL TH
For HC3G: VM = 50%; VI = GND to VCC. For HCT3G: VM = 1.3 V; VI = GND to 3.0 V. For HC3G and HCT3G: VX = 0.1 x VCC.
Fig.5 The input (nA) to output (nY) propagation delays and transition times.
handbook, full pagewidth
S1 VCC PULSE GENERATOR VI D.U.T. RT CL = 50 pF
MNA742
VCC open GND
RL = VO 1 k
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH open VCC GND
S1
Definitions for test circuit: CL = load capacitance including jig and probe capacitance (see "AC characteristics"). RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.6 Load circuitry for switching times.
2003 Aug 21
8
Philips Semiconductors
Product specification
Buffers with open-drain outputs
PACKAGE OUTLINE
74HC3G07; 74HCT3G07
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
D
E
A
X
c y HE vMA
Z
8
5
A pin 1 index
A2 A1
(A3)
Lp L
1
e bp
4
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.00 A2 0.95 0.75 A3 0.25 bp 0.38 0.22 c 0.18 0.08 D(1) 3.1 2.9 E(1) 3.1 2.9 e 0.65 HE 4.1 3.9 L 0.5 Lp 0.47 0.33 v 0.2 w 0.13 y 0.1 Z(1) 0.70 0.35 8 0
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC --JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16
2003 Aug 21
9
Philips Semiconductors
Product specification
Buffers with open-drain outputs
DATA SHEET STATUS DATA SHEET STATUS Objective specification PRODUCT STATUS Development
74HC3G07; 74HCT3G07
DEFINITIONS (1) This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Preliminary specification
Qualification
Product specification
Production
Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2003 Aug 21
10


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