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| (R) STPC CONSUMER Multimedia PC on a Chip s s s s s s s s s s s s s s s s s s POWERFUL X86 PROCESSOR 64-BIT DRAM CONTROLLER SVGA GRAPHICS CONTROLLER UMA ARCHITECTURE VIDEO SCALER DIGITAL PAL/NTSC ENCODER VIDEO INPUT PORT CRT CONTROLLER 135MHz RAMDAC UP TO 3-LINE FLICKER FILTER SCAN CONVERTER PCI MASTER / SLAVE / ARBITER ISA MASTER/SLAVE IDE CONTROLLER DMA CONTROLLER INTERRUPT CONTROLLER TIMER / COUNTERS POWER MANAGEMENT PCI m/s VIP TV Output Digital PAL/ NTSC PBGA388 Logic Diagram ISA BUS x86 Core Host I/F ISA m/s IPC PCI m/s EIDE EIDE PCI BUS CCIR Input DESCRIPTION The STPC Consumer integrates a standard 5th generation x86 core, a DRAM controller, a graphics subsystem, a video pipeline, and support logic including PCI, ISA, and IDE controllers to provide a single Consumer orientated PC compatible subsystem on a single device. The device is based on a tightly coupled Unified Memory Architecture (UMA), sharing the same memory array between the CPU main memory and the graphics and video frame buffers. Extra facilities are implemented to handle video streams. Features include smooth scaling and colour space conversion of the video input stream and mixing with graphics data. The chip also includes a built-in digital TV encoder and anti-flicker filters that allow stable, high-quality display on standard PAL or NTSC television sets without additional components. The STPC Consumer is packaged in a 388 Plastic Ball Grid Array (PBGA). AntiFlicker Color Space Converter Video pipeline 2D SVGA Color Key Chroma Key HW Cursor Monitor CRTC DRAM I/F SYNC Output http://www.st.com/stpc stpc.info@st.com |
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