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TS3702C,I,M MICROPOWER DUAL CMOS VOLTAGE COMPARATORS s PUSH-PULL CMOS OUTPUT (NO EXTER NAL PULL-UP RESISTOR REQUIRED) s EXTREMELY LOW SUPPLY CURRENT : 9A typ / comparator s WIDE SINGLE SUPPLY RANGE 2.7V TO 16V OR DUAL SUPPLIES (1.35V TO 8V) s EXTREMELY LOW INPUT BIAS CURRENT : 1pA typ s EXTREMELY LOW INPUT OFFSET CURRENTS : 1pA typ N DIP8 (Plastic Package) s INPUT COMMON-MODE VOLTAGE RANGE INCLUDES GND s HIGH INPUT IMPEDANCE : 1012 typ s FAST RESPONSE TIME : 2s typ for 5mV overdrive D SO8 (Plastic Micropackage) s PIN-TO-PIN AND FUNCTIONALLY COMPATIBLE WITH BIPOLAR LM393 DESCRIPTION The TS3702 is a micropower CMOS dual voltage comparator with extremely low consumption of 9A typ / comparator (20 times less than bipolar LM393). The push-pull CMOS output stage allows power and space saving by eliminating the external pull-up resistor required by usual open-collector output comparators. Thus response times remain similar to the LM393. ORDER CODE Part Number TS3702C TS3702I TS3702M Temperature Range 0C, +70C -40C, +125C -55C, +125C Package N * * * D * * * P * * * Output 1 Inverting Input 1 Non-inverting Input 1 VCC 1 2 3 4 + + 8 7 6 5 V CC + Output 2 Inverting Input 2 Non-inverting Input 2 P TSSOP8 (Thin Shrink Small Outline Package) PIN CONNECTIONS (top view) N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) P = Thin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT) January 2003 1/7 TS3702C,I,M SCHEMATIC DIAGRAM (for 1/2 TS3702) VCC + T 10 T1 T2 T9 T17 R1 Input T3 T4 T11 T12 Input + T18 T21 Output T 13 T8 T19 T20 T5 T6 T7 T14 T15 T16 VCC - ABSOLUTE MAXIMUM RATINGS Symbol VCC+ Vid Vi Vo Io IF pd Tstg 1. 2. 3. 4. 5. Parameter Supply Voltage 1) Differential Input Voltage Input Voltage 3) Output Voltage Output Current Forward Current in ESD Protection Diodes on Input 4) Power Dissipation 5) 2) Value 18 18 18 18 20 50 1250 710 625 -65 to +150 Unit V V V V mA mA mW C DIP8 SO8 TSSOP8 Storage Temperature Range All voltage values, except differential voltage, are with respect to network ground terminal. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. The magnitude of the input and the output voltages must never exceed the magnitude of the possitive supply voltage. Guaranteed by design. Pd is calculated with T amb = +25C, Tj = +150C and R thja = 100C/W for DIP8 package = 175C/W for SO8 package = 200C/W for TSSOP8 package OPERATING CONDITIONS Symbol VCC+ Vicm Toper Supply Voltage Common Mode Input Voltage Range Operating Free-Air Temperature range TS3702C TS3702I TS3702M Parameter TS3702C,I TS3702M Value 2.7 to 16 4 to 16 0 to VCC+ -1.5 0 to +70 -40 to +125 -55 to +125 Unit V V C 2/7 TS3702C,I,M ELECTRICAL CHARACTERISTICS VCC+ = 3V, V cc- = 0V, Tamb = 25C (unless otherwise specified) Symbol 1) Parameter Input Offset Voltage Vic = 1.5V Tmin. Tamb Tmax. Input Offset Current 2) Vic = 1.5V Tmin. Tamb Tmax. Input Bias Current 2) Vic = 1.5V Tmin. Tamb Tmax. Input Common Mode Voltage Range Tmin. Tamb Tmax Common-mode Rejection Ratio Vic = Vicm min. Supply Voltage Rejection Ratio VCC+ = 3V to 5V High Level Output Voltage Vid = 1V, IOH = -4mA Tmin. Tamb Tmax. Low Level Output Voltage Vid = -1V, IOL = 4mA Tmin. Tamb Tmax. Supply Current (each comparator) No load - Outputs low Tmin. Tamb Tmax. Response Time Low to High Vic = 0V, f = 10kHz, CL = 50pF, Response Time High to Low Vic = 0V, f = 10kHz, CL = 50pF, Overdrive = 5mV TTL Input Overdrive = 5mV TTL Input Min. Typ. Max. 5 6.5 Unit mV Vio Iio 1 300 1 600 0 0 80 75 2 1.8 2.4 VCC+-1.2 VCC+ -1.5 pA Iib pA Vicm CMR SVR VOH V dB dB V VOL 300 400 450 20 25 mV ICC 7 A tPLH 1.5 0.7 2.2 0.15 s tPHL s 1. The specified offset voltage is the maximun value required to drive the output up to 2.5V or down to 0.3V. 2. Maximum values including unavoidable inaccuracies of the industrial test. 3/7 TS3702C,I,M ELECTRICAL CHARACTERISTICS VCC+ = 5V, V cc- = 0V, Tamb = 25C (unless otherwise specified) Symbol Vio Parameter Input Offset Voltage Vic = Vicm min., Vcc+ = 5V to 10V 1) Tmin. Tamb Tmax. Input Offset Current 2) Vic = 2.5V Tmin. Tamb Tmax. Input Bias Current 2) Vic = 2.5V Tmin. Tamb Tmax. Input Common Mode Voltage Range Tmin. Tamb Tmax Common-mode Rejection Ratio Vic = Vicm min. Supply Voltage Rejection Ratio VCC+ = +5V to +10V High Level Output Voltage Vid = 1V, IOH = -4mA Tmin. Tamb Tmax. Low Level Output Voltage Vid = -1V, IOL = 4mA Tmin. Tamb Tmax. Supply Current (each comparator) No load - Outputs low Tmin. Tamb Tmax. Response Time Low to High Vic = 0V, f = 10kHz, CL = 50pF, tPLH Overdrive = Overdrive = Overdrive = Overdrive = TTL Input Overdrive = Overdrive = Overdrive = Overdrive = TTL Input 5mV 10mV 20mV 40mV 4.5 4.3 0 0 82 90 4.7 Min. Typ. 1.2 Max. 5 6.5 Unit mV Iio 1 300 1 600 VCC+-1.2 VCC+ -1.5 pA Iib pA Vicm CMR SVR VOH V dB dB V VOL 200 300 375 20 25 mV ICC 9 A 1.5 1.1 0.9 0.7 0.6 2.2 1.6 1.1 0.75 0.17 30 s Response Time High to Low Vic = 0V, f = 10kHz, CL = 50pF, tPHL 5mV 10mV 20mV 40mV s tf Fall time f = 10kHz, CL = 50pF, Overdrive 50mV ns 1. The specified offset voltage is the maximun value required to drive the output up to 4.5V or down to 0.3V. 2. Maximum values including unavoidable inaccuracies of the industrial test. 4/7 TS3702C,I,M PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP Millimeters Dimensions Min. A a1 B b b1 D E e e3 e4 F i L Z 0.51 1.15 0.356 0.204 7.95 2.54 7.62 7.62 6.6 5.08 3.81 1.52 Typ. 3.32 1.65 0.55 0.304 10.92 9.75 0.020 0.045 0.014 0.008 0.313 Max. Min. Inches Typ. 0.131 0.065 0.022 0.012 0.430 0.384 0.100 0.300 0.300 0260 0.200 0.150 0.060 Max. 3.18 0.125 5/7 TS3702C,I,M PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) L C a3 c1 a2 A s e3 E D M 8 5 F 1 4 Millimeters Dimensions Min. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 3.8 0.4 4.0 1.27 0.6 8 (max.) 0.150 0.016 Typ. Max. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5.0 6.2 0.189 0.228 Min. 0.004 0.026 0.014 0.007 0.010 a1 b Inches Typ. Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244 0.050 0.150 0.157 0.050 0.024 6/7 b1 TS3702C,I,M PACKAGE MECHANICAL DATA 8 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) k c 0.25mm .010 inch GAGE PLANE L1 L L L1 E1 SEATING PLANE A A2 A1 5 D b 8 8 C E 4 e 5 PIN 1 IDENTIFICATION Millimeters Dimensions Min. A A1 A2 b c D E E1 e k l L L1 0.05 0.80 0.19 0.09 2.90 4.30 0 0.50 0.45 Typ. Max. 1.20 0.15 1.05 0.30 0.20 3.10 4.50 8 0.75 0.75 Min. 0.01 0.031 0.007 0.003 0.114 0.169 0 0.09 0.018 1 4 1 Inches Typ. Max. 0.05 0.006 0.041 0.15 0.012 0.122 0.177 8 0.030 0.030 1.00 0.039 3.00 6.40 4.40 0.65 0.60 0.600 1.000 0.118 0.252 0.173 0.025 0.0236 0.024 0.039 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States (c) http://www.st.com 7/7 |
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