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 2N6798
Data Sheet December 2001
5.5A, 200V, 0.400 Ohm, N-Channel Power MOSFET
The 2N6798 is an N-Channel enhancement mode silicon gate power MOS field effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. This type can be operated directly from integrated circuits. Formerly developmental type TA_____.
Features
* 5.5A, 200V * rDS(ON) = 0.400 * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Majority Carrier Device * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards"
Ordering Information
PART NUMBER 2N6798 PACKAGE TO-205AF BRAND 2N6798
Symbol
D
NOTE: When ordering, include the entire part number.
G
S
Packaging
JEDEC TO-205AF
DRAIN (CASE)
SOURCE
GATE
(c)2001 Fairchild Semiconductor Corporation
2N6798 Rev. B
2N6798
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified 2N6798 200 200 5.5 3.5 22 20 5.5 22 25 0.20 -55 to 150 300 260 UNITS V V A A A V A A W W/oC oC
oC oC
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Source Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulse Source Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Above TC = 25oC, Derate Linearly (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IGSS IDSS VDS(ON) rDS(ON) VSD gfs CISS COSS CRSS td(ON) tr td(OFF) tf SOA VDS = 160V, ID = 155mA (Figures 19, 20) VDS = 4.5V, ID = 5.5A (Figures 19, 20 VDD 77V, ID = 3.5A, ZO = 50, (Figure 15) MOSFET Switching Times are Essentially Independent of Operating Temperature. TEST CONDITIONS VGS = 0V, ID = 0.25mA VGS = VDS, ID = 0.5mA VGS = 20V, VDS = 0V VDS = 200V, VGS = 0V VDS = 160V, VGS = 0V, TC = 125oC VGS = 10V, ID = 5.5A VGS = 10V, ID = 3.5A, TA = 25oC VGS = 10V, ID = 3.5A, TA = 125oC TC = 25oC, IS = 5.5A, VGS = 0V VDS = 5V, ID = 3.5A VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) MIN 200 2.0 0.7 2.5 350 100 40 25 25 Free Air Operation TYP 0.25 4.5 600 250 80 MAX 4.0 100 250 1000 2.20 0.400 0.750 1.4 7.5 900 450 150 30 50 50 40 5.0 175 UNITS V V nA A A V V S pF pF pF ns ns ns ns W W
oC/W oC/W
Drain to Source Breakdown Voltage Gate Threshold Voltage Gate to Source Leakage Zero Gate Voltage Drain Current
On State Voltage (Note 2) On Resistance (Note 2)
Diode Forward Voltage (Note 2) Forward Transconductance (Note 2) Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Safe Operating Area
Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient
RJC RJA
Source to Drain Diode Specifications
PARAMETER Reverse Recovery Time Reverse Recovered Charge NOTES: 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal impedence curve (Figure 3). SYMBOL trr QRR TEST CONDITIONS TJ = 150oC, ISD = 5.5A, dISD/dt = 100A/s TJ = 150oC, ISD = 5.5A, dISD/dt = 100A/s MIN TYP 450 3.0 MAX UNITS ns C
(c)2001 Fairchild Semiconductor Corporation
2N6798 Rev. B
2N6798 Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 ID, DRAIN CURRENT (A)
Unless Otherwise Specified
6.0
4.8
3.6
0.6 0.4
2.4
0.2 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 150
1.2
0 25 50 75 100 125 TC , CASE TEMPERATURE (oC) 150
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
2 1 ZJC, NORMALIZED THERMAL IMPEDANCE 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 10-1 t1 t2 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC 1 10 PDM
t1, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
102 OPERATION IN THIS AREA LIMITED BY rDS(ON) ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A)
25
10V
80s PULSE TEST 8V
20 7V 15 VGS = 6V
10
10s 100s 1ms
10
1.0 TC = 25oC TJ = MAX RATED RJC = 5k/W SINGLE PULSE 0.1 1.0 10ms 100ms DC 103
5
5V 4V
102 10 VDS, DRAIN TO SOURCE VOLTAGE (V)
0
0
20 40 60 80 VDS, DRAIN TO SOURCE VOLTAGE (V)
100
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
(c)2001 Fairchild Semiconductor Corporation
2N6798 Rev. B
2N6798 Typical Performance Curves
25 80s PULSE TEST 20 7V 15 10V 9V 8V ID DRAIN CURRENT (A) 20 10 5 2 1.0 0.5 0.2 4V 0 0 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) 5 0.1 0 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10
Unless Otherwise Specified (Continued)
80s PULSE TEST
ID, DRAIN CURRENT (A)
TJ = -55oC TJ = 25oC TJ = 125oC
10
VGS = 6V
5
5V
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TYPICAL TRANSFER CHARACTERISTICS
0.8 2.0s PULSE TEST VGS = 10V RDS(ON), DRAIN TO SOURCE 0.6 ON RESISTANCE NORMALIZEDDRAIN TO SOURCE ON RESISTANCE 2.2
ID = 3A VGS = 10V
1.8
1.4
0.4
VGS = 20V
1.0
0.2
0.6
0 0 10 20 30 ID, DRAIN CURRENT (A) 40
0.2
-40
0
40
80
120
160
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
1.25 IDR, REVERSE DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE
20 102 5
1.15
1.05
2 10 0.5 0.2 1.0 0 TJ = 150oC
0.95
TJ = 25oC
0.85
0.75 -40
0
40
80
120
160
1
2
3
4
TJ, JUNCTION TEMPERATURE (oC)
VSD, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. SOURCE TO DRAIN DIODE VOLTAGE
(c)2001 Fairchild Semiconductor Corporation
2N6798 Rev. B
2N6798 Typical Performance Curves
Unless Otherwise Specified (Continued)
10 80s PULSE TEST gfs, TRANSCONDUCTANCE (S) 8 TJ = -55oC TJ = 25oC TJ = 125oC 4 C, CAPACITANCE (pF)
2000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD
1600
6
1200 CISS COSS 400 CRSS 0
800
2
0
0
5
10 15 ID, DRAIN CURRENT (A)
20
25
0
10
20
30
40
50
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
20 VGS, GATE TO SOURCE VOLTAGE (V) ID = 11A
15
VDS = 40V VDS = 100V
10
VDS = 60V
5
0 0 8 16 24 32 40 Qg, TOTAL GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
(c)2001 Fairchild Semiconductor Corporation
2N6798 Rev. B
2N6798 Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP
+
VDS VDD
0V
IAS 0.01
0 tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON td(ON) tr RL VDS 90%
tOFF td(OFF) tf 90%
+
RG DUT
-
VDD
0
10% 90%
10%
VGS VGS 0 10%
50% PULSE WIDTH
50%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
VDS (ISOLATED SUPPLY) VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS
12V BATTERY
0.2F
50k 0.3F
G
DUT
0
IG(REF) 0 IG CURRENT SAMPLING RESISTOR
S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
(c)2001 Fairchild Semiconductor Corporation
2N6798 Rev. B
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4


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