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FEATURES

LTC2924 Quad Power Supply Sequencer DESCRIPTIO
The LTC(R)2924 is a power supply sequencer designed for use with external N-channel MOSFETs or power supplies with shutdown pins. Four power supplies can be fully sequenced by a single LTC2924 and up to five supplies can be sequenced to a sixth master supply. The LTC2924 requires a minimum of external components, using only two feedback resistors per sequenced power supply and a single resistor to set hysteresis. An internally regulated charge pump provides gate drive voltages for external logic and sub-logic-level MOSFETs. Adding a single capacitor enables an adjustable time delay between power supplies during both Power On and Power Off sequencing. A second capacitor can be added to enable a power good timer for detecting the failure of any power supply to turn on within the selected time. Errors in power supply sequencing and the control input are detected and reported at the FAULT output. The LTC2924 features precision input comparators which can provide 1% accuracy in monitoring power supply voltages. Multiple LTC2924s may be easily cascaded to sequence a virtually unlimited number of power supplies.
, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Fully Sequence Four Supplies - Six with Minimal External Circuitry Cascadable for Additional Supplies Power Off in Reverse Order or Simultaneously Charge Pump Drives External MOSFETs Drives Power Supply Shutdown Pins with No External Pull-Up Resistors Sequence and Monitor Two or More Supplies 10A Output Current Allows Soft-Starting of Supplies Done Indicator for Both Power On and Power Off Adjustable Time Delay Between Power Supplies Power Good Timer Power Supply Voltage Monitoring and Power Sequence Error Detection and Reporting Available in a 16-Lead Narrow SSOP Package
APPLICATIO S

Sequenced Power Supplies for ASICs with Multiple I/O and Core Voltages Latch-Up Prevention in Systems with Multiple Power Supplies
TYPICAL APPLICATIO
Q1 1V 0.1F Q2 3V 0.1F Q3 5V 0.1F 5V EARLY Q4 0.1F
Series MOSFET Power Supply Sequencer
5V
VON = 0.93V VOFF = 0.91V VON = 2.79V VOFF = 2.73V VON = 4.21V VOFF = 3.76V VON = 3.32V VOFF = 2.80V VCC OUT1 OUT2 OUT3 10k 10k OUT4 ON LTC2924 SYSTEM CONTROLLER DONE FAULT TMR PGT 150nF 150nF HYS/CFG GND 49.9k Q1-Q4: IRL3714S ALL RESISTORS 1%
10V/DIV 2V/DIV 2V/DIV 25ms/DIV
2924 TA02c
10V/DIV 2V/DIV 2V/DIV
2924 TA02b
0.1F
52.3k IN1 IN2 IN3 IN4 11.8k
45.3k
6.04k
1.62k
7.68k
1.69k
3.09k
2924 TA02a
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Power-Up Sequence
2V/DIV
3.3V 1V DONE ON TMR 25ms/DIV
Power-Down Sequence
5V 2V/DIV 3.3V 1V DONE ON TMR
2924F
1
LTC2924
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW IN1 IN2 IN3 IN4 OUT1 OUT2 OUT3 OUT4 1 2 3 4 5 6 7 8 16 ON 15 HYS/CFG 14 TMR 13 GND 12 PGT 11 VCC 10 DONE 9 FAULT
Supply Voltage (VCC) ............................... - 0.3V to 6.5V Input Voltages ON, IN1-IN4 ............................... - 0.3V to VCC + 0.3V PGT, TMR, HYS/CFG ................. - 0.3V to VCC + 0.3V Open-Drain Output Voltages FAULT, DONE ............................. - 0.3V to VCC + 0.3V Output Voltages (OUT1-OUT4) (Note 5) ............... - 0.3V to VCC + 4.5V Operating Temperature Range LTC2924C ............................................... 0C to 70C LTC2924I ............................................ - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LTC2924CGN LTC2924IGN GN PART MARKING 2924 2924I
GN PACKAGE 16-LEAD PLASTIC SSOP
TJMAX = 125C, JA = 130C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL Supply VCC ICC ON Threshold VON(TH) VOFF(TH) VON(TH) VOFF(TH) VFAULT ION(HYS) ION(ERROR) ON, Low to High Threshold ON, High to Low Threshold IN1-IN4 Low to High Threshold IN1-IN4 High to Low Threshold ON, IN1-IN4 High Speed Low Fault Threshold ON, IN1-IN4 Hysteresis Current Range ON, IN1-IN4 Hysteresis Current Error Input Supply Range Input Supply Current PARAMETER
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 3V to 6V, unless otherwise noted.
CONDITIONS

MIN 3
TYP
MAX 6
UNITS V mA V V V V V A
1.5 0.6000 0.6014 0.6020 0.6026 0.33 0.5 0.6060 0.6074 0.6081 0.6087 0.4
3 0.6121 0.6135 0.6142 0.6148 0.48 50
IN1-IN4 Threshold
ON, IN1-IN4 Characteristics VON VON(TH) (Note 2) 1 - (ION(HYS)/(0.5/RHYS)), VON(TH) = 1V 0.5A ION < 25A 25A ION 50A VON(TH) = 0.5V IHYS * RHYS IOUTn = 0 OUTn On, VOUT = (VCC + 4V) OUTn Off, IOUT = 2mA (Notes 2, 3) RHYS Tied to GND RHYS Tied to VCC

22 10 2 4 VCC + 4.5 8.6 10 VCC + 6 11.2 240 10k 0.5 VCC - 0.5 1M 100
ILEAK VON(HYS) VOUT(EN) IOUT(EN) ROUT(OFF) RHYS VHYS
ON, IN1-IN4 Leakage (Below Threshold) ON, IN1-IN4 Minimum Hysteresis Voltage OUT1-OUT4 Gate Drive Voltage OUT1-OUT4 On Current OUT1-OUT4 Off Resistance to GND HYS Current Programming Resistor Range HYS Programming Voltage
OUT1-OUT4 Characteristics V A V V
2924F
HYS Characteristics
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% % nA mV
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LTC2924
ELECTRICAL CHARACTERISTICS
SYMBOL ITMR VTH(HI) IPGT VPGT RD(LO) ID(HI) RFAULT (LO) IFAULT(HI) VFAULT(HI) VFAULT(LO) RF(EXT) tFAULT tFAULT(MIN) PARAMETER Timer Pin Output Current Timer High Voltage Threshold Power Good Timer Pin Output Current TMR Characteristics
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 3V to 6V, unless otherwise noted.
CONDITIONS Timer On VTMR 0.9V VCC = 5V Power Good Timer On, VPGT 0.9V VCC = 5V DONE = Low, I = 2mA DONE = High FAULT Being Pulled Low Internally, I = 2mA FAULT High

MIN 4 0.93 4 0.93
TYP 5 1 5 1
MAX 6 1.07 6 1.07 100 15 400 2
UNITS A V A V A A V
PGT Characteristics Power Good Timer Fault Detected Voltage Threshold DONE Pin Pull-Down Resistance to GND DONE Pin Off Leakage Current FAULT Pin Pull-Down Resistance to GND FAULT Pin Off Leakage Current Voltage Above Which an Externally Generated FAULT Condition Will Not be Detected Voltage Below Which an Externally Generated FAULT Condition Will be Detected External Pull-Up Resistance Externally Commanded FAULT Below VFAULT(LO) to OUT1-OUT4 Pull-Down On Delay Externally Commanded FAULT Minimum Time Below VFAULT(LO) (Note 4)
DONE Characteristics
FAULT Characteristics
1.6 0.6 10 1 1
V k s s
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Hysteresis current must be 500nA minimum. Hysteresis current may exceed 50A, but accuracy is not guaranteed. Note 3: HYS/CFG pin must be pulled to GND or VCC with an external resistor. See Applications Information for details.
Note 4: Determined by design, not production tested. External circuits pulling down on the FAULT pin must maintain the signal below VFAULT(LO) for 1s. Note 5: Internal circuits may drive the OUTn pins higher than the Absolute Maximum Ratings.
TYPICAL PERFOR A CE CHARACTERISTICS
ICC vs VCC
2.3 2.1 1.9 ON HIGH
VOUT (V) ICC (mA)
IOUT1-4 = -10A RHYS = 51k
1.7 1.5 1.3 1.1 0.9 3 3.5 4 4.5 VCC (V) 5 5.5 6
2924 G01
8 6 4
VOUT (V)
ON LOW
UW
VOUT(EN) vs IOUT
14 12 10 VCC = 3V 10 VCC = 6V 11 12
VOUT(EN) vs VCC
IOUT1-4 < 1A
9
8 2 0 0 ONE OUTPUT DRIVING CURRENT 2 4 6 IOUT (A) 8 10 12
2924 G02
7
2
3
4 VCC (V)
5
6
2924 G03
2924F
3
LTC2924 TYPICAL PERFOR A CE CHARACTERISTICS
RDONE vs VCC
55 200 180
50
RFAULT AT 2mA ()
RDONE AT 2mA ()
45
40
35
30
3
OUTn (Off) ISAT vs Temperature
45 40 VCC = 6V 35
ISAT (mA)
30 25 20 VCC = 3V 15 10 20 40 60 -60 -40 -20 0 TEMPERATURE (C)
ISAT (mA)
4
UW
4
RFAULT vs VCC
160 140 120 100 80
5 VCC (V)
6
2924 G04
3
4 VCC (V)
5
6
2924 G05
OUTn (Off) ISAT vs VCC
35 VOUT = 5V
VOUT = 5V
30
25
20
15
80
100
10 2.5
3
3.5
4
4.5 VCC (V)
5
5.5
6
6.5
2924 G06
2924 G07
2924F
LTC2924
PI FU CTIO S
IN1-IN4 (Pins 1, 2, 3, 4): Sequenced Power Supply Monitor. Connect this pin to an external resistive divider between each sequenced power supply and GND. During Power On sequencing, 0.61V (typ) at this pin indicates that the sequenced power supply (enabled with each of the OUT1-OUT4 pins) has reached the desired Power On sequence voltage. A hysteresis current (programmed by the HYS pin) is sourced out of each of the IN1-IN4 pins after the 0.61V threshold is detected. During the Power Off sequence, 0.61V at this pin indicates that the sequenced power supply has reached the desired Power Off voltage. The hysteresis current is removed after the 0.61V threshold is detected. OUT1-OUT4 (Pins 5, 6, 7, 8): Sequenced Power Supply Enable. Connect this pin to the shutdown pin or an external series N-channel MOSFET for each power supply being sequenced. (A low at this pin means the sequenced power supply is commanded to turn off.) When disabled, each output is connected to GND with a resistance of <240. When enabled, each output is connected to an internally generated charge pump supply (nominally VCC + 5V) via an internal 10A (typ) current source. FAULT (Pin 9): Fault Pin. Pull this pin high with an external 10k resistor. The LTC2924 will pull this pin low if a fault condition is detected (see Applications Information for details). Pulling this pin low externally causes a simultaneous unsequenced Power Off. DONE (Pin 10): Done Pin. Pull this pin high with an external 10k resistor. This open-drain output pulls low at the completion of the Power-On sequence. At the end of the Power Off sequence, the LTC2924 floats this pin. VCC (Pin 11): Power Supply Input. All internal circuits are powered from this pin. VCC should be connected to a low noise power supply voltage and should be bypassed with at least a 0.1F capacitor to the GND pin in close proximity to the LTC2924. PGT (Pin 12): Power Good Timer. The PGT pin sets the time allowed for a power supply to turn on after being enabled with the OUT1-OUT4 pins. Connecting a capacitor between this pin and ground programs a 0.2s/F duration. The PGT pin is reset before each of the OUT1-OUT4 pins are asserted. If the voltage at the PGT pin reaches 1V, a fault condition is asserted. The PGT pin must be connected directly to ground to disable the power good timer function. GND (Pin 13): Ground. All internal circuits are returned to the GND pin. Connect this pin to the ground of the power supplies that are being sequenced. TMR (Pin 14): Timer. This pin sets the time delay between a supply ready (IN1-IN4) signal and the enabling of the next power supply in the sequence (OUT1-OUT4). Connecting a capacitor between this pin and ground programs a 0.2s/F duration. The TMR pin may be left floating if no delay is required between supplies being sequenced on or off. If an internal fault condition occurs, TMR will indicate so by going to VCC until the fault condition is cleared. Do not connect any other circuits to the TMR pin. HYS/CFG (Pin 15): Hysteresis Current Setting and Cascade Configuration. Connecting a resistor between this pin and GND programs a 0.5/REXT (typ) hysteresis current which is sourced out of each IN and ON pin. When multiple LTC2924s are cascaded, the HYS/CFG pin is also used to configure the position of the first LTC2924. See Applications Information for details. ON (Pin 16): On Pin. Commands the LTC2924 to sequence the power supplies up (Power On sequence) or down (Power Off sequence). Typically connected to a system controller. Hysteresis current is applied to this pin when above 0.61V (typ). This pin has a precision 0.61V threshold and can be used to sense a nonsequenced power supply's voltage to start the Power On sequence. See Applications Information for details. For cascading multiple LTC2924s, see Applications Information for connecting the ON pin.
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2924F
5
LTC2924
FU CTIO AL DIAGRA
IH VCP ON 10A
16
+
0.61V
-
IH VCP
1
IN1
+
0.61V
-
UVLO IH VCP 10A CHARGE PUMP 5
2
IN2
+
0.61V
-
IH
3
IN3
+
0.61V
-
OUT4 IH 8
4
IN4
+
0.61V
-
IH FAULT 0.5V
15
HYS/CFG
FIRST DETECT
5A
+
TMR 1V
-
14
6
W
11 VCC OUT1 5 0.61V 1V 0.5V INTERNAL REFERENCE OUT2 6 10A CLOCK VCP OUT3 4 7 VCP LOGIC 10A LAST DONE 10 9 5A
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+
1V PGT 12
-
GND 13
2924 BD
2924F
LTC2924
OPERATIO U
PS1 VPS1(ON) PS3 VPS3(ON) PS2 VPS1(OFF) VPS2(ON) VPS4(ON) 0V TMR* PS4 VPS4(OFF) VPS3(OFF) VPS2(OFF)
2924 F01
ON
DONE
*TMR IS CAPACITOR ADJUSTABLE
Figure 1. Power On and Power Off Sequence for Four Supplies
The LTC2924 is a power supply sequencer designed for use with external N-channel MOSFETs or power supplies with shutdown pins. Four power supplies can be fully sequenced by a single LTC2924 (see Figure 1). An internally regulated charge pump provides (VCC + 5V) gate voltages for driving external logic-level and sub-logic level MOSFETs. Adding a single capacitor enables an adjustable time delay between power supplies during both Power On and Power Off sequencing. A second capacitor can be added to enable a power good timer to detect the failure of any power supply to turn on within the set time. The ON pin is used to command the LTC2924 to start the Power On and Power Down sequences. To command the Power On sequence, the ON pin is pulled above 0.61V by a system controller or a resistive divider from a power supply. A voltage comparator senses the ON command and signals the sequencing logic to start the Power On sequence. When the Power On sequence starts, the TMR grounding switch is released and a 5A current source charges an external capacitor, CTMR (see Figure 2). When the voltage on this capacitor exceeds 1V, a comparator signals the
ON
0.61V 1V
TMR
OUT1
IN1
0.61V
OUT2
IN2
0.61V
OUT3
IN3
0.61V
OUT4
IN4
0.61V
DONE
2924 F02
Figure 2. On Sequence for Four Supplies
2924F
7
LTC2924
OPERATIO
logic, which starts the charge pump and enables OUT1 to turn on the first power supply. The power good timer circuit is also enabled by turning off the switch that is shorting the external capacitor to ground and enabling a 5A current source to charge the CPGT capacitor. The output circuit responds by opening a switch, which is shorting the OUT1 pin to ground and enabling a 10A current source, which is connected to the charge pump. The OUT1 pin can be connected to either the shutdown pin of a power supply or the gate of a N-channel MOSFET that is in series with the output of the sequenced power supply. As the power supply turns on, the resistive divider connected to the IN1 pin starts to drive up the voltage at the IN1 pin. When the voltage at this pin exceeds 0.61V, the comparator signals the logic that the first power supply is on. At this time a current is sourced out of the IN1 pin which serves as the hysteresis current for the input comparator. This allows the application to choose a lower Power Off voltage sense during the Power Off sequence. The power good timer (PGT) circuit is signaled and resets the PGT capacitor. The timer circuit is enabled and the cycle repeats until the last power supply has turned on. When the last power supply has turned on, the DONE pin pull-down switch is turned on to signal that the Power On sequence has completed. If a power supply fails to turn on after it is enabled and the voltage at the PGT pin exceeds 1V, the LTC2924 will disable all power supplies by pulling all OUT pins to ground. A fault condition will be indicated by the FAULT pin pulling low. The hysteresis current sourced at the ON pin and each IN pin is set at the HYS/CFG pin. The current is determined
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by an external resistor nominally pulled to ground. The hysteresis current is 0.5V/RHYS. The Power Off sequence is initiated by pulling the ON pin below 0.61V after a Power On sequence has completed (see Figure 3). The Power Off sequence turns off the power supplies in the reverse order of the Power On sequence. OUT4 is turned off first. The timer function is used between each supply being sequenced down. The PGT is not used. The end of the Power Off sequence is indicated by the LTC2924 floating the DONE pin.
ON 0.61V TMR OUT4 IN4 0.61V OUT3 IN3 0.61V OUT2 IN2 0.61V OUT1 IN1 0.61V DONE
2924 F03
Figure 3. 4-Power Supply Power Off Sequence
2924F
LTC2924
APPLICATIO S I FOR ATIO
Up to five supplies can be sequenced to a sixth master supply by a single LTC2924 (Figure 4). The turn on of the first power supply is sensed by the ON pin. Power supplies two through five are enabled by the OUT1 through OUT4 pins, and their turn on sensed by the IN1 through IN4 pins respectively. The last power supply is enabled by the DONE pin, which is generally connected through an inverter. This application is used where power supplies are sequentially sequenced on and the turn off is simultaneous. Multiple LTC2924s can be cascaded to facilitate sequencing of eight or more power supplies. See the Cascading Multiple LTC2924s section.
PS1 SHDN VOUT
VCC EARLY*
SYSTEM CONTROLLER
TURN OFF *VCC EARLY MUST BE ON BEFORE SEQUENCING SUPPLIES
Figure 4. Six Power Supply Sequencer Block Diagram
2924F
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Selecting the Hysteresis Current and IN Pin Feedback Resistors The IN1-IN4 pins are connected to a sequenced power supply with a resistive divider. The resistors are calculated by first selecting a hysteresis current, IHYS, and calculating RHYS:
RHYS = 0.5V ; 0.5A IHYS 50A IHYS
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For each sequenced power supply, choose a voltage when the power supply is considered to be On during a Power On
PS2 SHDN VOUT
PS3 SHDN VOUT
PS4 SHDN VOUT
PS5 SHDN VOUT
PS6 SHDN VOUT
VCC OUT1 OUT2 OUT3 OUT4 DONE FAULT GND
2924 F04
LTC2924
ON IN1 IN2 IN3 IN4
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LTC2924
APPLICATIO S I FOR ATIO
sequence (VON) and Off during a Power Off sequence (VOFF). Referring to Figures 5 and 6, each set of resistors can then be calculated by:
VON - VOFF IHYS R * 0.61V RA = B VON - 0.61V RB =
In the following example (Figure 5) IHYS is 50A. This corresponds to a RHYS resistor of:
IHYS
VPS IHYS IN RB
VON = 2.2V VOFF = 1V IRB
RA 0.61V
2924 F05
IFB = IRB + IHYS
+ -
Figure 5. Designing IHYS, Feedback Resistors
POWER SUPPLY 1 3.3V SHDN 5V SHDN 1.6V SHDN 2.5V SHDN
POWER SUPPLY 2
POWER SUPPLY 3
POWER SUPPLY 4 5V EARLY*
10k
10k
SYSTEM CONTROLLER
*5V EARLY MUST BE ON BEFORE SEQUENCING SUPPLIES 150nF 150nF
Figure 6. Typical Power Supply Sequencer
2924F
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RHYS = 0.5V = 10k 50A
In Figure 5, VON = 2.2V and VOFF = 1V. Using the equations provided above:
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2.2V - 1V = 24k 50A 24k * 0.61V RA = = 9.2k 2.2V - 0.61V RB =
Hysteresis Voltage Check After calculating the resistors RB and RA, check to make sure the hystersis voltage at the IN1-IN4 pins is greater than 4mV. Use the following equation: VHYS =
( VON - VOFF ) * RA (2.2V - 1V) * 9.2k = 0.33V
VON 3.01V VOFF 2.68V VON 4.49V VOFF 3.99V VON 1.43V VOFF 1.27V VON 2.25V VOFF 2V
RA + RB For this example: 9.2k + 24k which is greater than 4mV. VHYS =
0.1F 24.9k VCC OUT1 OUT2 OUT3 OUT4 ON DONE FAULT TMR PGT HYS/CFG GND 49.9k
2924 TA03
15.8k
49.9k
33.2k
LTC2924
IN1 IN2 IN3 IN4 9.31k 11.81k 7.87k 8.45k
LTC2924
APPLICATIO S I FOR ATIO
Details of Resistor Calculations In this example, the voltage at the IN pins is 0.61V when the LTC2924 detects that the power supply is On during a Power On sequence or Off during a Power Off sequence. The delta voltage, V, represents the difference: V = 2.2V - 1V = 1.2V This delta voltage on RB will be equal to the hysteresis current IHYS. Therefore: Selecting the Power Good Timer (PGT) Capacitor During the Power On sequence, the PGT can be used to detect the failure of a power supply to reach the desired On voltage. The PGT is enabled each time a power supply is enabled by the OUT1-OUT4 pins. The PGT is reset each time an IN1-IN4 pin detects that a power supply is at the desired On voltage. Select the PGT timeout capacitor with the following equation: CPGT (F) = tPGT * 5000-3 F/s If no PGT is desired, the PGT pin must be shorted to ground. The accuracy of the PGT timeout will be affected by the capacitor leakage (the nominal charge current is 5A) and capacitor tolerance. A low leakage ceramic capacitor is recommended. Cascading Multiple LTC2924s Two or more LTC2924s may be cascaded to fully sequence 8,12 or more power supplies. Figures 7 and 8 show how to configure the LTC2924 to sequence 8 and 12 power supplies. To sequence more power supplies, use the circuit in Figure 8 and add more LTC2924s in the middle. Notice that the last LTC2924 in the cascade string must have a pull-up resistor on the DONE pin. Any LTC2924 that is not the first in the cascade string should have the hysteresis current setting resistor, RHYS, pulled to VCC instead of ground. The value of the RHYS resistor remains unchanged. The FAULT pins should all be connected together and pulled up with a single 10k resistor. All VCC pins for the LTC2924s in the cascade chain must be connected to the same power supply.
RB =
V 1.2V = = 24k IHYS 50A
The current IRB at the Power On voltage of 2.2V is: 2.2V - 0.61V IRB = = 66A 24k During the Power On sequence, IHYS = 0, so IFB is equal to IRB and RA is:
RA =
0.61 = 9.2k 66A
VOFF Precaution Use caution if designs call for VOFF voltages less than ~0.8V. Many loads stop using significant current below this level, and the power supply may take a long time to go below this voltage. If VOFF voltages at or less than this voltage are necessary, consider adding an extra resistive load at the output of the power supply to ensure it discharges in a reasonable amount of time. Selecting the Timing Capacitor During the Power On sequence, the timer is used to create a delay between the time one supply reaches the On threshold and the next supply is enabled. During the Power Off sequence, the timer is used to create a delay between the time one supply reaches the Off threshold and the next supply is disabled. Select the timing capacitor with the following equation: CTMR (F) = tDELAY * 5000-3 F/s
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Leaving the TMR pin unconnected will generate the minimum delay. The accuracy of the time delay will be affected by the capacitor leakage (the nominal charge current is 5A) and capacitor tolerance. A low leakage ceramic capacitor is recommended.
2924F
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LTC2924
APPLICATIO S I FOR ATIO
TMR HYS/CFG RHYS ON
ON LTC2924 PGT IN1 IN2 IN3 IN4 FAULT OUT1 OUT2 OUT3 OUT4 DONE
Figure 7. Cascading Two LTC2924s to Fully Sequence Up to Eight Power Supplies
VCC
TMR HYS/CFG RHYS ON
VCC GND
RHYS
ON LTC2924 PGT IN1 IN2 IN3 IN4 FAULT OUT1 OUT2 OUT3 OUT4 DONE
Figure 8. Cascading Three LTC2924s to Fully Sequence Up to 12 Power Supplies
Cascade Handshaking When two or more LTC2924 chips are cascaded together they communicate using a combination of levels and pulses which do not look like the normal output of a DONE pin nor input to an ON pin. Do not connect any other components to the node between the DONE and ON pins. When laying out multiple LTC2924s in the cascaded configuration, keep the parasitic capacitance on this node below 75pF. Connecting Unused OUT and IN Pins Figure 9 shows how to connect unused OUT and IN pins on the LTC2924. Unused OUT-IN pairs must be connected together to ensure proper operation.
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VCC VCC GND RHYS TMR HYS/CFG VCC GND ON LTC2924 PGT IN1 IN2 IN3 IN4 FAULT OUT1 OUT2 OUT3 OUT4 DONE VCC 10k FAULT
2924 F07
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VCC 10k DONE
TMR HYS/CFG
VCC GND
RHYS
TMR HYS/CFG
VCC GND
ON LTC2924 PGT IN1 IN2 IN3 IN4 FAULT OUT1 OUT2 OUT3 OUT4 DONE
ON LTC2924 PGT IN1 IN2 IN3 IN4 FAULT OUT1 OUT2 OUT3 OUT4 DONE VCC 10k FAULT
2924 F08
VCC 10k DONE
PS1
PS2
LTC2924 IN1 IN2 IN3 IN4 OUT1 OUT2 OUT3 OUT4
2924 F09
Figure 9. Connecting Unused OUT and IN Pins
2924F
LTC2924
APPLICATIO S I FOR ATIO
Fault Detection The LTC2924 has sophisticated fault detection which can detect: * Power On and Power Off sequence errors * System controller command errors * Power On timeout failure (with the power good timer enabled) * Externally commanded faults (FAULT pin pulled low) If any of the above faults are detected, the LTC2924 immediately pulls the OUT1-OUT4 pins low turning off all of the power supplies. If the fault condition is detected in one of the supplies controlled by the LTC2924 (an "internally generated" fault), the FAULT pin is immediately pulled low indicating the fault condition. Clearing the Fault Condition In order to clear the fault condition within the LTC2924, the following conditions must exist: * All four IN pins must be below 0.61V * The ON pin must be below 0.61V * In the case of an externally generated fault, the FAULT pin must not be pulled down. Fault Condition Indicator If the LTC2924 receives a commanded fault (a cascaded LTC2924 or an external source pulls down on the FAULT pin) the LTC2924 will pull the TMR pin low. If the LTC2924 has detected the fault itself (from its internal fault detection circuits) it will indicate so by raising the TMR pin to VCC. This internal/external fault indicator can be especially helpful while searching for the source of a fault condition when multiple LTC2924s are cascaded. If a fault occurs when the ON pin is high, the fault status indication on the TMR pin will remain valid until the ON pin goes low. Note that the TMR pin may take a while to reach the VCC voltage. The pin is pulled to VCC with the same 5A current source used for the TMR function. The larger the timer
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capacitor, the longer this will take. To estimate the amount of time required for the TMR pin to reach VCC in a fault condition, multiply the normal timer duration by VCC (in Volts). See Figures 7 and 8 for FAULT pin connections when two or more LTC2924 chips are cascaded. Sequence Errors The LTC2924 keeps track of power supplies that should be on during the Power On sequence and the Power Off sequence. The LTC2924 also monitors each IN pin after all of the power supplies have sequenced on. If a power supply (as monitored at the IN1-IN4 pins) goes low when it should be high, a fault condition is detected. All four OUT pins are pulled low and the FAULT pin will be pulled low. The precision voltage threshold for detection of a sequence error at any of the IN1-IN4 pins is the same as the normal threshold (~0.61V). The precision voltage comparators used in the LTC2924 employ a sampled technique to improve accuracy. The sample time is approximately 20s. To improve the speed of detection for a sequence error, a second high speed comparator is used for detecting a low power supply. The voltage threshold for the high speed comparators is approximately 0.4V (VON(FAULT)). Voltages sensed below this threshold when a power supply should be ON will cause a fault in ~1s. System Controller ON Command Errors Once the LTC2924 receives the Power On command via the ON pin, the ON pin must remain above 0.61V until the Power On sequence has completed (e.g. DONE is asserted). Removing the ON command before the LTC2924 Power On sequence has completed is considered a fault condition. All of the OUT1-OUT4 pins that are already high will be pulled low and the FAULT pin will be pulled low. The same is true for the Power Off sequence. If the LTC2924 has completed the Power On sequence and the ON pin goes low, the ON pin must remain below 0.61V until the Power Off sequence has completed. Raising the ON pin above 0.61V before the Power Off sequence has completed is considered a fault condition. Any OUTn pins that are still high will immediately be pulled low and the FAULT pin will be pulled low.
2924F
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LTC2924
APPLICATIO S I FOR ATIO
Power On Timeout Errors If the LTC2924 PGT is being used (not tied to ground) a fault condition will be detected when the PGT pin goes above ~1V. If this occurs during Power On, all of the OUT1OUT4 pins that are already high will be pulled low and the FAULT pin will be pulled low.
TYPICAL APPLICATIO S
Shutdown Pin Power Supply Sequencer
POWER SUPPLY 1 3.3V SHDN 5V SHDN 1.6V SHDN 2.5V SHDN 0.1F 24.9k VCC OUT1 10k 10k OUT2 OUT3 OUT4 ON SYSTEM CONTROLLER DONE FAULT *5V EARLY MUST BE ON BEFORE SEQUENCING SUPPLIES 150nF 150nF TMR PGT HYS/CFG GND 49.9k
2924 TA03
POWER SUPPLY 2
POWER SUPPLY 3
POWER SUPPLY 4 5V EARLY*
Power On Sequence Timer Delay Longer than Power Off Sequence Timer Delay
VCC 0.1F OUT1 OUT2 LTC2924 OUT3 OUT4 PGT FAULT GND DONE
2924 TA05
150nF 150nF
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Externally Commanded Faults If an external circuit pulls the FAULT pin low, an external fault condition is detected and all OUT pins will be pulled low. After sensing the Externally Commanded Fault, the LTC2924 will also pull down on the FAULT pin until the conditions for clearing the fault condition exist (see Clearing the Fault Condition).
VON 3.01V VOFF 2.68V VON 4.49V VOFF 3.99V VON 1.43V VOFF 1.27V VON 2.25V VOFF 2V 15.8k 49.9k 33.2k LTC2924 IN1 IN2 IN3 IN4 9.31k 11.81k 7.87k 8.45k
VCC IN1 IN2 IN3 IN4 ON TMR VCC 10k POWER ON TIMER DELAY = 30ms POWER OFF TIMER DELAY = 15ms
2924F
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LTC2924
TYPICAL APPLICATIO S
2-Supply Sequencer with Delayed Sense Pin, One Channel Unused
PARASITIC RESISTANCE
OUT
+
MODULE SENSE+ 5V DC/DC 3.3V SHDN
10k
SYSTEM CONTROLLER
D1: 1N5711 Q1, Q2: IRL3714S
Power-On
REMOTE SENSE ENABLE 5V 2V/DIV 3.3V
2V/DIV
1V/DIV 1V/DIV
25ms/DIV
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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Q1 Q2 D1
VOUT VON 4.64V 5V VOFF 4V
1M
VOUT VON 2.98V 3.3V VOFF 2.65V
0.1F OUT4 10k OUT3 OUT2 VCC IN4 IN3 64.9k 33.2k
OUT1 IN2 LTC2924 ON IN1 FAULT DONE TMR 150nF PGT HYS GND 49.9k 150nF 9.83k 8.55k
2924 TA01a
Power-Off
REMOTE SENSE DISABLE
5V 3.3V
ON TMR
1V/DIV 1V/DIV
ON TMR
2924 TA01b
25ms/DIV
2924 TA01C
2924F
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LTC2924
TYPICAL APPLICATIO
SYSTEM 12V SUPPLY
12V 3-Supply Sequencer with LTC2924 Power Supplied by a Zener Shunt Regulator
12V ON 1.1V, OFF 1.09V 1k 1.24k ON 3V, OFF 2.8V VIN 3.3V SHDN 20k 5.11k ON 2.2V, OFF 2V VIN 2.5V SHDN 49.9k 7.68k ON 1.5k 2.94k LTC2924 VCC 0.1F OUT4 IN4 OUT3 IN3 OUT2 IN2 OUT1 IN1 HYS/CFG 49.9k TMR 150nF DONE FAULT GND PGT 150nF VCC VCC 10k 10k 20k ASIC VCC1 VCC2 C VCC1 VCC2 RESET_B FPGA VCC1 VCC2
5.1V ZENER BZX84C5V1
PACKAGE DESCRIPTIO
.015 .004 x 45 (0.38 0.10) .007 - .0098 (0.178 - 0.249) .016 - .050 (0.406 - 1.270)
NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE
.0532 - .0688 (1.35 - 1.75)
0 - 8 TYP .229 - .244 (5.817 - 6.198) .150 - .157** .254 MIN (3.810 - 3.988)
.008 - .012 (0.203 - 0.305) TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
RELATED PARTS
PART NUMBER LTC2920-1/ LTC2920-2 LTC2921/LTC2922 LTC2923 LTC2925 DESCRIPTION Single/Dual Power Supply Margining Controller Power Supply Tracker with Input Monitors Power Supply Tracking Controller Multiple Power Supply Tracking Controller COMMENTS Symmetric/Asymmetric High and Low Voltage Margining 3 (LTC2921) or 5 (LTC2922) Remote Sense Switching Up to 3 Supplies Power Good Timer, Remote Sense Switch
2924F LT/TP1204 1K * PRINTED IN USA
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
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VIN 1.2V SHDN
2924 TA04
GN Package 16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 - .196* (4.801 - 4.978)
.004 - .0098 (0.102 - 0.249)
16 15 14 13 12 11 10 9
.009 (0.229) REF
.045 .005
.0250 (0.635) BSC
.150 - .165
1
23
4
56
7
8
.0165 .0015
.0250 BSC
GN16 (SSOP) 0204
RECOMMENDED SOLDER PAD LAYOUT
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2004

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