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PD - 9.1413D
IRLMS5703
HEXFET(R) Power MOSFET
l l l l
Generation V Technology Micro6 Package Style Ultra Low Rds(on) P-Channel MOSFET
D
1
6
A D
VDSS = -30V
D
2
5
D
G
3
4
S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The Micro6 package with its customized leadframe produces a HEXFET power MOSFET with Rds(on) 60% less than a similar size SOT-23. This package is ideal for applications where printed circuit board space is at a premium. It's unique thermal design and RDS(on) reduction enables a current-handling increase of nearly 300% compared to the SOT-23.
RDS(on) = 0.20
T op V iew
M icro 6
Absolute Maximum Ratings
Parameter
ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C VGS dv/dt TJ, TSTG Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @- 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range
Max.
-2.3 -1.9 -13 1.7 13 20 5.0 -55 to + 150
Units
A W
mW/C
V V/ns C
Thermal Resistance Ratings
Parameter
RJA Maximum Junction-to-Ambient
Min.
---
Typ.
---
Max
75
Units
C/W
8/25/97
IRLMS5703
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(on) VGS(th) gfs IDSS I GSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Min. -30 --- --- --- -1.0 1.1 --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.01 --- --- --- --- --- --- --- --- 7.2 1.4 2.3 10 12 20 8.4 170 89 44
Max. Units Conditions --- V VGS = 0V, ID = -250A --- V/C Reference to 25C, ID = -1mA 0.20 VGS = -10V, ID = -1.6A 0.40 VGS = -4.5V, ID = -0.80A --- V VDS = VGS , ID = -250A --- S VDS = -10V, ID = -0.80A -1.0 VDS = -24V, VGS = 0V A -25 VDS = -24V, VGS = 0V, TJ = 125C 100 VGS = -20V nA -100 VGS = 20V 11 ID = -1.6A 2.1 nC VDS = -24V 3.4 VGS = -10V, See Fig. 6 and 9 --- VDD = -15V --- ID = -1.6A ns --- RG = 6.2 --- RD = 9.2, See Fig. 10 --- VGS = 0V --- pF VDS = -25V --- = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge
Min. Typ. Max. Units --- --- --- --- --- --- --- --- 29 27 -1.7 A -13 -1.2 44 41 V ns nC
Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25C, IS = -1.6A, VGS = 0V TJ = 25C, I F = -1.6A di/dt = -100A/s
D
S
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%. Surface mounted on FR-4 board, t 5sec.
ISD -1.6A, di/dt -140A/s, VDD V(BR)DSS ,
TJ 150C
IRLMS5703
100
VGS - 15V - 10V - 7.0V - 5.5V - 4.5V - 4.0V - 3.5V BOTT OM - 3.0V TOP
100
-I D , D ra in -to -S o u rc e C u rre n t (A )
10
-I D , D ra in -to -S o u rce C u rre n t (A )
VGS - 15V - 10V - 7.0V - 5.5V - 4.5V - 4.0V - 3.5V BOTT OM - 3.0V TOP
10
1
1
-3 .0V
-3.0 V
0.1 0.1 1
20 s P U LSE W IDTH TJ = 25 C A
10
0.1 0.1 1
20 s P U LSE W IDTH TJ = 15 0C A
10
-VD S , D rain-to-S ource V oltage (V )
-VD S , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.0
R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce (N o rm a li ze d )
I D = -1.6A
-I D , D rain -to- S our ce C urr ent ( A )
1.5
10
TJ = 2 5 C TJ = 1 5 0 C
1.0
1
0.5
0.1 3.0 4.0 5.0
V DS = -1 0 V 2 0 s P U L S E W ID T H
6.0 7.0 8.0
A
0.0 -60 -40 -20 0 20 40 60 80
VG S = -10 V
100 120 140 160
A
-VG S , Ga te-to-S o urce V oltage (V )
T J , Junction T emperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRLMS5703
350
300
-V G S , G a te -to -S o u rce V o lta g e (V )
V GS C is s C rs s C os s
= = = =
0V , f = 1MH z C gs + C g d , Cds SH OR TED Cgd C ds + C gd
20
I D = -1 .6A V DS = - 24V V DS = - 15V
16
C , C a p a c ita n c e (p F )
250
C is s
200
12
C o ss
150
8
100
C rss
50
4
0 1 10 100
A
0 0 2 4 6
FOR TE ST C IR C U IT SE E FIG U R E 9
8 10 12
A
-VD S , Drain-to-Source V oltage (V)
Q G , Total G ate C harge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
-IS D , R e ve rse D ra in C u rre n t (A )
OPE R ATIO N IN TH IS A RE A LIMITE D BY R D S(o n)
10
-I D , D ra in C u rre n t (A )
10 100 s
TJ = 1 50 C TJ = 25 C
1
1m s 1 10m s
0.1 0.4 0.6 0.8 1.0
VG S = 0 V
1.2
A
0.1 1
T A = 25 C T J = 15 0C S ing le Pulse
10
A
100
1.4
-VS D , S ource-to-Drain V oltage (V )
-V D S , D rain-to-S ource Voltage (V )
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRLMS5703
VDS RD
QG
-10V
QGS VG QGD
RG
VGS
D.U.T.
+
-10V
Pulse Width 1 s Duty Factor 0.1 %
Charge
Fig 9a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
Fig 10a. Switching Time Test Circuit
td(on) tr t d(off) tf
50K 12V .2F .3F
VGS 10%
+ D.U.T. VDS
VGS
-3mA
90%
IG ID
VDS
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
100 D = 0.50
Fig 10b. Switching Time Waveforms
(Z thJA )
0.20 10 0.10 0.05 0.02 1 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t1 / t 2 2. Peak T J = P DM x Z thJA + TA 0.0001 0.001 0.01 0.1 1 10 100
Thermal Response
PDM t1 t2
0.1 0.00001
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
-
VDD
IRLMS5703
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS*
**
* dv/dt controlled by RG * I SD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ -
VDD
*
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 13. For P-Channel HEXFETS
IRLMS5703
Package Outline
Micro6 Outline
3. 00 (. 11 8 ) 2. 80 (. 11 1 )
LEA D ASS IG N MEN TS
-B D D S
RE CO MMEN DE D FO O T PRIN T
2X 0 . 95 (.0 37 5 ) 6X (1. 0 6 (.0 4 2 )
1 .7 5 (. 06 8 ) 1 .5 0 (. 06 0 ) -A -
6 1
5 2
4 3
3 .0 0 (.1 1 8 ) 2 .6 0 (.1 0 3 )
6 1
5 2
4 3 2 .2 0 (.0 8 7 )
0 .9 5 ( .0 3 75 ) 2X 0. 15 6X
D 0 .5 0 (. 01 9 ) 0 .3 5 (. 01 4 )
D
G 6 X 0 . 6 5 (. 0 2 5 )
(. 00 6 ) M C A S B S
0 -1 0 1 .3 0 (. 05 1 ) 0 .9 0 (. 03 6 ) -C 0 .1 5 (. 00 6 ) MAX. 1. 4 5 (.0 5 7 ) 0. 9 0 (.0 3 6 ) 0 .1 0 (. 00 4 ) 6 S UR F A CE S
O
O
6X
0 .2 0 (. 00 7 ) 0 .0 9 (. 00 4 )
0 .6 0 (. 02 3 ) 0 .1 0 (. 00 4 )
N O TE S : 1 . D IM E N S I O N I N G & T O LE R A N C I N G P E R A N S I Y 1 4. 5 M -19 8 2. 2 . C O N T R O L LI N G D I M E N S IO N : M IL L I M E T E R . 3 . D IM E N S I O N S A R E S H O W N IN M IL LI M E T E R S (I N C H E S ).
Part Marking Information
Micro6
E XA M PL E : TH IS IS AN IR LM S 6702 P ART N UM B ER D ATE C O DE W O RK W EE K 01 02 03 04 Y EA R 2 001 2 002 2 003 2 004 2 005 1 996 1 997 1 998 1 999 2 000 Y A B C D E F G H J K W O RK WEEK 27 28 29 30 W A B C D
Y E AR 2 001 2 002 2 003 2 004 2 005 1 996 1 997 1 998 1 999 2 000
Y 1 2 3 4 5 6 7 8 9 0
W A B C D
TOP W A FE R LO T N U M B ER CO DE
B O TT O M
P A RT NU MB E R EX A MP LE S: 2 A = IR LM S 1902 2 B = IR LM S 1503 2 C = IR LM S6 702 2 D = IR LM S5 703 DA TE C O DE EX A MP LE S: YW W = 96 03 = 6C YW W = 96 32 = FF
24 25 26
X Y Z
50 51 52
X Y Z
W O RK W E E K = ( 1-2 6) IF P R EC ED ED B Y LA ST D IG IT O F C ALE N DE R YE AR W O R K W EE K = ( 2 7- 52) IF PR EC ED ED BY A LE TTE R
IRLMS5703
Tape & Reel Information
Micro6
8m m
4m m
F E E D D IR E C T IO N
N O TE S : 1 . O UTL IN E C O N FO RM S TO E IA -48 1 & EIA - 541 .
17 8 . 00 ( 7 . 0 08 ) M AX.
9 .9 0 ( .3 9 0 ) 8 .4 0 ( .3 3 1 ) NO TES: 1 . C O N T R O L L IN G D IM E N S IO N : M I LL IM E T E R . 2 . O U T L IN E C O N F O R M S T O E IA - 48 1 & E IA -5 4 1.
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 8/97

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