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| PD - 91301C IRL3803 HEXFET(R) Power MOSFET Logic-Level Gate Drive Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated Description l l D VDSS = 30V G S RDS(on) = 0.006 ID = 140A Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry. TO-220AB Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw. Max. 140 98 470 2000 1.3 16 610 71 20 5.0 -55 to + 175 300 (1.6mm from case) 10 lbf*in (1.1N*m) Units A W W/C V mJ A mJ V/ns C Thermal Resistance Parameter RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Min. ---- ---- ---- Typ. ---- 0.50 ---- Max. 0.75 ---- 62 Units C/W 8/20/96 IRL3803 Electrical Characteristics @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Max. Units Conditions --- V V GS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.006 VGS = 10V, ID = 71A 0.009 VGS = 4.5V, ID = 59A --- V VDS = V GS, ID = 250A --- S V DS = 25V, ID = 71A 25 VDS = 30V, VGS = 0V A 250 VDS = 24V, VGS = 0V, TJ = 150C 100 VGS = 16V nA -100 VGS = -16V 140 ID = 71A 41 nC VDS = 24V 78 VGS = 4.5V, See Fig. 6 and 13 --- VDD = 15V --- ID = 71A ns --- RG = 1.3, VGS = 4.5V --- RD = 0.20, See Fig. 10 Between lead, --- 4.5 --- 6mm (0.25in.) nH from package --- 7.5 --- and center of die contact --- 5000 --- VGS = 0V --- 1800 --- pF VDS = 25V --- 880 --- = 1.0MHz, See Fig. 5 Min. 30 --- --- --- 1.0 55 --- --- --- --- --- --- --- --- --- --- --- Typ. --- 0.052 --- --- --- --- --- --- --- --- --- --- --- 14 230 29 35 D G S Source-Drain Ratings and Characteristics IS ISM VSD trr Q rr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions MOSFET symbol --- --- 140 showing the A G integral reverse --- --- 470 p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 71A, VGS = 0V --- 120 180 ns TJ = 25C, IF = 71A --- 450 680 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) D S Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) VDD = 15V, starting TJ = 25C, L = 180H RG = 25, IAS = 71A. (See Figure 12) ISD 71A, di/dt 130A/s, VDD V(BR)DSS, TJ 175C Notes: Pulse width 300s; duty cycle 2%. Caculated continuous current based on maximum allowable junction temperature;for recommended current-handling of the package refer to Design Tip # 93-4 IRL3803 10000 TOP VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.0V 10000 ID , D rain-to-S ource C urrent (A ) 1000 100 ID , Drain-to-Source Current (A ) 1000 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.0V TOP 100 10 10 1 1 2.0V 0.1 2 .0 V 0.01 0.1 1 0.1 2 0 s P U LS E W ID T H T J = 2 5C 10 A 100 0.01 0.1 1 2 0 s P U LS E W ID TH T J = 1 75 C 10 V D S , D rain-to-S ource V oltage (V ) 100 A V D S , D rain-to-S ource V oltage (V ) Fig 1. Typical Output Characteristics, TJ = 25oC Fig 2. Typical Output Characteristics, TJ = 175oC 1000 2.0 I D , D rain-to-So urce C urren t (A ) T J = 2 5C 100 TJ = 1 75 C R D S (on ) , D rain-to-S ource O n R esistance (N orm alized) I D = 1 20 A 1.5 10 1.0 1 0.5 0.1 0.01 2.0 3.0 4.0 5.0 V DS = 2 5V 2 0 s P U L S E W ID TH 6.0 7.0 8.0 9.0 A 0.0 -60 -40 -20 0 20 40 60 80 V G S = 10 V 100 120 140 160 180 A V G S , G ate-to -So urce Voltag e (V) T J , Junction T em perature (C ) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature IRL3803 10000 8000 6000 C oss V G S , G a te-to-S ou rc e V o ltag e (V ) V GS C iss C C iss C rs s o ss = = = = 0V , f = 1MHz C g s + C g d , C d s S H O R TE D C gd C ds + C g d 15 I D = 7 1A V D S = 2 4V V D S = 1 5V 12 C , Capacitance (pF) 9 4000 6 C rss 2000 3 0 1 10 100 A 0 0 40 80 FO R TE S T CIR C U IT S E E FIG U R E 1 3 120 160 A 200 V D S , D rain-to-S ourc e V oltage (V ) Q G , T otal G ate C harge (nC ) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 I S D , R everse Drain C urrent (A ) O P E R A T IO N IN T H IS A R E A L IM ITE D B Y R D S (o n) 10 s TJ = 17 5C 100 I D , D rain Current (A ) 100 100 s T J = 25 C 1m s 10 0.4 0.8 1.2 1.6 2.0 2.4 V G S = 0V 2.8 A 10 1 T C = 25 C T J = 17 5C S ing le P u lse 10 10m s 100 3.2 A V S D , S ourc e-to-D rain V oltage (V ) V D S , D rain-to-S ource V oltage (V ) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area IRL3803 140 LIMITED BY PACKAGE 120 VDS VGS RG RD D.U.T. + I D , Drain Current (A) 100 -VDD 80 4.5V Pulse Width 1 s Duty Factor 0.1 % 60 40 Fig 10a. Switching Time Test Circuit VDS 90% 20 0 25 50 75 100 125 150 175 TC , Case Temperature ( C) 10% VGS td(on) tr t d(off) tf Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms 1 Thermal Response (Z thJC ) D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 P DM t1 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 t2 0.01 0.00001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case IRL3803 VDS D.U.T. RG + V - DD 4.5 V E A S , S ingle Pulse Avalanc he E nergy (m J) L 1500 TOP 1200 B O TT O M ID 29 A 5 0A 71 A IAS tp 0.01 900 600 Fig 12a. Unclamped Inductive Test Circuit 300 V(BR)DSS tp VDD VDS 0 V D D = 15 V 25 50 75 100 125 150 A 175 S tarting T J , J unc tion T em perature (C ) Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50K QG 12V .2F .3F 4.5 V QGS VG QGD VGS 3mA D.U.T. + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit IRL3803 Peak Diode Recovery dv/dt Test Circuit D.U.T + + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS IRL3803 TO-220AB Package Outline Dimensions are shown in millimeters (inches) 2 .8 7 (.1 1 3 ) 2 .6 2 (.1 0 3 ) 1 0 .5 4 (.4 1 5 ) 1 0 .2 9 (.4 0 5 ) 3 .7 8 (.1 4 9 ) 3 .5 4 (.1 3 9 ) -A6.4 7 (.2 5 5 ) 6.1 0 (.2 4 0 ) -B4 .6 9 (.1 8 5 ) 4 .2 0 (.1 6 5 ) 1 .3 2 (.0 5 2 ) 1 .2 2 (.0 4 8 ) 4 1 5 .2 4 (.6 0 0 ) 1 4 .8 4 (.5 8 4 ) 1 .1 5 (.0 4 5 ) M IN 1 2 3 L E A D A S S IG N M E N T S 1 - GATE 2 - D R A IN 3 - S OU RC E 4 - D R A IN 1 4 .0 9 (.5 5 5 ) 1 3 .4 7 (.5 3 0 ) 4 .0 6 (.1 6 0 ) 3 .5 5 (.1 4 0 ) 3X 3X 1 .4 0 (.0 5 5 ) 1 .1 5 (.0 4 5 ) 0 .9 3 (.0 3 7 ) 0 .6 9 (.0 2 7 ) M BAM 3X 0 .5 5 (.0 2 2 ) 0 .4 6 (.0 1 8 ) 0 .3 6 (.0 1 4 ) 2 .5 4 (.1 0 0) 2X N O TE S : 1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 2 C O N T R O L L IN G D IM E N S IO N : IN C H 2 .9 2 (.1 1 5 ) 2 .6 4 (.1 0 4 ) 3 O U T L IN E C O N F O R M S T O J E D E C O U T L IN E T O -2 2 0 A B . 4 H E A T S IN K & L E A D M E A S U R E M E N T S D O N O T IN C L U D E B U R R S . TO-220AB Part Marking Information EXAMPLE: THIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN THE AS S EMBLY LINE "C" INTERNATIONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 8/96 |
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