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 TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
D D D D D D D D D D D
Compatible With PC 99 Desktop Line-Out Into 10-k Load Compatible With PC 99 Portable Into 8- Load Internal Gain Control, Which Eliminates External Gain-Setting Resistors DC Volume Control From 20 dB to -40 dB 2-W/Ch Output Power Into 3- Load PC-Beep Input Depop Circuitry Stereo Input MUX Fully Differential Input Low Supply Current and Shutdown Current Surface-Mount Power Packaging 24-Pin TSSOP PowerPAD
PWP PACKAGE (TOP VIEW)
GND PCB ENABLE VOLUME LOUT+ LLINEIN LHPIN PVDD RIN LOUT- LIN BYPASS GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
GND RLINEIN SHUTDOWN ROUT+ RHPIN VDD PVDD CLK ROUT- SE/BTL PC-BEEP GND
description
The TPA0132 is a stereo audio power amplifier in a 24-pin TSSOP thermally enhanced package capable of delivering 2 W of continuous RMS power per channel into 3- loads. This device minimizes the number of external components needed, which simplifies the design and frees up board space for other features. When driving 1 W into 8- speakers, the TPA0132 has less than 0.4% THD+N across its specified frequency range. Included within this device is integrated depop circuitry that virtually eliminates transients that cause noise in the speakers. Amplifier gain is controlled by means of a dc voltage input on the VOLUME terminal. There are 31 discrete steps covering the range of 20 dB (maximum volume setting) to -40 dB (minimum volume setting) in 2-dB steps. When the VOLUME terminal exceeds 3.54 V, the device is muted. An internal input MUX allows two sets of stereo inputs to the amplifier. In notebook applications, where internal speakers are driven as BTL and the line outputs (often headphone drive) are required to be SE, the TPA0132 automatically switches into SE mode when the SE/BTL input is activated, and this effectively reduces the gain by 6 dB. The TPA0132 consumes only 10 mA of supply current during normal operation. A shutdown mode is included that reduces the supply current to less than 150 A. The PowerPAD package (PWP) delivers a level of thermal performance that was previously achievable only in TO-220-type packages. Thermal impedances of approximately 35C/W are readily realized in multilayer PCB applications. This allows the TPA0132 to operate at full power into 8- loads at ambient temperatures of 85C.
AVAILABLE OPTIONS TA PACKAGED DEVICE TSSOP (PWP)
- 40C to 85C TPA0132PWP The PWP package is available taped and reeled. To order a taped and reeled part, add the suffix R to the part number (e.g., TPA0132PWPR).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2001, Texas Instruments Incorporated
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1
TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
functional block diagram
RHPIN RLINEIN R MUX 32-Step Volume Control
- ROUT+ VOLUME +
RIN
- ROUT- +
PC-BEEP PCB ENABLE
PC Beep Depop Circuitry MUX Control Power Management PVDD VDD BYPASS SHUTDOWN GND
SE/BTL
LHPIN LLINEIN
L MUX
32-Step Volume Control
- LOUT+ +
LIN
- LOUT- +
2
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
Terminal Functions
TERMINAL NAME BYPASS CLK GND LHPIN LIN LLINEIN LOUT+ LOUT- PCB ENABLE NO. 11 17 1, 12 13, 24 6 10 5 4 9 2 I I I O O I I I/O DESCRIPTION Tap to voltage divider for internal mid-supply bias generator If a 47-nF capacitor is attached, the TPA0132 generates an internal clock. An external clock can override the internal clock input to this terminal. Ground connection for circuitry. Connected to thermal pad Left channel headphone input, selected when SE/BTL is held high Common left input for fully differential input. AC ground for single-ended inputs. Left channel line negative input, selected when SE/BTL is held low Left channel positive output in BTL mode and positive output in SE mode Left channel negative output in BTL mode and high-impedance in SE mode If this terminal is high, the detection circuitry for PC-BEEP is overridden and passes PC-BEEP through the amplifier, regardless of its amplitude. If PCB ENABLE is floating or low, the amplifier continues to operate normally. The input for PC-Beep mode. PC-BEEP is enabled when a > 1-V (peak-to-peak) square wave is input to PC-BEEP or PCB ENABLE is high. Power supply for output stage Right channel headphone input, selected when SE/BTL is held high Common right input for fully differential input. AC ground for single-ended inputs. Right channel line input, selected when SE/BTL is held low Right channel positive output in BTL mode and positive output in SE mode Right channel negative output in BTL mode and high-impedance in SE mode Input and output MUX control. When this terminal is held high, the LHPIN or RHPIN and SE output is selected. When this terminal is held low, the LLINEIN or RLINEIN and BTL output are selected. When held low, this terminal places the entire device, except PC-BEEP detect circuitry, in shutdown mode. Analog VDD input supply. This terminal needs to be isolated from PVDD to achieve highest performance. VOLUME detects the dc level at the terminal and sets the gain for 31 discrete steps covering a range of 20 dB to -40 dB for dc levels of 0.15 V to 3.54 V. When the dc level is over 3.54 V, the device is muted.
PC-BEEP PVDD RHPIN RIN RLINEIN ROUT+ ROUT- SE/BTL SHUTDOWN VDD VOLUME
14 7, 18 20 8 23 21 16 15 22 19 3
I I I I I O O I I I I
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VDD 0.3 V Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . Internally limited (see Dissipation Rating Table) Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 85C Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 150C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE TA 25C 2.7 W DERATING FACTOR TA = 70C 1.7 W TA = 85C 1.4 W
PWP 21.8 mW/C See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report (literature number SLMA002), for more information on the PowerPAD package. The thermal data was measured on a PCB layout based on the information in the section entitled Texas Instruments Recommended Board for PowerPAD on page 33 of the before mentioned document.
recommended operating conditions
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Supply voltage, VDD 4.5 4 2 5.5 V V V High-level High level input voltage, VIH voltage Low-level Low level input voltage VIL voltage, SE/BTL SE/BTL SHUTDOWN SHUTDOWN 3
MIN
MAX
UNIT
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Operating free-air temperature, TA - 40 85 C
0.8
electrical characteristics at specified free-air temperature, VDD = 5 V, TA = 25C (unless otherwise noted)
PARAMETER |VOO| |IIH| |IIL| ZI Output offset voltage (measured differentially) Power supply rejection ratio High-level input current Low-level input current Input impedance Supply current TEST CONDITIONS VI = 0 V, AV = 2 V/V VDD = 4 V to 5 V VDD = 5.5 V, VDD = 5.5 V, BTL mode SE mode MIN TYP MAX UNIT mV dB nA nA 25
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PSRR 67 VI = VDD 900 900 VI = 0 V See Figure 28 10 5 IDD 15 7.5 mA A IDD(SD) Supply current, shutdown mode 150 300 4
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
operating characteristics, VDD = 5 V, TA = 25C, RL = 4 , Gain = 2 V/V, BTL mode (unless otherwise noted)
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PO THD+N BOM Output power THD = 1%, PO = 1 W, THD = 5% f = 1 kHz 2 W Total harmonic distortion plus noise Maximum output power bandwidth Supply ripple rejection ratio f = 20 Hz to 15 kHz BTL mode SE mode BTL mode SE mode 0.4% >15 65 60 34 44 kHz dB f = 1 kHz, , C(BYP) = 0.47 F Vn Noise output voltage C(BYP) = 0.47 F, f = 20 Hz to 20 kHz VRMS
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE vs Output power THD+N Total harmonic distortion plus noise vs Voltage gain vs Frequency vs Output voltage Vn Output noise voltage Supply ripple rejection ratio Crosstalk Shutdown attenuation SNR PO PD Zi Signal-to-noise ratio Closed loop response Output power Power dissipation Input impedance vs Load resistance vs Output power vs Ambient temperature vs Gain vs Frequency vs Frequency vs Frequency vs Frequency vs Frequency 1, 4, 6, 8, 10 2 3, 5, 7, 9, 11 12 13 14, 15 16, 17, 18 19 20 21, 22 23, 24 25, 26 27 28
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
TYPICAL CHARACTERISTICS
TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER
10% THD+N -Total Harmonic Distortion + Noise THD+N -Total Harmonic Distortion + Noise
TOTAL HARMONIC DISTORTION PLUS NOISE vs VOLTAGE GAIN
1% PO = 1 W for AV 6 dB VO = 1 VRMS for AV 4 dB RL = 8 BTL
1% RL = 8
RL = 4 RL = 3
0.1%
0.1%
AV = 20 to 0 dB f = 1 kHz BTL 0.01% 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3
0.01% -40
-30
-20
-10
0
10
20
PO - Output Power - W
A V - Voltage Gain - dB
Figure 1
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
10% THD+N -Total Harmonic Distortion + Noise THD+N -Total Harmonic Distortion + Noise RL = 3 AV = 20 to 0 dB BTL
Figure 2
TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER
10%
1% PO = 1 W PO = 0.5 W 0.1%
1%
f = 20 kHz
f = 1 kHz 0.1% f = 20 Hz RL = 3 AV = 20 to 0 dB BTL 0.01% 0.01 0.1 1 PO - Output Power - W 10
PO = 1.75 W
0.01% 20
100
1k f - Frequency - Hz
10k 20k
Figure 3
Figure 4
6
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
TYPICAL CHARACTERISTICS
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
10% THD+N -Total Harmonic Distortion + Noise RL = 4 AV = 20 to 0 dB BTL 1% THD+N -Total Harmonic Distortion + Noise
TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER
10% RL = 4 AV = 20 to 0 dB BTL
1%
f = 20 kHz
PO = 0.25 W 0.1% PO = 1.5 W
f = 1 kHz 0.1%
f = 20 Hz
PO = 1 W 0.01% 20 100 1k f - Frequency - Hz 10k 20k
0.01% 0.01
0.1 1 PO - Output Power - W
10
Figure 5
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
10% THD+N -Total Harmonic Distortion + Noise THD+N -Total Harmonic Distortion + Noise RL = 8 AV = 20 to 0 dB BTL
Figure 6
TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER
10% RL = 8 AV = 20 to 0 dB BTL 1%
1%
f = 20 kHz
PO = 0.25 W 0.1%
PO = 0.5 W
0.1%
f = 1 kHz
0.01% 20
PO = 1 W 100 1k f - Frequency - Hz 10k 20k 0.01% 0.01
f = 20 Hz 0.1 1 PO - Output Power - W 10
Figure 7
Figure 8
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
TYPICAL CHARACTERISTICS
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
10% THD+N -Total Harmonic Distortion + Noise THD+N -Total Harmonic Distortion + Noise RL = 32 AV = 14 to 0 dB SE 1%
TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER
10%
1% f = 20 kHz
0.1% PO = 25 mW
0.1% f = 1 kHz RL = 32 AV = 14 to 0 dB SE 0.1 PO - Output Power - W 1
0.01% PO = 50 mW 0.001% 20 PO = 75 mW
100
1k f - Frequency - Hz
10k 20k
0.01% 0.01
f = 20 Hz
Figure 9
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
10% THD+N -Total Harmonic Distortion + Noise THD+N -Total Harmonic Distortion + Noise RL = 10 k AV = 14 to 0 dB SE 1%
Figure 10
TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT VOLTAGE
10%
1%
0.1% VO = 1 VRMS 0.01%
PO = 20 kHz 0.1%
PO = 1 kHz 0.01% RL = 10 k AV = 14 to 0 dB SE 0 0.2 0.4 0.6 0.8 1 1.2 1.4 PO = 20 Hz 1.6 1.8 2
0.001% 20
100
1k f - Frequency - Hz
10k 20k
0.001% VO - Output Voltage - VRMS
Figure 11
Figure 12
8
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
TYPICAL CHARACTERISTICS
OUTPUT NOISE VOLTAGE vs FREQUENCY
160 Vn - Output Noise Voltage - V RMS 140 120 100 AV = 20 dB 80 60 40 20 0 0 100 1k f - Frequency - Hz 10k 20k AV = 6 dB VDD = 5 V BW = 22 Hz to 22 kHz RL = 4 0 RL = 8 C(BYP) = 0.47 F BTL AV = 20 dB
SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY
Supply Ripple Rejection Ratio - dB
-20
-40
-60
-80 AV = 6 dB -100
-120 20 100 1k f - Frequency - Hz 10k 20k
Figure 13
SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY
0 RL = 32 C(BYP) = 0.47 F SE -40 -50 -60 Crosstalk - dB -40 AV = 6 dB -70 -80 -90 PO = 1 W RL = 8 AV = 20 dB BTL
Figure 14
CROSSTALK vs FREQUENCY
Supply Ripple Rejection Ratio - dB
-20
Left to Right
-60
-80
AV = 14 dB -100
Right to Left
-100
-110 -120 20
-120 20 100 1k f - Frequency - Hz 10k 20k
100
1k f - Frequency - Hz
10k 20k
Figure 15
Figure 16
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
TYPICAL CHARACTERISTICS
CROSSTALK vs FREQUENCY
-40 -50 -60 Crosstalk - dB -70 Left to Right -80 -90 -100 -110 -120 20 -100 Right to Left PO = 1 W RL = 8 AV = 60 dB BTL 0 VO = 1 VRMS RL = 10 k AV = 6 dB SE
CROSSTALK vs FREQUENCY
-20
Crosstalk - dB
-40
-60 Left to Right -80 Right to Left
100
1k f - Frequency - Hz
10k 20k
-120 20
100
1k f - Frequency - Hz
10k 20k
Figure 17
SHUTDOWN ATTENUATION vs FREQUENCY
0 VI = 1 VRMS SNR - Signal-To-Noise Ratio - dB -20 Shutdown Attenuation - dB RL = 10 k, SE -40 115 110 105 120 PO = 1 W RL = 8 BTL
Figure 18
SIGNAL-TO-NOISE RATIO vs FREQUENCY
-60 RL = 32 , SE -80
AV = 20 dB 100 95 90 AV = 6 dB 85 80
-100 RL = 8 , BTL -120 20 100 1k f - Frequency - Hz 10k 20k
0
100
1k f - Frequency - Hz
10k 20k
Figure 19
Figure 20
10
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
TYPICAL CHARACTERISTICS
CLOSED LOOP RESPONSE
30 25 20 Gain - dB 15 Phase 10 5 0 -5 -10 10 -180 100 1k 10k 100k 1M f - Frequency - Hz -90 0 Phase Phase RL = 8 AV = 20 dB BTL 180
Gain 90
Figure 21
CLOSED LOOP RESPONSE
30 25 20 Gain - dB 15 Phase 10 5 Gain 0 -5 -10 10 -180 100 1k 10k 100k 1M f - Frequency - Hz -90 0 RL = 8 AV = 6 dB BTL 90 180
Figure 22
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
TYPICAL CHARACTERISTICS
OUTPUT POWER vs LOAD RESISTANCE
3.5 3 PO - Output Power - W AV = 20 to 0 dB BTL 1500 AV = 14 to 0 dB SE 1250 PO - Output Power - mW
OUTPUT POWER vs LOAD RESISTANCE
2.5 2
1000
10% THD+N
750
1.5 1 0.5 0 0 8 16 24 32 40 48 RL - Load Resistance - 56 64
500 10% THD+N 250
1% THD+N 1% THD+N 0 0 8 24 32 16 40 48 RL - Load Resistance - 56 64
Figure 23
POWER DISSIPATION vs OUTPUT POWER
1.8 1.6 PD - Power Dissipation - W 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 f = 1 kHz BTL Each Channel 0.5 1 1.5 PO - Output Power - W 2 2.5 8 4 3 0.35 PD - Power Dissipation - W 0.3 0.25 0.2 0.4
Figure 24
POWER DISSIPATION vs OUTPUT POWER
4
8 0.15 0.1 32 0.05 0 0 f = 1 kHz SE Each Channel 0.4 0.5 0.6 0.3 0.2 PO - Output Power - W 0.7 0.8
0.1
Figure 25
Figure 26
12
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
TYPICAL CHARACTERISTICS
POWER DISSIPATION vs AMBIENT TEMPERATURE
7 JA4 6 PD - Power Dissipation - W JA1 = 45.9C/W JA2 = 45.2C/W JA3 = 31.2C/W JA4 = 18.6C/W ZI - Input Impedance - 90 80 70 60 50 40 30 20 10 -40
INPUT IMPEDANCE vs GAIN
5 4
JA3
3 JA1,2 2
1 0 -40 -20
0 20 40 60 80 100 120 140 160 TA - Ambient Temperature - C
-30
-10 -20 0 AV - Gain - dB
10
20
Figure 27
Figure 28
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION
Table 1. DC Volume Control
VOLUME (Terminal 3) FROM (V) 0 0.15 0.28 0.39 0.5 0.61 0.73 0.84 0.95 1.06 1.17 1.28 1.39 1.5 1.62 1.73 1.84 1.95 2.07 2.18 2.29 2.41 2.52 2.63 2.74 2.86 2.97 3.08 3.2 3.31 3.42 3.54 TO (V) 0.15 0.28 0.39 0.5 0.61 0.73 0.84 0.95 1.06 1.17 1.28 1.39 1.5 1.62 1.73 1.84 1.95 2.07 2.18 2.29 2.41 2.52 2.63 2.74 2.86 2.97 3.08 3.2 3.31 3.42 3.54 5 GAIN OF AMPLIFIER (dB) 20 18 16 14 12 10 8 6 4 2 0 -2 -4 -6 -8 - 10 - 12 - 14 - 16 - 18 - 20 - 22 - 24 - 26 - 28 - 30 - 32 - 34 - 36 - 38 - 40 - 85
selection of components
Figure 29 and Figure 30 are schematic diagrams of typical notebook computer application circuits.
14
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION
Right CIRHP Head- 0.47 F Phone Input Signal 20 23
RHPIN RLINEIN R MUX - +
CIRLINE Right 0.47 F Line Input Signal
ROUT+
21
8 CRIN 0.47 F PC-BEEP 14 Input Signal CPCB 0.47 F 2 VDD 50 k 3 17 CCLK 47 nF 15
RIN
PC-BEEP PCB ENABLE PCBeep - + ROUT- 16 VDD 100 k VOLUME CLK SE/BTL Gain/ MUX Control Depop Circuitry Power Management PVDD 18 See Note A VDD CSR 0.1 F VDD CSR 0.1 F CBYP 0.47 F
COUTR 330 F 1 k
VDD BYPASS SHUT- DOWN GND
19 11 22 To System Control 4 1,12, 13,24
Left CILHP Head- 0.47 F Phone Input Signal CILLINE Left 0.47 F Line Input Signal
6 5
LHPIN LLINEIN L MUX - +
1 k
LOUT+
COUTL 330 F
10 CLIN 0.47 F
LIN
- +
LOUT-
9
100 k NOTE A: A 0.1-F ceramic capacitor should be placed as close as possible to the IC. For filtering lower-frequency noise signals, a larger electrolytic capacitor of 10 F or greater should be placed near the audio power amplifier.
Figure 29. Typical TPA0132 Application Circuit Using Single-Ended Inputs and Input MUX
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION
CRHP- 0.47 F 20 CRLINE- 0.47 F 23
RHPIN R MUX RLINEIN - + ROUT+ 21
Right Negative Differential Input Signal
CRIN+ Right 0.47 F Positive 8 Differential Input Signal PC-BEEP 14 Input Signal C PCB 0.47 F 2 VDD 50 k 3 17 CCLK 47 nF 15
RIN
PC-BEEP PCB ENABLE PCBeep - + 100 k VOLUME CLK SE/BTL Gain/ MUX Control Depop Circuitry Power Management PVDD See Note A VDD CSR 0.1 F VDD CSR 0.1 F CBYP 0.47 F ROUT- 16 VDD
COUTR 330 F 1 k
18
VDD BYPASS SHUT- DOWN
19 11 22 To SystemC ontrol 4 1,12, 13,24
CLHP- 0.47 F 6 LHPIN L MUX LLINEIN - +
GND
Left Negative Differential CLLINE- Input 0.47 F Signal
5
1 k
LOUT+
COUTL 330 F
Left Positive Differential CLIN+ Input 0.47 F Signal
10
LIN
- +
LOUT-
9
100 k
NOTE A:
A 0.1-F ceramic capacitor should be placed as close as possible to the IC. For filtering lower-frequency noise signals, a larger electrolytic capacitor of 10 F or greater should be placed near the audio power amplifier.
Figure 30. Typical TPA0132 Application Circuit Using Differential Inputs
16
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION input resistance
Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest value to over six times that value. As a result, if a single capacitor is used in the input high-pass filter, the -3 dB or cutoff frequency will also change by over six times.
Rf C Input Signal IN Ri
Figure 31. Resistor on Input for Cut-Off Frequency The input resistance at each gain setting is given in Figure 28. The -3-dB frequency can be calculated using equation 1.
f -3 dB
+ 2p 1R C
i
(1)
If the filter must be more accurate, the value of the capacitor should be increased while value of the resistor to ground should be decreased. In addition, the order of the filter could be increased.
input capacitor, Ci
In the typical application an input capacitor (Ci) is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, Ci and the input impedance of the amplifier (Zi) form a high-pass filter with the corner frequency determined in equation 2.
-3 dB
f c(highpass)
1 + 2pZ C
(2)
ii
fc
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION input capacitor, Ci (continued)
The value of Ci is important to consider as it directly affects the bass (low frequency) performance of the circuit. Consider the example where Zi is 710 k and the specification calls for a flat bass response down to 40 Hz. Equation 2 is reconfigured as equation 3.
Ci
+ 2 p1 f c Z
i
(3)
In this example, Ci is 5.6 nF so one would likely choose a value in the range of 5.6 nF to 1 F. A further consideration for this capacitor is the leakage path from the input source through the input network (Ci) and the feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason, a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at VDD/2, which is likely higher than the source dc level. Note that it is important to confirm the capacitor polarity in the application. power supply decoupling, C(S) The TPA0132 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 F placed as close as possible to the device VDD lead works best. For filtering lower-frequency noise signals, a larger, aluminum-electrolytic capacitor of 10 F or greater placed near the audio power amplifier is recommended. midrail bypass capacitor, C(BYP) The midrail bypass capacitor (C(BYP)) is the most critical capacitor and serves several important functions. During start-up or recovery from shutdown mode, C(BYP) determines the rate at which the amplifier starts up. The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and THD+N. Bypass capacitor (C(BYP)) values of 0.47-F to 1-F ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance.
18
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION output coupling capacitor, C(C)
In the typical single-supply SE configuration, an output coupling capacitor (C(C)) is required to block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by equation 4.
-3 dB
f c(high)
+ 2 p R1 C
L (C)
(4)
fc
The main disadvantage, from a performance standpoint, is the load impedances are typically small, which drives the low-frequency corner higher, degrading the bass response. Large values of C(C) are required to pass low frequencies into the load. Consider the example where a C(C) of 330 F is chosen and loads vary from 3 , 4 , 8 , 32 , 10 k, and 47 k. Table 2 summarizes the frequency response characteristics of each configuration. Table 2. Common Load Impedances vs Low Frequency Output Characteristics in SE Mode
RL 3 4 8 32 10,000 47,000 C(C) 330 F 330 F 330 F 330 F 330 F 330 F LOWEST FREQUENCY 161 Hz 120 Hz 60 Hz 15 Hz 0.05 Hz 0.01 Hz
As Table 2 indicates, most of the bass response is attenuated into a 4- load, an 8- load is adequate, headphone response is good, and drive into line level inputs (a home stereo for example) is exceptional.
using low-ESR capacitors
Low-ESR capacitors are recommended throughout this applications section. A real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance the more the real capacitor behaves like an ideal capacitor.
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19
TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION bridged-tied load versus single-ended mode
Figure 32 shows a Class-AB audio power amplifier (APA) in a BTL configuration. The TPA0132 BTL amplifier consists of two Class-AB amplifiers driving both ends of the load. There are several potential benefits to this differential drive configuration, but initially consider power to the load. The differential drive to the speaker means that as one side is slewing up, the other side is slewing down, and vice versa. This in effect doubles the voltage swing on the load as compared to a ground referenced load. Plugging 2 x VO(PP) into the power equation, where voltage is squared, yields 4x the output power from the same supply rail and load impedance (see equation 5).
V (rms)
+ +
V O(PP)
22 2
(5)
Power
V (rms) RL
VDD
VO(PP)
RL VDD
2x VO(PP)
-VO(PP)
Figure 32. Bridge-Tied Load Configuration In a typical computer sound channel operating at 5 V, bridging raises the power into an 8- speaker from a singled-ended (SE, ground reference) limit of 250 mW to 1 W. In sound power, that is a 6-dB improvement -- which is loudness that can be heard. In addition to increased power, there are frequency response concerns. Consider the single-supply SE configuration shown in Figure 33. A coupling capacitor is required to block the dc offset voltage from reaching the load. These capacitors can be quite large (approximately 33 F to 1000 F), so they tend to be expensive, heavy, occupy valuable PCB area, and have the additional drawback of limiting low-frequency performance of the system. This frequency limiting effect is due to the high-pass filter network created with the speaker impedance and the coupling capacitance and is calculated with equation 6.
f (c)
+ 2 p R1 C
(6)
L (C)
20
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION bridged-tied load versus single-ended mode (continued)
For example, a 68-F capacitor with an 8- speaker would attenuate low frequencies below 293 Hz. The BTL configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency performance is then limited only by the input network and speaker response. Cost and PCB space are also minimized by eliminating the bulky coupling capacitor.
VDD -3 dB
VO(PP)
C(C) RL
VO(PP)
fc
Figure 33. Single-Ended Configuration and Frequency Response Increasing power to the load does carry a penalty of increased internal power dissipation. The increased dissipation is understandable considering that the BTL configuration produces 4x the output power of the SE configuration. Internal dissipation versus output power is discussed further in the crest factor and thermal considerations section.
single-ended operation
In SE mode (see Figure 33), the load is driven from the primary amplifier output for each channel (OUT+). The amplifier switches single-ended operation when the SE/BTL terminal is held high. This puts the negative outputs in a high-impedance state, and reduces the amplifier's gain to 1 V/V.
BTL amplifier efficiency
Class-AB amplifiers are often inefficient. The primary cause of these inefficiencies is voltage drop across the output stage transistors. There are two components of the internal voltage drop. One is the headroom or dc voltage drop that varies inversely to output power. The second component is due to the sinewave nature of the output. The total voltage drop can be calculated by subtracting the RMS value of the output voltage from VDD. The internal voltage drop multiplied by the RMS value of the supply current (IDDrms) determines the internal power dissipation of the amplifier. An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power supply to the power delivered to the load. To accurately calculate the RMS and average values of power in the load and in the amplifier, the current and voltage waveform shapes must first be understood (see Figure 34).
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21
TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION BTL amplifier efficiency (continued)
VO IDD
V(LRMS)
IDD(avg)
Figure 34. Voltage and Current Waveforms for BTL Amplifiers Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are very different between SE and BTL configurations. In an SE application the current waveform is a half-wave rectified shape whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different. Keep in mind that for most of the waveform both the push and pull transistors are not on at the same time, which supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform. The following equations are the basis for calculating amplifier efficiency.
Efficiency of a BTL amplifier
+ PP L
SUP P + V2 ,
(7)
VP + 2R VP RL
2 L
Where:
PL rms + VLR
L 2
, and V LRMS
therefore, P L 1 +p
p
0
and P SUP Therefore,
P SUP
+ VDD IDDavg + 2 VDD VP pR
L
and
I DDavg
sin(t) dt
+1 p
VP RL
[cos(t)]
p
0
+ p2VP R
L
substituting PL and PSUP into equation 7,
Efficiency of a BTL amplifier
+2 V
VP 2 RL
2
Where:
VP
+
DD V P p RL
+ 4p VVP
DD
2 PL RL
Therefore,
h BTL
+
p
2 PL RL 4 V DD VP = Peak voltage on BTL load IDDavg = Average current drawn from the power supply VDD = Power supply voltage BTL = Efficiency of a BTL amplifier
(8)
PL = Power delivered to load PSUP = Power drawn from power supply VLRMS = RMS voltage on BTL load RL = Load resistance
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION BTL amplifier efficiency (continued)
Table 3 employs equation 8 to calculate efficiencies for four different output power levels. Note that the efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting in a nearly flat internal power dissipation over the normal operating range. Note that the internal dissipation at full output power is less than in the half power range. Calculating the efficiency for a specific system is the key to proper power supply design. For a stereo 1-W audio system with 8- loads and a 5-V supply, the maximum draw on the power supply is almost 3.25 W. Table 3. Efficiency Vs Output Power in 5-V, 8- BTL Systems
OUTPUT POWER (W) 0.25 0.50 1.00 1.25 EFFICIENCY (%) 31.4 44.4 62.8 70.2 PEAK VOLTAGE (V) 2.00 2.83 4.00 4.47 INTERNAL DISSIPATION (W) 0.55 0.62 0.59 0.53
High peak voltages cause the THD to increase.
A final point to remember about Class-AB amplifiers (either SE or BTL) is how to manipulate the terms in the efficiency equation to utmost advantage when possible. Note that in equation 8, VDD is in the denominator. This indicates that as VDD goes down, efficiency goes up.
crest factor and thermal considerations
Class-AB power amplifiers dissipate a significant amount of heat in the package under normal operating conditions. A typical music CD requires 12 dB to 15 dB of dynamic range, or headroom above the average power output, to pass the loudest portions of the signal without distortion. In other words, music typically has a crest factor between 12 dB and 15 dB. When determining the optimal ambient operating temperature the internal dissipated power at the average output power level must be used. From the TPA0132 data sheet, one can see that when the TPA0132 is operating from a 5-V supply into a 3- speaker that 4-W peaks are available. To convert watts to dB use equation 9. P dB P + 10 Log P W + 10 Log 4 W + 6 dB 1W
ref
(9)
Subtracting the headroom restriction to obtain the average listening level without distortion yields: 6 dB - 15 dB = -9 dB (15-dB crest factor) 6 dB - 12 dB = -6 dB (12-dB crest factor) 6 dB - 9 dB = -3 dB (9-dB crest factor) 6 dB - 6 dB = 0 dB (6-dB crest factor) 6 dB - 3 dB = 3 dB (3-dB crest factor)
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION BTL amplifier efficiency (continued)
To convert dB back into watts use equation 10. PW
+ 10PdB 10 Pref + 63 mW (18-dB crest factor) + 125 mW (15-dB crest factor) + 250 mW (9-dB crest factor) + 500 mW (6-dB crest factor) + 1000 mW (3-dB crest factor) + 2000 mW (15-dB crest factor)
(10)
This is valuable information to consider when attempting to estimate the heat dissipation requirements for the amplifier system. Comparing the absolute worst case, which is 2 W of continuous power output with a 3-dB crest factor, against 12-dB and 15-dB applications drastically affects maximum ambient temperature ratings for the system. Using the power dissipation curves for a 5-V, 3- system, the internal dissipation in the TPA0132 and maximum ambient temperatures is shown in Table 4. Table 4. TPA0132 Power Rating, 5-V, 3- Stereo
PEAK OUTPUT POWER (W) 4 4 4 4 4 4 AVERAGE OUTPUT POWER 2 W (3 dB) 1000 mW (6 dB) 500 mW (9 dB) 250 mW (12 dB) 125 mW (15 dB) 63 mW (18 dB) POWER DISSIPATION (W/Channel) 1.7 1.6 1.4 1.1 0.8 0.6 MAXIMUM AMBIENT TEMPERATURE - 3C 6C 24C 51C 78C 96C
Table 5. TPA0132 Power Rating, 5-V, 8- Stereo
PEAK OUTPUT POWER (W) 2.5 2.5 2.5 2.5 AVERAGE OUTPUT POWER 1250 mW (3-dB crest factor) 1000 mW (4-dB crest factor) 500 mW (7-dB crest factor) 250 mW (10-dB crest factor) POWER DISSIPATION (W/Channel) 0.55 0.62 0.59 0.53 MAXIMUM AMBIENT TEMPERATURE 100C 94C 97C 102C
The maximum dissipated power (PD(max)) is reached at a much lower output power level for an 8- load than for a 3- load. As a result, use equation 11 for calculating PD(max) for an 8- application. P D(max)
DD + p2R L
2V 2
(11)
However, in the case of a 3- load, the PD(max) occurs at a point well above the normal operating power level. The amplifier may therefore be operated at a higher ambient temperature than required by the PD(max) formula for a 3- load.
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION BTL amplifier efficiency (continued)
The maximum ambient temperature depends on the heat sinking ability of the PCB system. The derating factor for the PWP package is shown in the Dissipation Rating Table. Use equation 12 to convert this to JA.
JA
1 1 + Derating Factor + 0.022 + 45C W
(12)
To calculate maximum ambient temperatures, first consider that the numbers from the dissipation graphs are per channel so the dissipated power needs to be doubled for two channel operation. Given JA, the maximum allowable junction temperature, and the total internal dissipation, the maximum ambient temperature can be calculated with the following equation. The maximum recommended junction temperature for the TPA0132 is 150C. The internal dissipation figures are taken from the Power Dissipation vs Output Power graphs. T A Max
+ TJ Max * JA PD + 150 * 45 (0.6 2) + 96C (15-dB crest factor)
(13)
NOTE: Internal dissipation of 0.6 W is estimated for a 2-W system with 15-dB crest factor per channel.
Tables 4 and 5 show that for some applications no airflow is required to keep junction temperatures in the specified range. The TPA0132 is designed with thermal protection that turns the device off when the junction temperature surpasses 150C to prevent damage to the IC. Table 4 and 5 were calculated for maximum listening volume without distortion. When the output level is reduced the numbers in the table change significantly. Also, using 8- speakers dramatically increases the thermal performance by increasing amplifier efficiency.
SE/BTL operation
The ability of the TPA0132 to easily switch between BTL and SE modes is one of its most important cost saving features. This feature eliminates the requirement for an additional headphone amplifier in applications where internal stereo speakers are driven in BTL mode but external headphone or speakers must be accommodated. Internal to the TPA0132, two separate amplifiers drive OUT+ and OUT-. The SE/BTL input controls the operation of the follower amplifier that drives LOUT- and ROUT-. When SE/BTL is held low, the amplifier is on and the TPA0132 is in the BTL mode. When SE/BTL is held high, the OUT- amplifiers are in a high output impedance state, which configures the TPA0132 as an SE driver from LOUT+ and ROUT+. IDD is reduced by approximately one-half in SE mode. Control of the SE/BTL input can be from a logic-level CMOS source or, more typically, from a resistor divider network as shown in Figure 35.
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION SE/BTL operation (continued)
20 23
RHPIN RLINEIN R MUX - +
ROUT+
21
8
RIN
VDD - + ROUT- 16 100 k SE/BTL 15 100 k
COUTR 330 F 1 k
Figure 35. TPA0132 Resistor Divider Network Circuit Using a readily available 1/8-in. (3,5 mm) stereo headphone jack, the control switch is closed when no plug is inserted. When closed the 100-k/1-k divider pulls the SE/BTL input low. When a plug is inserted, the 1-k resistor is disconnected and the SE/BTL input is pulled high. When the input goes high, the OUT- amplifier is shut down causing the speaker to mute (virtually open-circuits the speaker). The OUT+ amplifier then drives through the output capacitor (Co) into the headphone jack.
PC-BEEP operation
The PC-BEEP input allows a system beep to be sent directly from a computer through the amplifier to the speakers with few external components. The input is normally activated activated automatically, but may be selected manually by pulling PCB ENABLE high. When the PC-BEEP input is active, both of the LINEIN and HPIN inputs are deselected and both the left and right channels are driven in BTL mode with the signal from PC-BEEP. The gain from the PC-BEEP input to the speakers is fixed at 0.3 V/V and is independent of the volume setting. When the PC-BEEP input is deselected, the amplifier will return to the previous operating mode and volume setting. Furthermore, if the amplifier is in shutdown mode, activating PC-BEEP will take the device out of shutdown and output the PC-BEEP signal, then return the amplifier to shutdown mode. When PCB ENABLE is held low, the amplifier will automatically switch to PC-BEEP mode after detecting a valid signal at the PC-BEEP input. The preferred input signal is a square wave or pulse train with an amplitude of 1 Vpp or greater. To be a accurately detected, the signal must have a minimum of 1-Vpp amplitude, rise and fall times of less than 0.1 s and a minimum of eight rising edges. When the signal is no longer detected, the amplifier will return to its previous operating mode and volume setting.
26
POST OFFICE BOX 655303
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION PC-BEEP operation (continued)
When PCB ENABLE is held high, PC-BEEP is selected and the LINEIN and HPIN inputs are deactivated regardless of the input signal. PCB ENABLE has an internal 100-k pulldown resistor and will trip at approximately VDD/2. If it is desired to ac couple the PC-BEEP input, the value of the coupling capacitor should be chosen to satisfy equation 14.
C PCB
w 2p f
PCB
1 (100 kW)
(14)
The PC-BEEP input can also be dc coupled to avoid using this coupling capacitor. The pin normally sits at midrail when no signal is present.
input MUX operation
Right Headphone Input Signal CIRHP 0.47 F
20 23
RHPIN RLINEIN R MUX - +
CIRLINE 0.47 F Right Line Input Signal
ROUT+
21
8 CRIN 0.47 F
RIN
- +
ROUT-
16
Figure 36. TPA0132 Example Input MUX Circuit Another advantage of using the MUX feature is setting the gain of the headphone channel to -1. This provides the optimum distortion performance into the headphones where clear sound is more important. Refer to the SE/BTL operation section for a description of the headphone jack control circuit.
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27
TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
APPLICATION INFORMATION shutdown modes
The TPA0132 employs a shutdown mode of operation designed to reduce supply current, IDD, to the absolute minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN input terminal should be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the outputs to mute and the amplifier to enter a low-current state, IDD = 150 A. SHUTDOWN should never be left unconnected because amplifier operation would be unpredictable. Table 6. Shutdown and Mute Mode Functions
INPUTS SE/BTL Low X SHUTDOWN High Low AMPLIFIER STATE INPUT Line X OUTPUT BTL Mute SE
High High HP Inputs should never be left unconnected. X = do not care
28
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TPA0132 2-W STEREO AUDIO POWER AMPLIFIER WITH DC VOLUME CONTROL
SLOS223D - MAY 1999 - REVISED MAY 2001
MECHANICAL DATA
PWP (R-PDSO-G**)
20-PIN SHOWN
PowerPAD PLASTIC SMALL-OUTLINE PACKAGE
0,65 20
0,30 0,19 11
0,10 M
Thermal Pad (See Note D) 4,50 4,30 6,60 6,20 0,15 NOM
Gage Plane 1 A 10 0- 8 0,25 0,75 0,50
Seating Plane 1,20 MAX 0,15 0,05 PINS ** DIM A MAX A MIN 0,10
14 5,10 4,90
16 5,10 4,90
20 6,60 6,40
24 7,90 7,70
28 9,80 9,60 4073225/E 03/97
NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusions. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically and thermally connected to the backside of the die and terminals 1, 12, 13, and 24. The dimensions of the thermal pad are 2.40 mm x 4.70 mm (maximum). The pad is centered on the bottom of the package. E. Falls within JEDEC MO-153
PowerPAD is a trademark of Texas Instruments.
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IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, license, warranty or endorsement thereof. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. Representation or reproduction of this information with alteration voids all warranties provided for an associated TI product or service, is an unfair and deceptive business practice, and TI is not responsible nor liable for any such use. Resale of TI's products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service, is an unfair and deceptive business practice, and TI is not responsible nor liable for any such use. Also see: Standard Terms and Conditions of Sale for Semiconductor Products. www.ti.com/sc/docs/stdterms.htm
Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated


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