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NJU3152
PRELIMINARY
4-BIT SINGLE CHIP OTP TINY CONTROLLER
s GENERAL DESCRIPTION
The NJU3152 is the C-MOS 4-bit Single Chip OTP type Micro Controller with programmable Flash Memory. It is completely compatible with the NJU3102 in function and the pin configuration. Therefore, the NJU3152 is suitable for the final evaluation before NJU3102 mask generation, the small quantity production and short leadtime. * In this data sheet, only OTP programming and the difference between NJU3152 and NJU3102 are mentioned mainly. Therefore the detail function and specification should be referred on the NJU3102 data sheet.
s PACKAGE OUTLINE
NJU3152L
NJU3152G
s FEATURES
q q q q q Internal One Time Programmable ROM 1,024 X 8bits Internal Data RAM 32 X 4bits Wide operating voltage range 2.7V ~ 5.5V Package outline SDIP22 / SOP22 ROM programmer "SUPERPRO/L" by XELTEK co,.
s PIN CONFIGURATION IN OTP PROGRAMMING MODE
Open D0 D1 D2 Open D3 Open PROM CLK REQ VSS
1 2 3 4 5 6 7 8 9 10 11
22 21 20 19 18 17 16 15 14 13 12
VDD Open CNT2 CNT1 D7 Open D6 D5 D4 RESET
Note) The pin configuration in Normal operating mode is the same as NJU3102.
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NJU3152
s BLOCK DIAGRAM
CPU CORE STACK TLUaddr MUX OTP ROM 1024 x 8 bit IR RAM 32 x 4 bit ID STANDBY CONTROLLER ALU CPU TIMING GENERATOR OSC TEST RESET OSC1 OSC2 PC X'-Reg Y'-Reg X-Reg Y-Reg AC
VDD VSS
PORT_A
PORT_B
PORT_E
PORT_D
PORT_C
PD0 PD1 PD2 PD3
PC0
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PC1
PB0 PB1 PB2 PB3
PE0
PE1
PA0 PA1 PA2 PA3
NJU3152
s TERMINAL DESCRIPTION IN OTP PROGRAMMING MODE
No. 12 2 - 4, 6, 13 - 15, 18 19, 20 10 9 8 22 11 Note 1) 2) SYMBOL RESET INPUT/OUTPUT INPUT FUNCTION RESET terminal. When the low-level input-signal, the system is initialized.
D0 - D7 CNT1 CNT2 REQ CLK PROM VDD VSS
INPUT/OUTPUT Data bus INPUT INPUT OUTPUT INPUT INPUT -
OTP control input terminal Request output terminal Clock input terminal OTP programming enable terminal Power Source (5V) Power Source (0V)
Use at VDD=5V in OTP programming mode. Non connect anything to the other terminals.
s Difference between NJU3152 (OTP version) and NJU3102 (MASK version)
q Operating mode NJU3152 has two operating modes. One is "Normal operating mode" and the other is "OTP programming mode".
*
Normal operating mode The "TEST" terminal is set to low level. (The terminal is recommended to connect to GND.) Operating voltage range; 2.7V ~ 5.5V. OTP Programming mode User program is read out from or written into the OTP by the universal programmer "SUPERPRO/L" and converting adapter made by XELTEK co,.(USA).
*
q
Option information set in the initialization
When the initialization is performed(RESET terminal is "L"), the operation information stored in option area is set as shown in the following timing chart . The option information is set in the term of 1 / fOSC x 256clock after RESET releasing and oscillation stability time. After information set, the program counter is set to 0000H and the NJU3152 operates in normal. [ TIMING CHART ] Oscillation Stability Time
Oscillator Clock
Option information setting 1/fOSCx256clock
Normal Operation
Oscillation Start
PC=0000H
RESET
fOSC=4MHz
about 64sec
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NJU3152
s ABSOLUTE MAXIMUM RATINGS
(Ta=25C) PARAMETER Supply Voltage Input Voltage Output Voltage Operating Temperature Storage Temperature SYMBOL VDD VIN VOUT Topr Tstg RATINGS -0.3 ~ +7.0 -0.3 ~ VDD + 0.3 -0.3 ~ VDD + 0.3 -20 ~ +75 -55 ~ +125 UNIT V V V C C
Note) The difference of electrical characteristics between NJU3152 (OTP version) and NJU3102 (MASK version) NJU3102
*
NJU3152 2.7V
Supply Voltage (VDD) MIN. Supply Current 5V (IDD1) Max. (IDD2) Max. (IDD3) Max. (IDD4) Max. 3V (IDD1) Max. (IDD2) Max. (IDD3) Max. (IDD4) Max.
2.4V
*
4.5mA 4.5mA 4.3mA 5.0A 2.3mA 2.3mA 2.1mA 3.0A
30mA 30mA 30mA 20A 20mA 20mA 20mA 20A
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NJU3152
s ELECTRICAL CHARACTERISTICS
SYM BOL VDD IDD1
DC CHARACTERISTICS 1
(VDD=3.6~5.5V, VSS=0V, Ta=-20~75C) NOT MIN TYP MAX UNIT E 3.6 5.5 V 30 mA *3
PARAMETER Supply Voltage
CONDITIONS VDD VDD VDD=5V, fOSC=2MHz X'tal Oscillation in Reset VDD VDD=5V, fOSC=2MHz Ceramic Oscillation in Reset VDD VDD=5V, fOSC=2MHz CR Oscillation in Reset VDD VDD=5V, STANDBY Mode VDD VDD=5V, fOSC=4MHz, Operating PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3 PE0, PE1, RESET OSC1 PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3 PE0, PE1, RESET OSC1 VDD=5.5V, VIN=5.5V PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1, RESET VDD=5.5V, VIN=0V Without pull-up resistance PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1, RESET VDD=5.5V, VIN=0V With pull-up resistance PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1 IOH=-100A PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1 IOL1=400A PA0~PA3, PB0~PB3, PC0, PC1, PE0, PE1 IOL2=15mA PD0~PD3 VDD=5.5V, VOH=5.5V PD0~PD3
IDD2 Supply Current IDD3 IDD4 IDD5 High-Level Input Voltage VIH1 VIH2 VIH3 VIL1 VIL2 VIL3 IIH
30
mA
*3
30 20 30 0.7VDD 0.8VDD VDD-1.0 0 0 0 VDD VDD VDD 0.3VDD 0.2VDD 1.0 10
mA A mA V V V V V V A
*3 *3 *3 *1 *1 *1 *1
Low-level Input Voltage High-Level Input Current
*1
IIL1 Low-Level Input Current IIL2
-10
A
*1
-100
A
*1
High-Level Output Voltage
VOH
VDD-0.5
V
*2
Low-Level Output Voltage Output Leakage Current Input Capacitance
VOL1 VOL2 IOD
0.5 2.0 10
V V A pF
*2 *2 *2
Except VDD, VSS terminals fOSC=1MHz Other terminals : 0V *1 Input/output port is set as an Input terminal. *2 Input/output port is set as an Output terminal. *3 Except the current through Pull-up resister. CIN
10
20
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NJU3152
s ELECTRICAL CHARACTERISTICS
SYM BOL VDD IDD1
DC CHARACTERISTICS 2
(VDD=2.7~3.6V, VSS=0V, Ta=-20~75C) NOT MIN TYP MAX UNIT E 2.7 3.6 V 20 mA *3
PARAMETER Supply Voltage
CONDITIONS VDD VDD VDD=3V, fOSC=1MHz X'tal Oscillation in Reset VDD VDD=3V, fOSC=1MHz Ceramic Oscillation in Reset VDD VDD=3V, fOSC=1MHz CR Oscillation in Reset VDD VDD=3V, STANDBY Mode VDD VDD=3V, fOSC=4MHz, Operating PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3 PE0, PE1, RESET OSC1 PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3 PE0, PE1, RESET OSC1 VDD=3.6V, VIN=3.6V PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1, RESET VDD=3.6V, VIN=0V Without pull-up resistance PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1, RESET VDD=3.6V, VIN=0V With pull-up resistance PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1 IOH=-80A PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1 IOL1=350A PA0~PA3, PB0~PB3, PC0, PC1, PE0, PE1 IOL2=5mA PD0~PD3 VDD=3.6V, VOH=3.6V PD0~PD3
IDD2 Supply Current IDD3 IDD4 IDD5 High-Level Input Voltage VIH1 VIH2 VIH3 VIL1 VIL2 VIL3 IIH
20
mA
*3
20 20 20 0.8VDD 0.85VDD VDD-0.3 0 0 0 VDD VDD VDD 0.2VDD 0.15VDD 0.3 10
mA A mA V V V V V V A
*3 *3 *3 *1 *1 *1 *1
Low-level Input Voltage High-Level Input Current
*1
IIL1 Low-Level Input Current IIL2
-10
A
*1
-100
A
*1
High-Level Output Voltage
VOH
VDD-0.5
V
*2
Low-Level Output Voltage Output Leakage Current Input Capacitance
VOL1 VOL2 IOD
0.5 1.0 10
V V A pF
*2 *2 *2
Except VDD, VSS terminals fOSC=1MHz Other terminals : 0V *1 Input/output port is set as an Input terminal. *2 Input/output port is set as an Output terminal. *3 Except the current through Pull-up resister. CIN
10
20
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NJU3152
s ELECTRICAL CHARACTERISTICS
SYM BOL
AC CHARACTERISTICS 1
(VSS=0V, Ta= -20~75C)
PARAMETER
CONDITIONS X'tal Resonator Ceramic Resonator External Resistor Oscillation External Clock X'tal Resonator Ceramic Resonator External Resistor Oscillation External Clock
MIN 0.03 0.03 0.03 0.03 0.03 0.03 0.03 0.03
TYP
MAX 2.0 2.0 1.0 2.0 4.0 4.0 2.0 4.0
UNIT
VDD=2.7~3.6V Operating Frequency fOSC VDD=3.6~5.5V
MHz
Instruction Cycle Time External Clock Pulse Width External Clock Rise Time Fall Time RESET Low-Level Width RESET Rise Time Port Input Level Width Edge Detection (PC1) Rise Time Fall Time Restart Signal (PC0) Rise Time
tC tCPH tCPL tCPR tCPF tRST tRSR tPIN tEDR tEDF tSTR VDD=2.7~3.6V VDD=3.6~5.5V VDD=2.7~5.5V VDD=2.7~5.5V VDD=2.7~5.5V VDD=2.7~5.5V VDD=2.7~5.5V VDD=2.7~5.5V 6/fOSC 4/fOSC 250 125
6/fOSC 16600 16600 20
s ns ns s 20 ms s 200 200 ns ns
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NJU3152
s AC CHARACTERISTICS 1
EXTERNAL CLOCK OSC1
TIMING CHART
1/fOSC VIH3 VIL3 tCPH tCPF tRST tCPL tRSR VIH2 VIL2 tCPR
RESET INPUT
RESET
PORT INPUT tPIN VIH1, VIH2 PORT VIL1, VIL2 EDGE DETECTOR INPUT tEDR VIH1 VIL1 RESTART SIGNAL INPUT tSTR VIH1 PC0 VIL1 tEDF
PC1
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NJU3152
s OPTION as same as mask version (NJU3102)
1) INPUT OUTPUT Terminal Selection All of input-output terminals select a terminal type from the following table for each group as a PORT by the mask option. [ CIRCUIT TYPE TABLE ] TERMINAL TYPES
Input / Output Terminal*1
SYMBOL
Port of Output
Port of Input
EXTRA FUNCTION
REMARKS
Port A (PA0PA3) Port B (PB0PB3) Port C (PC0, PC1)
ICP IC ICP IC ICP IC
OC OC OC Restart signal input *2 Edge detection *2
R F
Rise edge detection Fall edge detection
Port D ICP ONP (PD0PD3) IC ON Port E ISP OC (PE0, PE1) IS Note) The symbol in the above table is the same as in mask option generator software. *1) The symbol and the detail circuits of INPUT OUTPUT TERMINAL are written in INPUT OUTPUT TERMINAL TYPE. *2) When the PORTC(PHY3) is set as the input, the extra function are added for terminals.
[MASK OPTION LIST]
ICP ISP IC IS ONP OC ON R F
C-MOS input with pull-up resistance C-MOS Schmitt trigger input with pull-up resistance C-MOS input C-MOS Schmitt trigger input Nch-FET Open-Drain output with pull-up resistance C-MOS output Nch-FET Open-Drain output Rise edge detection Fall edge detection
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NJU3152
[ INPUT OUTPUT TERMINAL TYPE ] Types With Pull-up Type ICP Without Pull-up Type IC Terminals PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3
C-MOS INPUT TERMINAL
Type ISP SCHMITT TRIGGER
Type IS
PE0, PE1
Type ON
C-MOS OUTPUT TERMINAL
PA0~PA3, PB0~PB3, PC0, PC1, PE0, PE1
Type ONP N-channel(Nch) OPEN DRAIN
Type ON
PD0~PD3
2) Edge Detector Selection PC1 terminal is added the "Edge detect function" by the mask option. Rising edge Falling edge
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NJU3152
MEMO
[CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.
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