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 Data Sheet 26185.201B
6276
16-BIT SERIAL-INPUT, CONSTANTCURRENT LATCHED LED DRIVER
A6276ELW
GROUND SERIAL DATA IN CLOCK LATCH ENABLE OUT 0 OUT 1 OUT 2 OUT 3 OUT 4 OUT 5 OUT 6 OUT 7 1 2 3 4 5 6 7 8 9 10 11 12 CK L REGISTER LATCHES 20 19 18 17 16 15 14 13 OE VDD IO REGULATOR 24 23 22 21 LOGIC SUPPLY REXT SERIAL DATA OUT OUTPUT ENABLE OUT 15 OUT 14 OUT 13 OUT 12 OUT 11 OUT 10 OUT 9 OUT 8
The A6276EA and A6276ELW are specifically designed for LEDdisplay applications. Each BiCMOS device includes a 16-bit CMOS shift register, accompanying data latches, and 16 npn constant-current sink drivers. Except for package style and allowable package power dissipation, the two devices are identical. The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 5 V logic supply, typical serial data-input rates are up to 20 MHz. The LED drive current is determined by the user's selection of a single resistor. A CMOS serial data output permits cascade connections in applications requiring additional drive lines. For inter-digit blanking, all output drivers can be disabled with an ENABLE input high. Similar 8-bit devices are available as the A6275EA and A6275ELW. Two package styles are provided for through-hole DIP (suffix A) or surface-mount SOIC (suffix LW). Under normal applications, a copper lead frame and low logic-power dissipation allow the dual in-line package to sink maximum rated current through all outputs continuously over the operating temperature range (90 mA, 0.75 V drop, +85C). Both devices are also available for operation over the standard temperature range of -20C to +85C. To order, change the suffix letter `E' to `S'.
Dwg. PP-029-11
Note that the A6276EA (DIP) and the A6276ELW (SOIC) are electrically identical and share a common terminal number assignment.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD ...................... 7.0 V Output Voltage Range, VO ............................ -0.5 V to +17 V Output Current, IO ........................ 90 mA Ground Current, IGND ............... 1475 mA Input Voltage Range, VI .................... -0.4 V to VDD + 0.4 V Package Power Dissipation, PD ..................................... See Graph Operating Temperature Range, TA ............................. -40C to +85C Storage Temperature Range, TS ........................... -55C to +150C
Caution: These CMOS devices have input static protection (Class 2) but are still susceptible to damage if exposed to extremely high static electrical charges.
FEATURES
s s s s s To 90 mA Constant-Current Outputs Under-Voltage Lockout Low-Power CMOS Logic and Latches High Data Input Rate Functional Replacement for TB62706BN/BF
Always order by complete part number, e.g., A6276EA .
6276 16-BIT SERIAL-INPUT, CONSTANT-CURRENT LATCHED LED DRIVER
2.5
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
24-PIN DIP, RJA = 50C/W
2.0
24-LEAD SOIC, RJA = 75C/W
1.5
1.0
0.5
0 25 50 75 100 125 AMBIENT TEMPERATURE IN C 150
Dwg. GP-022-3
FUNCTIONAL BLOCK DIAGRAM
VDD CLOCK SERIAL DATA IN LATCH ENABLE
UVLO
LOGIC SUPPLY SERIAL DATA OUT
SERIAL-PARALLEL SHIFT REGISTER
LATCHES OUTPUT ENABLE (ACTIVE LOW) MOS BIPOLAR
GROUND
IO REGULATOR
R EXT
OUT 0 OUT 1 OUT 2
OUT N
Dwg. FP-013-3
2
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 2000, 2003 Allegro MicroSystems, Inc.
6276 16-BIT SERIAL-INPUT, CONSTANT-CURRENT LATCHED LED DRIVER
VDD
VDD
IN
IN
Dwg. EP-010-11
Dwg. EP-010-12
OUTPUT ENABLE (active low)
LATCH ENABLE
VDD
VDD
IN
OUT
Dwg. EP-063-6
Dwg. EP-010-13
CLOCK and SERIAL DATA IN TRUTH TABLE
Serial Shift Register Contents Data Clock Input Input I1 I2 I3 ... IN-1 IN H L X H L R1 R2 ... R1 R2 ... RN-2 RN-1 RN-2 RN-1 RN-1 RN X X Serial Latch Data Enable Output Input RN-1 RN-1 RN X PN L H R1 R2 R3 ... P1 P2 P3 ... X L = Low Logic (Voltage) Level H = High Logic (Voltage) Level X X ... Latch Contents I1 I2 I3 ...
SERIAL DATA OUT
IN-1 IN
Output Enable Input
Output Contents I1 I2 I3 ... IN-1 IN
R1 R2 R3 ... X X X ...
RN-1 RN PN-1 PN X X L H P1 P2 P3 ... PN-1 PN H H H ... H R = Previous State H
P1 P2 P3 ...
PN-1 PN
X = Irrelevant
P = Present State
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3
6276 16-BIT SERIAL-INPUT, CONSTANT-CURRENT LATCHED LED DRIVER
ELECTRICAL CHARACTERISTICS at TA = +25C, VDD = 5 V (unless otherwise noted).
Limits Characteristic Supply Voltage Range Under-Voltage Lockout Output Current (any single output) Output Current Matching (difference between any two outputs at same VCE) Output Leakage Current Logic Input Voltage ICEX VIH VIL SERIAL DATA OUT Voltage Input Resistance VOL VOH RI IOL = 500 A IOH = -500 A ENABLE Input, Pull Up LATCH Input, Pull Down Supply Current IDD(OFF) REXT = open, VOE = 5 V REXT = 470 , VOE = 5 V REXT = 250 , VOE = 5 V IDD(ON) REXT = 470 , VOE = 0 V REXT = 250 , VOE = 0 V Symbol VDD VDD(UV) IO Test Conditions Operating VDD = 0 5 V VCE = 0.7 V, REXT = 250 VCE = 0.7 V, REXT = 470 IO 0.4 V VCE(A) = VCE(B) 0.7 V: REXT = 250 REXT = 470 VOH = 15 V - - - 0.7VDD GND - 4.6 150 100 - 3.5 6.5 7.0 10 1.5 1.5 1.0 - - - - 300 200 0.8 6.0 11 13 22 6.0 6.0 5.0 VDD 0.3VDD 0.4 - 600 400 1.4 8.0 15 20 32 % % A V V V V k k mA mA mA mA mA Min. 4.5 3.4 64.2 34.1 Typ. 5.0 - 75.5 40.0 Max. 5.5 4.0 86.8 45.9 Unit V V mA mA
Typical Data is at VDD = 5 V and is for design information only.
4
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
6276 16-BIT SERIAL-INPUT, CONSTANT-CURRENT LATCHED LED DRIVER
SWITCHING CHARACTERISTICS at TA = 25C, VDD = VIH = 5 V, VCE = 0.4 V, VIL = 0 V, REXT = 470 , IO = 40 mA, VL = 3 V, RL = 65 , CL = 10.5 pF.
Limits Characteristic Propagation Delay Time Symbol tpHL Test Conditions CLOCK-OUTn LATCH-OUTn ENABLE-OUTn CLOCK-SERIAL DATA OUT Propagation Delay Time tpLH CLOCK-OUTn LATCH-OUTn ENABLE-OUTn CLOCK-SERIAL DATA OUT Output Fall Time Output Rise Time tf tr 90% to 10% voltage 10% to 90% voltage Min. - - - - - - - - 150 150 Typ. 350 350 350 40 300 300 300 40 350 300 Max. 1000 1000 1000 - 1000 1000 1000 - 1000 600 Unit ns ns ns ns ns ns ns ns ns ns
RECOMMENDED OPERATING CONDITIONS
Characteristic Supply Voltage Output Voltage Output Current Symbol VDD VO IO IOH IOL Logic Input Voltage VIH VIL Clock Frequency fCK Cascade operation Continuous, any one output SERIAL DATA OUT SERIAL DATA OUT Conditions Min. 4.5 - - - - 0.7VDD -0.3 - Typ. 5.0 1.0 - - - - - - Max. 5.5 4.0 90 -1.0 1.0 VDD + 0.3 0.3VDD 10 Unit V V mA mA mA V V MHz
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5
6276 16-BIT SERIAL-INPUT, CONSTANT-CURRENT LATCHED LED DRIVER
TIMING REQUIREMENTS and SPECIFICATIONS
(Logic Levels are VDD and Ground)
C CLOCK A SERIAL DATA IN DATA tp SERIAL DATA OUT D LATCH ENABLE
50% 50% 50%
B
50%
DATA E
OUTPUT ENABLE
LOW = ALL OUTPUTS ENABLED
tp OUT N
HIGH = OUTPUT OFF
50%
DATA
LOW = OUTPUT ON
Dwg. WP-029-1
HIGH = ALL OUTPUTS DISABLED (BLANKED) OUTPUT ENABLE
50%
F
t pLH tf
90%
tr
50% 10%
OUT N
t pHL
DATA
Dwg. WP-030-1A
A. Data Active Time Before Clock Pulse (Data Set-Up Time), tsu(D) .......................................... 60 ns B. Data Active Time After Clock Pulse (Data Hold Time), th(D) .............................................. 20 ns C. Clock Pulse Width, tw(CK) ............................................... 50 ns D. Time Between Clock Activation and Latch Enable, tsu(L) ............................................ 100 ns E. Latch Enable Pulse Width, tw(L) ................................... 100 ns F. Output Enable Pulse Width, tw(OE) ................................ 4.5 s NOTE - Timing is representative of a 10 MHz clock. Significantly higher speeds are attainable. -- Max. Clock Transition Time, tr or tf .............................. 10 s
Information present at any register is transferred to the respective latch when the LATCH ENABLE is high (serial-toparallel conversion). The latches will continue to accept new data as long as the LATCH ENABLE is held high. Applications where the latches are bypassed (LATCH ENABLE tied high) will require that the OUTPUT ENABLE input be high during serial data entry. When the OUTPUT ENABLE input is high, the output source drivers are disabled (OFF). The information stored in the latches is not affected by the OUTPUT ENABLE input. With the OUTPUT ENABLE input low, the outputs are controlled by the state of their respective latches.
6
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
6276 16-BIT SERIAL-INPUT, CONSTANT-CURRENT LATCHED LED DRIVER
ALLOWABLE OUTPUT CURRENT AS A FUNCTION OF DUTY CYCLE A6276EA A6276ELW
100 VCE = 1 V
100 VCE = 0.7 V
ALLOWABLE OUTPUT CURRENT IN mA/BIT
ALLOWABLE OUTPUT CURRENT IN mA/BIT
VCE = 1 V 80 VCE = 2 V 60
80 VCE = 2 V VCE = 3 V 60 VCE = 4 V
VCE = 3 V
VCE = 4 V 40
40
20
TA = +25C VDD = 5 V RJA = 50C/W
20
TA = +25C VDD = 5 V RJA = 75C/W
0 0 20 40 60 80 100
Dwg. GP-062-11
0 0 20 40 60 80 100
Dwg. GP-062-6
DUTY CYCLE IN PER CENT
100 VCE = 1 V
DUTY CYCLE IN PER CENT
100 VCE = 0.7 V
ALLOWABLE OUTPUT CURRENT IN mA/BIT
80 VCE = 2 V
ALLOWABLE OUTPUT CURRENT IN mA/BIT
80 VCE = 1 V
VCE = 3 V 60
60
VCE = 2 V VCE = 3 V
VCE = 4 V 40
40
VCE = 4 V
20
TA = +50C VDD = 5 V RJA = 50C/W
20
TA = +50C VDD = 5 V RJA = 75C/W
0 0 20 40 60 80 100
Dwg. GP-062-10
0 0 20 40 60 80 100
Dwg. GP-062-7
DUTY CYCLE IN PER CENT
DUTY CYCLE IN PER CENT
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7
6276 16-BIT SERIAL-INPUT, CONSTANT-CURRENT LATCHED LED DRIVER
ALLOWABLE OUTPUT CURRENT AS A FUNCTION OF DUTY CYCLE (cont.) A6276EA A6276ELW
100 VCE = 0.7 V
100 VCE = 0.4 V
ALLOWABLE OUTPUT CURRENT IN mA/BIT
80
VCE = 1 V
ALLOWABLE OUTPUT CURRENT IN mA/BIT
80 VCE = 0.7 V VCE = 1 V 60 VCE = 2 V 40 VCE = 4 V 20 TA = +85C VDD = 5 V RJA = 75C/W VCE = 3 V
60
VCE = 2 V VCE = 3 V
40
VCE = 4 V
20
TA = +85C VDD = 5 V RJA = 50C/W
0 0 20 40 60 80 100
Dwg. GP-062-9
0 0 20 40 60 80 100
Dwg. GP-062-8
DUTY CYCLE IN PER CENT
DUTY CYCLE IN PER CENT
TYPICAL CHARACTERISTICS
60
OUTPUT CURRENT IN mA/BIT
40
20
TA = +25C REXT = 500
0 0 0.5 1.0 VCE IN VOLTS
Dwg. GP-063
1.5
2.0
8
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
6276 16-BIT SERIAL-INPUT, CONSTANT-CURRENT LATCHED LED DRIVER
TERMINAL DESCRIPTION
Terminal No. 1 2 3 4 5-20 21 22 23 24 Terminal Name GND SERIAL DATA IN CLOCK LATCH ENABLE OUT0-15 OUTPUT ENABLE SERIAL DATA OUT REXT SUPPLY Function Reference terminal for control logic. Serial-data input to the shift-register. Clock input terminal for data shift on rising edge. Data strobe input terminal; serial data is latched with high-level input. The 16 current-sinking output terminals. When (active) low, the output drivers are enabled; when high, all output drivers are turned OFF (blanked). CMOS serial-data output to the following shift-register. An external resistor at this terminal establishes the output current for all sink drivers. (VDD) The logic supply voltage (typically 5 V).
The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.
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9
6276 16-BIT SERIAL-INPUT, CONSTANT-CURRENT LATCHED LED DRIVER
Applications Information
The load current per bit (IO) is set by the external resistor (REXT) as shown in the figure below.
100
0.7 V per diode) for a group of drivers. If the available voltage source will cause unacceptable dissipation and series resistors or diode(s) are undesirable, a regulator such as the Sanken Series SAI or Series SI can be used to provide supply voltages as low as 3.3 V. For reference, typical LED forward voltages are: White 3.5 - 4.0 V Blue 3.0 - 4.0 V Green 1.8 - 2.2 V Yellow 2.0 - 2.1 V Amber 1.9 - 2.65 V Red 1.6 - 2.25 V Infrared 1.2 - 1.5 V Pattern Layout. This device has a common logicground and power-ground terminal. If ground pattern layout contains large common-mode resistance, and the voltage between the system ground and the LATCH ENABLE or CLOCK terminals exceeds 2.5 V (because of switching noise), these devices may not operate correctly.
VCE = 0.7 V 80
OUTPUT CURRENT IN mA/BIT
60
40
20
0 100
200
300
500
700
1k
2k
3k
5k
CURRENT-CONTROL RESISTANCE, REXT IN OHMS
Dwg. GP-061
Package Power Dissipation (PD). The maximum allowable package power dissipation is determined as PD(max) = (150 - TA)/RJA. The actual package power dissipation is PD(act) = dc(VCE * IO * 16) + (VDD * IDD). When the load supply voltage is greater than 3 V to 5 V, considering the package power dissipating limits of these devices, or if PD(act) > PD(max), an external voltage reducer (VDROP) should be used. Load Supply Voltage (VLED). These devices are designed to operate with driver voltage drops (VCE) of 0.4 V to 0.7 V with LED forward voltages (VF) of 1.2 V to 4.0 V. If higher voltages are dropped across the driver, package power dissipation will be increased significantly. To minimize package power dissipation, it is recommended to use the lowest possible load supply voltage or to set any series dropping voltage (VDROP) as VDROP = VLED - VF - VCE with VDROP = Io * RDROP for a single driver, or a Zener diode (VZ), or a series string of diodes (approximately
VLED
V DROP
VF
V CE
Dwg. EP-064
10
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
6276 16-BIT SERIAL-INPUT, CONSTANT-CURRENT LATCHED LED DRIVER
A6276EA
Dimensions in Inches (controlling dimensions)
0.014 0.008
24
13
0.430 0.280 0.240
MAX
0.300
BSC
1
0.070 0.045
0.100 1.280 1.230
BSC
12
0.005
MIN
0.210
MAX
0.015
MIN
0.150 0.115 0.022 0.014
Dwg. MA-001-24 in
Dimensions in Millimeters (for reference only)
0.355 0.204
24
13
10.92 7.11 6.10
MAX
7.62
BSC
1
1.77 1.15
6
7 32.51 31.24
2.54
BSC
12
0.13
MIN
5.33
MAX
0.39
MIN
3.81 2.93 0.558 0.356
Dwg. MA-001-24 mm
NOTES: 1. 2. 3. 4.
Exact body and lead configuration at vendor's option within limits shown. Lead spacing tolerance is non-cumulative Lead thickness is measured at seating plane or below. Supplied in standard sticks/tubes of 15 devices.
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11
6276 16-BIT SERIAL-INPUT, CONSTANT-CURRENT LATCHED LED DRIVER
A6276ELW
Dimensions in Inches (for reference only)
24 13 0.0125 0.0091
0.2992 0.2914
0.419 0.394
0.050 0.016 0.020 0.013
1
2
3 0.6141 0.5985
0.050
BSC
0 TO 8
0.0926 0.1043 0.0040 MIN.
Dwg. MA-008-24A in
Dimensions in Millimeters (controlling dimensions)
24 13 0.32 0.23
7.60 7.40
10.65 10.00
1.27 0.40 0.51 0.33
1
2
3 15.60 15.20
1.27
BSC
0 TO 8
2.65 2.35 0.10 MIN.
Dwg. MA-008-24A mm
NOTES: 1. Exact body and lead configuration at vendor's option within limits shown. 2. Lead spacing tolerance is non-cumulative. 3. Supplied in standard sticks/tubes of 31 devices or add "TR" to part number for tape and reel.
12
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
This datasheet has been download from: www..com Datasheets for electronics components.


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