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LTC4211 Hot Swap Controller with Multifunction Current Control
FEATURES
s s s
DESCRIPTIO
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s s
s s s s s s
Allows Safe Board Insertion and Removal from a Live Backplane Controls Supply Voltages from 2.5V to 16.5V Programmable Soft-Start with Inrush Current Limiting, No External Gate Capacitor Required Faster Turn-Off Time Because No External Gate Capacitor is Required Dual Level Overcurrent Fault Protection Programmable Response Time for Overcurrent Protection (MS) Programmable Overvoltage Protection (MS) Automatic Retry or Latched Mode Operation (MS) High Side Drive for an External N-Channel FET User-Programmable Supply Voltage Power-Up Rate FB Pin Monitors VOUT and Signals RESET Glitch Filter Protects Against Spurious RESET Signal
The LTC(R)4211 is a Hot SwapTM controller that allows a board to be safely inserted and removed from a live backplane. An internal high side switch driver controls the gate of an external N-channel MOSFET for supply voltages ranging from 2.5V to 16.5V. The LTC4211 provides softstart and inrush current limiting during the start-up period which has a programmable duration. Two on-chip current limit comparators provide dual level overcurrent circuit breaker protection. The slow comparator trips at VCC - 50mV and activates in 20s (or programmed by an external filter capacitor, MS only). The fast comparator trips at VCC - 150mV and typically responds in 300ns. The FB pin monitors the output supply voltage and signals the RESET output pin. The ON pin signal turns the chip on and off and can also be used for the reset function. The MS package has FAULT and FILTER pins to provide additional functions like fault indication, autoretry or latch-off modes, programmable current limit response time and programmable overvoltage protection using an external Zener diode clamp.
, LTC and LT are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation.
APPLICATIO S
s s
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Electronic Circuit Breaker Hot Board Insertion and Removal (Either On Backplane or On Removable Card) Industrial High Side Switch/Circuit Breaker
TYPICAL APPLICATIO
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) VCC 5V LONG
Single Channel 5V Hot Swap Controller Power-Up Sequence
RSENSE 0.007 RX 10 CX 100nF M1 Si4410DY
+
CLOAD 8 VCC 7 SENSE 6 GATE FB 5 R3 36k R4 15k RESET TIMER GND CTIMER 10nF 4 3 1 R5 10k P LOGIC RESET
VOUT 5V 5A
VGATE 5V/DIV
Z1*
SHORT
R1 20k R2 10k
2
ON
LTC4211
GND
PCB CONNECTION SENSE LONG Z1 = 1SMA10A OR SMAJ10A * OPTIONAL
GND
4211 TA01A
U
NO CLOAD VRESET 5V/DIV VON 1V/DIV VTIMER 1V/DIV 2.5ms/DIV
4211 TA01b
U
U
4211f
1
LTC4211
ABSOLUTE
AXI U
RATI GS
Supply Voltage (VCC) ............................................... 17V Input Voltage FB, ON .................................................. - 0.3V to 17V SENSE, FILTER .......................... - 0.3V to VCC + 0.3V TIMER .....................................................- 0.3V to 2V Output Voltage GATE ............................... Internally Limited (Note 3) RESET, FAULT ...................................... - 0.3V to 17V
PACKAGE/ORDER I FOR ATIO
TOP VIEW RESET 1 ON 2 TIMER 3 GND 4 8 7 6 5 VCC SENSE GATE FB
RESET ON TIMER GND
1 2 3 4
S8 PACKAGE 8-LEAD PLASTIC SO
MS8 PACKAGE 8-LEAD PLASTIC MSOP
TJMAX = 125C, JA = 200C/ W
TJMAX = 125C, JA = 150C/ W
ORDER PART NUMBER LTC4211CS8 LTC4211IS8
S8 PART MARKING 4211 4211I
ORDER PART NUMBER LTC4211CMS8 LTC4211IMS8
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL VCC ICC VLKO VLKOHST IINFB IINON ILEAK IINSENSE VCB(FAST) VCB(SLOW) IGATEUP PARAMETER VCC Supply Voltage Range VCC Supply Current Internal VCC Undervoltage Lockout VCC Undervoltage Lockout Hysteresis FB Input Current ON Input Current RESET, FAULT Leakage Current SENSE Input Current SENSE Trip Voltage (VCC - VSENSE) SENSE Trip Voltage (VCC - VSENSE) GATE Pull-Up Current Fast GATE Pull-Down Current
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VCC = 5V, unless otherwise noted. (Note 2)
CONDITIONS
q
FB = High, ON = High, TIMER = Low VCC Low-to-High Transition VFB = VCC or GND VON = VCC or GND VRESET = VFAULT = 15V, Pull-Down Device Off VSENSE = VCC or GND Fast Comparator Trips Slow Comparator Trips Charge Pump On, VGATE 0.2V ON Low FAULT Latched and Circuit Breaker Tripped or in UVLO
IGATEDOWN Normal GATE Pull-Down Current
2
U
U
W
WW U
W
(Note 1)
Operating Temperature Range LTC4211C .............................................. 0C to 70C LTC4211I ........................................... - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
TOP VIEW 8 7 6 5 VCC SENSE GATE FB
TOP VIEW RESET ON FILTER TIMER GND 1 2 3 4 5 10 9 8 7 6 FAULT VCC SENSE GATE FB
MS PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125C, JA = 200C/ W
MS8 PART MARKING LTSC LTSD
ORDER PART NUMBER LTC4211CMS LTC4211IMS
MS PART MARKING LTSU LTSV
MIN 2.5
q q
TYP 1
MAX 16.5 1.5 2.47 10 10 2.5 10 170 60 -7.5 270
UNITS V mA V mV A A A A mV mV A A mA
4211f
2.13
2.3 120 1 1
q
0.1 1 130 40 -12.5 130 150 50 - 10 200 50
q q q q
LTC4211
ELECTRICAL CHARACTERISTICS
SYMBOL VGATE PARAMETER External N-Channel Gate Drive
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VCC = 5V, unless otherwise noted. (Note 2)
CONDITIONS VGATE - VCC (For VCC = 2.5V) VGATE - VCC (For VCC = 2.7V) VGATE - VCC (For VCC = 3.3V) VGATE - VCC (For VCC = 5V) VGATE - VCC (For VCC = 12V) VGATE - VCC (For VCC = 15V) FB High to Low 2.5V VCC 16.5V
q q q q q q q q q
MIN 4.0 4.5 5.0 10 10 8 0.08 1.223
TYP
MAX 8 8 10 16 18 18
UNITS V V V V V V V V mV mV V V mV A A V mV A mA V V V mV V V ns s ms s s s s
VGATEOV VFB VFB VFBHST VONHI VONLO VONHST IFILTER VFILTER ITMR VTMR VFAULT VFAULTHST VOLFAULT VOLRESET tFAULTFC tFAULTSC
GATE Overvoltage Lockout Threshold FB Voltage Threshold FB Threshold Line Regulation FB Voltage Threshold Hysteresis ON Threshold High ON Threshold Low ON Hysteresis FILTER Current FILTER Threshold TIMER Current TIMER Threshold FAULT Threshold FAULT Threshold Hysteresis Output Low Voltage Output Low Voltage FAST COMP Trip to GATE Discharging IFAULT = 1.6mA IRESET = 1.6mA VCB = 0mV to 200mV Step During Slow Fault Condition During Normal and Reset Conditions Latched Off Threshold, FILTER Low to High Timer On, VTIMER = 1V Timer Off, TIMER = 1.5V TIMER Low to High TIMER High to Low Latched Off Threshold, FAULT High to Low
0.2 1.236 0.5 3
0.3 1.248 5 1.39 1.26 -1.5 13 1.26 - 1.5 1.26 0.40 1.26 0.4 0.4 700 30 8 5 7 250
q q
1.23 1.20 -2.5 7 1.20 - 2.5 1.20 0.15 1.20
1.316 1.236 80 -2 10 1.236 80 -2 3 1.236 0.200 1.236 50 0.14 0.14 300
q q q
VFILTERHST FILTER Threshold Hysteresis
q
q q q
q q q q q q q q
SLOW COMP Trip to GATE Discharging VCB = 0mV to 100mV Step, 8-Pin Version or FILTER Floating VCB = 0mV to 100mV Step, 10nF at FILTER Pin to GND
10 4 1 2
20 6 3 4.5 150 8
tEXTFAULT tFILTER tRESET tOFF
FAULT Low to GATE Discharging FILTER High to FAULT Latched Circuit Breaker Reset Delay Time Turn-Off Time
VFAULT = 5V to 0V VFILTER = 0V to 5V ON Low to FAULT High ON Low to GATE Off
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: All current into device pins are positive; all current out of device pins are negative; all voltages are referenced to ground unless otherwise specified.
Note 3: An internal Zener at the GATE pin clamps the charge pump voltage to a typical maximum operating voltage of 26V. External voltage applied to the GATE pin beyond the internal Zener voltage may damage the part. If a lower GATE pin voltage is desired, use an external Zener diode. The GATE capacitance must be < 0.15F at maximum VCC.
4211f
3
LTC4211 TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current vs Supply Voltage
4.0 3.5 TA = 25C 4.0 3.5
UNDERVOLTAGE LOCKOUT THRESHOLD (V)
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
3.0 2.5 2.0 1.5 1.0 0.5 0 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G01
ON Pin Threshold vs Supply Voltage
1.40 1.35 TA = 25C
ON PIN THRESHOLD (V)
ON PIN THRESHOLD (V)
HIGH THRESHOLD 1.30 1.25 1.20 1.15 1.10 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G04
1.30 1.25 1.20 1.15 1.10 -75 -50 -25 LOW THRESHOLD
GATE VOLTAGE (V)
LOW THRESHOLD
GATE Voltage vs Temperature
30 VCC = 15V 25 VCC = 12V 18 16 14
GATE VOLTAGE (V)
VGATE - VCC (V)
VCC = 5V
VGATE - VCC (V)
20 15 10 5
VCC = 3V
0 -75 -50 -25
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G07
4
UW
Supply Current vs Temperature
2.5
Undervoltage Lockout Threshold vs Temperature
2.4 RISING EDGE
3.0 2.5 2.0 1.5 1.0 0.5 0 -75 -50 -25 VCC = 5V VCC = 3V VCC = 15V VCC = 12V
2.3
2.2
FALLING EDGE
2.1
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G02
2.0 -75 -50 -25
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G03
ON Pin Threshold vs Temperature
1.40 1.35 HIGH THRESHOLD
20 15 10 5 0 30
GATE Voltage vs Supply Voltage
TA = 25C
VCC = 5V
25
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G05
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G06
VGATE - VCC vs Supply Voltage
TA = 25C 18 16 14 12 10 8 6 4 2 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G08
VGATE - VCC vs Temperature
VCC = 12V
12 10 8 6 4 2 0
VCC = 15V
VCC = 5V VCC = 3V
0 -75 -50 -25
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G09
4211f
LTC4211 TYPICAL PERFOR A CE CHARACTERISTICS
GATE Output Source Current vs Supply Voltage
13
GATE OUTPUT SOURCE CURRENT (A)
12 11 10 9 8 7 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G10
NORMAL GATE PULL-DOWN CURRENT (A)
TA = 25C
GATE OUTPUT SOURCE CURRENT (A)
Normal GATE Pull-Down Current vs Temperature
NORMAL GATE PULL-DOWN CURRENT (A)
260 240 220 200 180 160
FAST GATE PULL-DOWN CURRENT (mA)
70 60 50 40 30 20
FAST GATE PULL-DOWN CURRENT (mA)
VCC = 5V
140 -75 -50 -25
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G13
Feedback Threshold vs Supply Voltage
1.250 TA = 25C FEEDBACK THRESHOLD (V)
FEEDBACK THRESHOLD (V)
1.245 HIGH THRESHOLD 1.240 LOW THRESHOLD 1.235
HIGH THRESHOLD 1.240
FILTER THRESHOLD (V)
1.230
1.225
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G16
UW
GATE Output Source Current vs Temperature
13 12 11 10 9 8 7 -75 -50 -25 VCC = 12V VCC = 5V VCC = 3V
Normal GATE Pull-Down Current vs Supply Voltage
260 240 220 200 180 160 140 TA = 25C
VCC = 15V
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G11
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G12
Fast GATE Pull-Down Current vs Supply Voltage
80 TA = 25C
Fast GATE Pull-Down Current vs Temperature
80 70 60 50 40 30 20 -75 -50 -25 VCC = 5V
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G14
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G15
Feedback Threshold vs Temperature
1.250 VCC = 5V
FILTER Threshold vs Supply Voltage
1.40 1.35 1.30 1.25 1.20 1.15 1.10 HIGH THRESHOLD TA = 25C
1.245
1.235
LOW THRESHOLD
LOW THRESHOLD
1.230
1.225 -75 -50 -25
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G17
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G18
4211f
5
LTC4211 TYPICAL PERFOR A CE CHARACTERISTICS
FILTER Threshold vs Temperature
1.40 1.35
FILTER THRESHOLD (V)
VCC = 5V
FILTER PULL-UP CURRENT (A)
FILTER PULL-UP CURRENT (A)
1.30 1.25 1.20 LOW THRESHOLD 1.15 1.10 -75 -50 -25 HIGH THRESHOLD
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G19
FILTER Pull-Down Current vs Supply Voltage
12.0
FILTER PULL-DOWN CURRENT (A)
TA = 25C
FILTER PULL-DOWN CURRENT (A)
11.5 11.0 10.5 10.0 9.5 9.0 8.5 8.0 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G22
11.0 10.5 10.0 9.5 9.0 8.5 8.0 -75 -50 -25
TIMER HIGH THRESHOLD (V)
TIMER High Threshold vs Temperature
1.26 1.25 1.24 1.23 1.22 1.21 1.20 -75 -50 -25 VCC = 5V 1.0
TIMER HIGH THRESHOLD (V)
TIMER LOW THRESHOLD (V)
TIMER LOW THRESHOLD (V)
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G25
6
UW
FILTER Pull-Up Current vs Supply Voltage
2.3 2.2 2.1 2.0 1.9 1.8 1.7 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G20
FILTER Pull-Up Current vs Temperature
2.3 2.2 2.1 2.0 1.9 1.8 1.7 -75 -50 -25 VCC = 5V
TA = 25C
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G21
FILTER Pull-Down Current vs Temperature
12.0 11.5
1.26
TIMER High Threshold vs Supply Voltage
TA = 25C
VCC = 5V
1.25 1.24 1.23 1.22 1.21 1.20
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G23
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G24
TIMER Low Threshold vs Supply Voltage
TA = 25C
TIMER Low Threshold vs Temperature
1.0 VCC = 5V
0.8
0.8
0.6
0.6
0.4
0.4
0.2
0.2
0
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G26
0 -75 -50 -25
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G27
4211f
LTC4211 TYPICAL PERFOR A CE CHARACTERISTICS
TIMER Pull-Up Current vs Supply Voltage
2.30 TA = 25C
TIMER PULL-UP CURRENT (A)
TIMER PULL-UP CURRENT (A)
2.20 2.10 2.00 1.90 1.80 1.70 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G28
TIMER PULL-DOWN CURRENT (mA)
TIMER Pull-Down Current vs Temperature
6 VCC = 5V 1.6 1.4 1.2 4 1.0
TIMER PULL-DOWN CURRENT (mA)
5
VOL (V)
3 2 1 0 -75 -50 -25
0.8 0.6 0.4 0.2 0 IOL = 5mA IOL = 1mA 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G32
VOL (V)
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G31
VCB (SLOW COMP) vs Supply Voltage
60 58 56
VCB (SLOW COMP) (mV)
60
TA = 25C
VCB (SLOW COMP) (mV)
54 52 50 48 46 44 42 40 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G34
54 52 50 48 46 44 42 40 -75 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G35
VCB (FAST COMP) (mV)
UW
TIMER Pull-Up Current vs Temperature
2.3 2.2 2.1 2.0 1.9 1.8 1.7 -75 -50 -25 VCC = 5V
6 5 4 3 2 1 0
TIMER Pull-Down Current vs Supply Voltage
TA = 25C
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G29
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G30
VOL vs Supply Voltage
TA = 25C RESET OR FAULT 1.6
VOL vs Temperature
VCC = 5V 1.4 RESET OR FAULT 1.2 1.0 0.8 0.6 0.4 0.2 0 -75 -50 -25 IOL = 1mA 0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G33
IOL = 5mA
VCB (SLOW COMP) vs Temperature
58 56 160 155 150 145 140 135 130 VCC = 5V 170 165
VCB (FAST COMP) vs Supply Voltage
TA = 25C
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G36
4211f
7
LTC4211 TYPICAL PERFOR A CE CHARACTERISTICS
VCB (FAST COMP) vs Temperature
170 165
VCB (FAST COMP) (mV)
VCC = 5V
SLOW COMP RESPONSE TIME (s)
24 22 20 18 16 14 12 10 0
SLOW COMP RESPONSE TIME (s)
160 155 150 145 140 135 130 -75 - 50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G37
FAST COMP Response Time vs Supply Voltage
800
FILTER HIGH TO FAULT ACTIVATION TIME (s)
FAST COMP RESPONSE TIME (ns)
FAST COMP RESPONSE TIME (ns)
700 600 500 400 300 200 100 0 0
TA = 25C VCB = 0mV TO 200mV STEP
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G40
FILTER High to FAULT Activation Time vs Temperature
FILTER HIGH TO FAULT ACTIVATION TIME (s)
6.0 5.5 5.0 4.5 4.0 3.5
VCC = 5V
CIRCUIT BREAKER RESET TIME (s)
180 160 140 120 100 80
CIRCUIT BREAKER RESET TIME (s)
3.0 -75 -50 -25
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G43
8
UW
SLOW COMP Response Time vs Supply Voltage
26 TA = 25C 8-PIN VERSION OR FILTER FLOATING
SLOW COMP Response Time vs Temperature
26 24 22 20 18 16 14 12 10 -75 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G39
8-PIN VERSION OR FILTER FLOATING VCC = 12V
VCC = 15V
VCC = 5V
VCC = 3V
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G38
FAST COMP Response Time vs Temperature
800 700 600 500 VCC = 3V 400 300 200 100 0 -75 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G41
FILTER High to FAULT Activation Time vs Supply Voltage
6.0 5.5 5.0 4.5 4.0 3.5 3.0 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G42
VCB = 0mV TO 200mV STEP
TA = 25C
VCC = 12V VCC = 5V
VCC = 15V
Circuit Breaker RESET Time vs Supply Voltage
200 TA = 25C
Circuit Breaker RESET Time vs Temperature
200 180 160 140 120 100 80 -75 -50 -25 VCC = 5V
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G44
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G45
4211f
LTC4211 TYPICAL PERFOR A CE CHARACTERISTICS
FAULT Pin Low to GATE Discharging Time vs Supply Voltage
FAULT PIN LOW TO GATE DISCHARGING TIME (s)
4.5 4.0 3.5 3.0 2.5 2.0 1.5 0
FAULT PIN LOW TO GATE DISCHARGING TIME (s)
TA = 25C
FAULT THRESHOLD VOLTAGE (V)
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G46
FAULT Threshold Voltage vs Temperature
1.50
FAULT THRESHOLD VOLTAGE (V)
11
VCC = 5V
10
1.45 TURN OFF TIME (s) 1.40 1.35 1.30 1.25 1.20 HIGH THRESHOLD LOW THRESHOLD
TURN OFF TIME (s)
1.15 1.10 -75 - 50 -25
5
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G49
GATE Overvoltage Lockout Threshold vs Supply Voltage
GATE OVERVOLTAGE LOCKOUT THRESHOLD (V)
0.5
GATE OVERVOLTAGE LOCKOUT THRESHOLD (V)
TA = 25C
0.4
0.3
0.2
0.1
0
0
2
4
UW
FAULT Pin Low to GATE Discharging Time vs Temperature
4.5 4.0 3.5 3.0 2.5 2.0 1.5 -75 -50 -25 VCC = 5V
1.50 1.45 1.40 1.35 1.30 1.25 1.20 1.15 1.10
FAULT Threshold Voltage vs Supply Voltage
TA = 25C
HIGH THRESHOLD LOW THRESHOLD
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G47
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G48
Turn Off Time vs Supply Voltage
TA = 25C
Turn Off Time vs Temperature
11 10 9 8 7 6 5 -75 -50 -25 VCC = 5V
9 8 7 6
0
2
4
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G50
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G51
GATE Overvoltage Lockout Threshold vs Temperature
0.5 VCC = 5V
0.4
0.3
0.2
0.1
6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V)
4211 G52
0 -75 -50 -25
0 25 50 75 100 125 150 TEMPERATURE (C)
4211 G53
4211f
9
LTC4211
PI FU CTIO S
RESET (Pin 1/Pin 1): An open-drain N-channel MOSFET whose source connects to GND (Pin 4/Pin 5). This pin pulls low if the voltage at the FB pin (Pin 5/Pin 6) falls below the FB pin threshold (1.236V). During the start-up cycle, the RESET pin goes high impedance at the end of the second timing cycle after the FB pin goes above the FB threshold. This pin requires an external pull-up resistor to VCC. If an undervoltage lockout condition occurs, the RESET pin pulls low independently of the FB pin to prevent false glitches. ON (Pin 2/Pin 2): An active high signal used to enable or disable LTC4211 operation. COMP1's threshold is set at 1.236V and its hysteresis is set at 80mV. If a logic high signal is applied to the ON pin (VON > 1.316V), the first timing cycle begins if an overvoltage condition does not exist on the GATE pin (Pin 6/Pin 7). If a logic low signal is applied to the ON pin (VON < 1.236V), the GATE pin is pulled low by an internal 200A current sink. The ON pin can also be used to reset the electronic circuit breaker. If the ON pin is cycled low and then high following a circuit breaker trip, the internal circuit breaker is reset, and the LTC4211 begins a new start-up cycle. TIMER (Pin 3/Pin 4): A capacitor connected from this pin to GND sets the LTC4211's system timing. The LTC4211's initial and second start-up timing cycles and its internal "power good" delay time are defined by this capacitor. GND (Pin 4/Pin 5): Device Ground Connection. Connect this pin to the system's analog ground plane. FB (Pin 5/Pin 6): The FB (Feedback) pin is an input to the COMP2 comparator and monitors the output supply voltage through an external resistor divider. If VFB < 1.236V, the RESET pin pulls low. An internal glitch filter at COMP2's output helps prevent negative voltage transients from triggering a reset condition. If VFB > 1.239V, the RESET pin goes high after one timing cycle. GATE (Pin 6/Pin 7): The output signal at this pin is the high side gate drive for the external N-channel FET pass transistor.
10
U
U
U
(8-Lead Package/10-Lead Package)
As shown in the Block Diagram, an internal charge pump supplies a 10A gate current and sufficient gate voltage drive to the external FET for supply voltages from 2.5V to 16.5V. The internal charge-pump and zener clamps at the GATE pin determine the gate drive voltage (VGATE = VGATE - VCC). The charge pump produces a minimum 4V of VGATE for supplies in the range of 2.5V < VCC < 4.75V. For VCC > 4.75V, the VGATE is limited by zener clamp Z1 connecting between GATE and VCC pins. The VGATE is typically at 12V and with guaranteed minimum value of 10V. For VCC > 15V, the zener clamp Z2 sets the limitation for VGATE. Z2 clamps the gate voltage to ground to 26V typically. The minimum Z2's clamp voltage is 23V. This effectively sets VGATE to 8V minimum. SENSE (Pin 7/Pin 8): Circuit Breaker Set Pin. With a sense resistor placed in the power path between VCC and SENSE, the LTC4211's electronic circuit breaker trips if the voltage across the sense resistor exceeds the thresholds set internally for the SLOW COMP and the FAST COMP, as shown in the Block Diagram. The threshold for the SLOW COMP is VCB(SLOW) = 50mV, and the electronic circuit breaker trips if the voltage across the sense resistor exceeds 50mV for 20s. The SLOW COMP delay is fixed in the S8/MS8 version and adjustable in the MS version of the LTC4211. To adjust the SLOW COMP's delay, please refer to the section on Adjusting SLOW COMP's Response Time. Under transient conditions where large step current changes can and do occur over shorter periods of time, a second (fast) comparator instead trips the electronic circuit breaker. The threshold for the FAST COMP is set at VCB(FAST) = 150mV, and the circuit breaker trips if the voltage across the sense resistor exceeds 150mV for more than 300ns. The FAST COMP's delay is fixed in the LTC4211 and cannot be adjusted. To disable the electronic circuit breaker, connect the VCC and SENSE pins together. VCC (Pin 8/Pin 9): This is the positive supply input to the LTC4211. The LTC4211 operates from 2.5V < VCC < 16.5V, and the supply current is typically 1mA. An internal undervoltage lockout circuit disables the device until the voltage at VCC exceeds 2.3V.
4211f
LTC4211
PI FU CTIO S
FAULT (Not available on S8/MS8, Pin 10 MS): FAULT is both an input and an output. Connected to this pin are an analog comparator (COMP6) and an open-drain N-channel FET. During normal operation, if COMP6 is driven below 1.236V, the electronic circuit breaker trips and the GATE pin pulls low. Typically, a 10k pull-up resistor connects to the FAULT pin. This allows the LTC4211 to begin a second timing cycle (VFAULT > 1.286) and start-up properly. This also allows the use of the FAULT pin as a status output. Under normal operating conditions, the FAULT output is a logic high. Two conditions cause an active low on FAULT: (1) the LTC4211's electronic circuit breaker trips because of an output short circuit (VOUT =
BLOCK DIAGRA
COMP7 UVLO 50mV
150mV RESET 1 M1 200A 10A
tTIMER
+
VCC 0.2V 2A
-
SLOW COMP
+
FAST COMP
-
M3
+
COMP3
-
TIMER 3 (4) M6 GLITCH FILTER (SEE NOTE 1) 300ns DELAY CB TRIPS OR UVLO ON LOW START-UP CURRENT REGULATOR GATE CHARGING
+
COMP4 VREF POWER BAD
-
NORMAL
VCC 2A M5 FILTER (3) MS ONLY M4 VREF 10A
LOGIC
FAULT CB TRIPS
+
COMP5
-
NORMAL, RESET
GLITCH FILTER 150s
GLITCH FILTER FUNCTION OF OVERDRIVE
COMP1
COMP2
VREF NOTE 1: SET BY FILTER CAPACITOR FOR MS 20s DEFAULT FOR MS8, S8 PIN NUMBERS FOR S8/MS8 (MS) 2 ON 5 (6) FB
VREF
4211 BD
-
+
+
-
+
+ -
-
+ -
W
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U
U
(8-Lead Package/10-Lead Package)
0V) or because of a fast output overcurrent transient (FAST COMP trips circuit breaker); or (2) VFILTER > 1.236V. The FAULT output is driven to logic low and is latched logic low until the ON pin is driven to logic low for 150s (the tRESET duration). FILTER (Not available S8/MS8, Pin 3 MS): Overcurrent Fault Timing Pin and Overvoltage Fault Set pin. With a capacitor connected from this pin to ground, the SLOW COMP's response time can be adjusted. In the S8/MS8 version of the LTC4211, the FILTER pin is not available and the delay time from overcurrent detect to GATE OFF is fixed at 20s.
VCC 8 (9)
SENSE 7 (8)
GATE 6 (7) Z2 VZ (TYP) = 26V VCC 0.2V 10A CHARGE PUMP
Z1 VZ (TYP) = 12V
+
COMP6
VREF
-
FAULT (10) MS ONLY M2
GND VREF BG 0.2V 4 (5)
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11
LTC4211
OPERATIO
HOT CIRCUIT INSERTION When circuit boards are inserted into or removed from live backplanes, the supply bypass capacitors can draw huge transient currents from the backplane power bus as they charge. The transient current can cause permanent damage to the connector pins as well as cause glitches on the system supply, causing other boards in the system to reset. The LTC4211 is designed to turn a printed circuit board's supply voltages ON and OFF in a controlled manner, allowing the circuit board to be safely inserted or removed from a live backplane. The device provides a system reset signal to indicate when board supply voltage drops below a predetermined level, as well as a dual function fault monitor. OUTPUT VOLTAGE MONITOR The LTC4211 uses a 1.236V bandgap reference, precision voltage comparator and an external resistor divider to monitor the output supply voltage as shown in Figure 1. The operation of the supply monitor in normal mode is illustrated in Figure 2. When the supply voltage at the FB pin drops below its reset threshold (1.236V), the comparator
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) VCC LONG
ON/RESET
GND
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COMP2 output goes high. After passing through a glitch filter, RESET is pulled low (Time Point N2). When the voltage at the FB pin rises above its reset threshold (1.239V), COMP2's output goes low and a timing cycle starts (Time Point N4). After a complete timing cycle, RESET is pulled high by the external pull-up resistor. If the FB pin rises above the reset threshold for less than a timing cycle, the RESET output remains low (Time Point N3). As shown in Figure 5, the LTC4211's RESET pin is logic low during any undervoltage lockout condition and during the initial insertion of a PC board. Under normal operation, RESET goes to logic high at the end of the soft-start cycle only after the FB pin voltage rises above its reset threshold of 1.239V.
N1 VOUT 1.236V TIMER N2 V1 V2 N3 V1 V2 N4 RESET POWER GOOD DELAY 4211 F02
Figure 2. Supply Monitor Waveforms in Normal Mode
RSENSE
Q1
+
8 LTC4211 VCC 7 SENSE 6 GATE R1 SHORT 2 ON R3 10k
VOUT CLOAD
-
LOGIC COMP2
FB 5 R2
+
P TIMER 1.236V REFERENCE RESET Q2 GND 4 CTIMER LONG
4211 F01
1
RESET
TIMER 3
Figure 1. Supply Voltage Monitor Block Diagram
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LTC4211
OPERATIO
UNDERVOLTAGE LOCKOUT The LTC4211's power-on reset circuit initializes the startup procedure and ensures the chip is in the proper state if the input supply voltage is too low. If the supply voltage falls below 2.18V, the LTC4211 is in undervoltage lockout (UVLO) mode, and the GATE pin is pulled low. Since the UVLO circuitry uses hysteresis, the chip restarts after the supply voltage rises above 2.3V and the ON pin goes high. In addition, users can utilize the ON comparator (COMP1) or the FAULT comparator (COMP6) to effectively program a higher undervoltage lockout level. Figure 3 shows the external resistor divider at the ON pin programs the system's undervoltage lockout voltage. The system will enter the plug-in cycle after the ON pin rises above 1.316V. The resistor divider sets the circuit to turn on when VCC reaches around 79% of its final value. If a different turn on VCC voltage is desired change the resistor divider value accordingly. The FAULT comparator can be the alternative for external undervoltage lockout setting. If the FAULT comparator is used for this purpose, the system will wait for the input voltage to increase above the level set by the user before starting the second timing cycle. Also, if the input voltage drops below the set level in normal operating mode, the user must cycle the ON pin or VCC to restart the system.
VIN 3.3V R1 10k ON PIN R2 10k R2 10k VIN 5V R1 20k ON PIN R2 10k
4211 F04
GLITCH FILTER TIME (s)
(a) 3.3VIN
Figure 3. ON Pin Sets the Undervoltage Lockout Voltage Externally
GLITCH FILTER FOR RESET The LTC4211 has a glitch filter to prevent RESET from generating a system reset if there are transients on the FB
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pin. The relationship between glitch filter time and the feedback transient voltage is shown in Figure 4.
250 TA = 25C 200 150 100 50 0 0 20 40 60 80 100 120 140 160 180 200 FEEDBACK TRANSIENT (mV)
4211 F03
Figure 4. FB Comparator Glitch Filter Time vs Feedback Transient Voltage
SYSTEM TIMING System timing for the LTC4211 is generated at the TIMER pin (see the Block Diagram). If the LTC4211's internal timing circuit is off, an internal N-channel FET connects the TIMER pin to GND. If the timing circuit is enabled, an internal 2A current source is then connected to the TIMER pin to charge CTIMER at a rate given by Equation 1:
VIN 12V R1 61.9k ON PIN
C TIMER Charge -Up Rate =
2A C TIMER
(1)
(b) 5VIN
(c) 12VIN
When the TIMER pin voltage reaches COMP4's threshold of 1.236V, the TIMER pin is reset to GND. Equation 2 gives an expression for the timer period:
tTIMER = 1.236V *
C TIMER 2A
(2)
As a design aid, the LTC4211's timer period as a function of the CTIMER using standard values from 3.3nF to 0.33F is shown in Table 1.
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LTC4211
OPERATIO
CTIMER 0.0033F 0.0047F 0.0068F 0.0082F 0.01F 0.015F 0.022F 0.033F 0.047F 0.068F 0.082F 0.1F 0.15F 0.22F 0.33F
Table 1. tTIMER vs CTIMER
tTIMER 2.0ms 2.9ms 4.2ms 5.1ms 6.2ms 9.3ms 13.6ms 20.4ms 29.0ms 42.0ms 50.7ms 61.8ms 92.7ms 136ms 204ms
CHECK FOR FILTER LOW (VREF + 50mV) FAST COMPARATOR ARMED CHECK FOR GATE < 0.2V 12 3 45 6
VCC
ON
TIMER
GATE
VOUT
RESET
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The CTIMER value is vital to ensure a proper start-up and reliable operation. A system may not get started if a timing period is set too short in relation to the time needed for the output voltage to ramp up from zero to its rated value. Conversely, this timing period should not be excessive as an output short can occur at start-up allowing the external MOSFET to overheat. A good starting point is to set CTIMER = 10nF and adjust its value accordingly to suit the specific applications. OPERATING SEQUENCE Power-Up, Start-Up Check and Plug-In Timing Cycle The sequence of operations for the LTC4211 is illustrated in the timing diagram of Figure 5. When a PC board is first inserted into a live backplane, the LTC4211 first performs
ON GOES LOW RESET PULLED LOW DUE TO POWER BAD 9 10 SLOW COMPARATOR ARMED 7 8 VTMR = VREF 2A 2A 10A 200A POWER GOOD (VFB > VREF) POWER BAD (VFB < VREF)
4211 F05
PLUG-IN CYCLE FIRST TIMING CYCLE
SOFT-START CYCLE SECOND TIMING CYCLE
Figure 5. Normal Power-Up Sequence
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LTC4211
OPERATIO
a start-up check to make sure the supply voltage is above its 2.3V UVLO threshold (see Time Point 1). If the input supply voltage is valid, the gate of the external pass transistor is pulled to ground by the internal 200A current source connected at the GATE pin. The TIMER pin is held low by an internal N-channel pull-down transistor (see M6, LTC4211 Block Diagram) and the FILTER pin voltage is pulled to ground by an internal 10A current source. Once VCC and ON (the ON pin is >1.316) are valid, the LTC4211 checks to make sure that GATE is OFF (VGATE < 0.2V) at Time Point 2. An internal timing circuit is enabled and the TIMER pin voltage ramps up at the rate described by Equation 1. At Time Point 3 (the timing period programmed by CTIMER), the TIMER pin voltage equals VTMR (1.236V). Next, the TIMER pin voltage ramps down to Time Point 4 where the LTC4211 performs two checks: (1) FILTER pin voltage is low (VFILTER < 1.156V) and (2) FAULT pin voltage is high (VFAULT > 1.286V). If both conditions are met, the LTC4211 begins a second timing (soft-start) cycle. Second Timing (Soft-Start) Cycle At the beginning of the second timing cycle (Time Point 5), the LTC4211's FAST COMP is armed and an internal 10A current source working with an internal charge pump provides the gate drive to the external pass transistor. An expression for the GATE voltage slew rate is given by Equation 3:
VGATE Slew Rate, dVGATE 10A = dt C GATE
where CGATE = Power MOSFET gate input capacitance (CISS). For example, a Si4410DY (a 30V N-channel power MOSFET) exhibits an approximate CGATE of 3300pF at VGS = 10V. The LTC4211's GATE voltage rate-of-change (slew rate) for this example would be:
dV 10A V VGATE Slew Rate, GATE = = 3.03 dt 3300pF ms
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The inrush current being delivered to the load while the GATE is ramping is dependent on CLOAD and CGATE. Equation 4 gives an expression for the inrush current during the second timing cycle:
IINRUSH = dVGATE C * C LOAD = 10A * LOAD dt C GATE
(4)
For example, if CGATE = 3300pF and CLOAD = 2000F, the inrush current charging CLOAD is:
IINRUSH = 10A *
2000F = 6.06A 0.0033F
(5)
At Time Point 6, the output voltage trips COMP2's threshold, signaling an output voltage "power good" condition. At Time Point 7, RESET is asserted high, SLOW COMP is armed and the LTC4211 enters a fault monitor mode. The TIMER voltage then ramps down to Time Point 8. Power-Off Cycle As shown at Time Point 9, an external hard reset is initiated by pulling the ON pin low (VON < 1.236V). The GATE pin voltage is ramped to ground by the internal 200A current source, discharging CGATE and turning off the pass transistor. As CLOAD discharges, the output voltage crosses COMP2's threshold, signaling a "power bad" condition at Time Point 10. At this point, RESET is asserted low. SOFT-START WITH CURRENT LIMITING During the second timing cycle, the inrush current was described by Equation 4. Note that there is a one-to-one correspondence in the inrush current to CLOAD. If the inrush current is large enough to cause a voltage drop greater than 50mV across the sense resistor, an internal servo loop controls the operation of the 10A current source at the GATE pin to regulate the load current to:
ILIMIT (SOFTSTART) = 50mV RSENSE
(3)
(6)
For example, the inrush current is limited to 5A when RSENSE = 0.01.
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15
LTC4211
OPERATIO
In this fashion, the inrush current is controlled and CLOAD is charged up slowly during the soft-start cycle. The timing diagram in Figure 6 illustrates the operation of the LTC4211 in a normal power-up sequence with limited inrush current as described by Equation 6. At Time Point 5, the GATE pin voltage begins to ramp indicating that the power MOSFET is beginning to charge CLOAD. At Time Point 5A, the inrush current causes a 50mV voltage drop across RSENSE and the internal servo loop engages, limiting the inrush current to a fixed level. At Time Point 6, the GATE pin voltage continues to ramp as CLOAD charges until VOUT reaches its final value. The charging current reduces, and the internal servo loop disengages. At the end of the soft-start cycle (Time Point 7), RESET is high and SLOW COMP is armed.
12
VCC
ON
TIMER
GATE VOUT
ILOAD
RESET
4211 F06
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FREQUENCY COMPENSATION AT SOFT-START If the external gate input capacitance (CISS) is greater than 600pF, no external gate capacitor is required at GATE to stabilize the internal current-limiting loop during softstart. Otherwise, connect a gate capacitor between the GATE pin and ground to increase the total gate capacitance to be equal to or above 600pF. The servo loop that controls the external MOSFET during current limiting has a unitygain frequency of about 105kHz and phase margin of 80 for external MOSFET gate input capacitances to 2.5nF. USING AN EXTERNAL GATE CAPACITOR The LTC4211 automatically limits the inrush current in one of two ways: by controlling the GATE pin voltage slew rate
CHECK FOR FILTER LOW (VREF + 50mV) FAST COMPARATOR ARMED CHECK FOR GATE < 0.2V 3 45 5A 6 SLOW COMPARATOR ARMED 78 ON GOES LOW RESET PULLED LOW DUE TO POWER BAD 9 10 VREF 2A 2A GATE 10A POWER GOOD VFB > VREF LOAD CURRENT IS REGULATING AT 50mV/RSENSE VOUT POWER BAD VFB < VREF 200A PLUG-IN CYCLE FIRST TIMING CYCLE SOFT-START CYCLE SECOND TIMING CYCLE
Figure 6. Normal Power-Up Sequence (With Current Limiting in Second Timing Cycle)
4211f
LTC4211
OPERATIO
or by actively limiting the inrush current. The LTC4211 uses GATE voltage slew rate limiting when CLOAD is small and/or the inrush current limit is set high. If GATE voltage slew rate control is preferred with large CLOAD, an external capacitor (CGX) can be used from GATE to ground, as shown in Figure 7. According to Equation 3, adding CGX slows the GATE voltage slew rate at the expense of slower system turn-on and turn-off time. Should this technique be used, values for CGX less than 150nF are recommended.
VIN 5V RSENSE 0.007 M1 Si4410DY CGX* R1 36k VCC SENSE LTC4211** GATE FB R2 15k
4211 F07
*VALUES 150nF SUGGESTED **ADDITIONAL DETAILS OMITTED FOR CLARITY
Figure 7. Using an External Capacitor at GATE for GATE Voltage Slew Rate Control and Large CLOAD
An external gate capacitor may also be useful to decrease or eliminate current spikes through the MOSFET when power is first applied. At power-up, the instantaneous input voltage step attempts to pull the MOSFET gate up through the MOSFET's drain-to-gate capacitance. If the MOSFET's CGS is small, the gate can be pulled up high enough to turn on the MOSFET, thereby allowing a current spike to the output. This event occurs during the time that the LTC4211 is coming out of UVLO and getting its intelligence to hold the GATE pin low. An external capacitor attenuates the voltage to which the GATE is pulled up and eliminates the current spike. The value required is dependent on the MOSFET capacitance specifications. In typical applications, this capacitor is not required. ELECTRONIC CIRCUIT BREAKER The LTC4211 features an electronic circuit breaker function that protects against supply overvoltage, externallygenerated fault conditions and shorts or excessive load current conditions on the supply. If the circuit breaker
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trips, the GATE pin is immediately pulled to ground, the external N-channel MOSFET is quickly turned OFF and FAULT is latched low. The circuit breaker trips whenever the voltage across the sense resistor exceeds two different levels, set by the LTC4211's SLOW COMP and FAST COMP thresholds (see Block Diagram). The SLOW COMP trips the circuit breaker if the voltage across the SENSE resistor (VCC - VSENSE = VCB) is greater than 50mV for 20s. There may be applications where this comparator's response time is not long enough, for example, because of excessive supply voltage noise. To adjust the response time of the SLOW COMP, the MS version of the LTC4211 is chosen and a capacitor is used at the LTC4211's FILTER pin (see section on Adjusting SLOW Comp's Response Time). The FAST COMP trips the circuit breaker to protect against fast load overcurrents if the transient voltage across the sense resistor is greater than 150mV for 300ns. The response time of the LTC4211's FAST COMP is fixed. The timing diagram of Figure 6 illustrates when the LTC4211's electronic circuit breaker is armed. After the first timing cycle, the LTC4211's FAST COMP is armed at Time Point 5. Arming FAST COMP at Time Point 5 ensures that the system is protected against a short-circuit condition during the second timing cycle after CLOAD has been fully charged. At Time Point 7, SLOW COMP is armed when the internal control loop is disengaged. The timing diagrams in Figures 8 and 9 illustrate the operation of the LTC4211 when the load current conditions exceed the thresholds of the FAST COMP (VCB(FAST) > 150mV) and SLOW COMP (VCB(SLOW) > 50mV), respectively. RESETTING THE ELECTRONIC CIRCUIT BREAKER Once the LTC4211's circuit breaker is tripped, FAULT is asserted low and the GATE pin is pulled to ground. The LTC4211 remains latched OFF in this fault state until the external fault is cleared. To clear the internal fault detect circuitry and to restart the LTC4211, its ON pin must be driven low (VON < 1.236V) for at least 150s, after which time FAULT goes high. Toggling the ON pin from low to high (VON > 1.316V) initiates a restart sequence in the LTC4211. The timing diagram in Figure 10 illustrates a
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+
CLOAD
VOUT 5V 5A
VGATE SLEW RATE CONTROL 10A dVGATE = dt CGATE + CGX
(
)
17
LTC4211
OPERATIO
TIMER
GATE VOUT
RESET
VCC - VSENSE
FAULT 300ns TYP
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FAST COMPARATOR ARMED SLOW COMPARATOR ARMED CIRCUIT BREAKER TRIPS SHORT CIRCUIT 12 3 45 6 78 RESET PULLED LOW DUE TO POWER BAD ABC VCC ON GATE VOUT POWER GOOD VFB > VREF FPD POWER BAD VFB < VREF >150mV
4211 F08
Figure 8. Output Short Circuit Causes Fast Comparator to Trip the Circuit Breaker
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LTC4211
OPERATIO
VCC
TIMER
GATE VOUT POWER GOOD VFB > VREF
RESET
VCC - VSENSE VREF FILTER 2A 10A
FAULT
4211 F09
Figure 9. Mild Overcurrent Slow Comparator Trips the Circuit Breaker After Filter Programming Period
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FAST COMPARATOR ARMED SLOW COMPARATOR ARMED CIRCUIT BREAKER TRIPS OVER CURRENT RESET PULLED LOW DUE TO POWER BAD 12 3 45 6 78 A BC ON GATE VOUT FPD POWER BAD VFB < VREF >50mV CIRCUIT BREAKER TRIPS
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19
LTC4211
OPERATIO
TIMER
RESET VSENSE = 50mV VCC - VSENSE REGULATING LOAD CURRENT >50mV
FILTER
FAULT
4211 F10
start-up sequence where the LTC4211 is powered up into a load overcurrent condition. Note that the circuit breaker trips at Time Point B and is reset at Time Point 9A. ADJUSTING SLOW COMP'S RESPONSE TIME The response time of SLOW COMP is adjusted using a capacitor connected from the LTC4211's FILTER pin to ground. If this pin is left unused, SLOW COMP's delay defaults to 20s. During normal operation, the FILTER output pin is held low as an internal 10A pull-down current source is connected to this pin by transistor M4. This pull-down current source is turned off when an overcurrent load condition is detected by SLOW COMP. During an overcurrent condition, the internal 2A pull-up current source is connected to the FILTER pin by transistor M5, thereby charging CFILTER. As the charge on the capacitor accumulates, the voltage across CFILTER
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FAST COMPARATOR ARMED SLOW COMPARATOR ARMED CIRCUIT BREAKER TRIPS CIRCUIT BREAKER RESET 12 3 45 6 78 B 9 9A 1 VCC ON ON ON GATE GATE VOUT VFB < VREF FPD VOUT tFAULTSC VREF 10A 2A tRESET
Figure 10. Power-Up in Overcurrent, Slow Comparator Trips the Circuit Breaker
increases. Once the FILTER pin voltage increases to 1.236V, the electronic circuit breaker trips and the LTC4211's GATE pin is switched quickly to ground by transistor M3. After the circuit breaker is tripped, M5 is turned OFF, M4 is turned ON and the 10A pull-down current then holds the FILTER pin voltage low. The SLOW COMP response time from an overcurrent fault condition to when the circuit breaker trips (GATE OFF) is given by Equation 7:
tSLOWCOMP = 1.236V *
C FILTER + 20s 2A
(7)
For example, if CFILTER = 1000pF, SLOW COMP's response time = 638s. As a design aid, SLOW COMP's delay time (tSLOW COMP) versus CFILTER for standard values of CFILTER from 100pF to 1000pF is illustrated in Table 2.
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LTC4211
OPERATIO
CFILTER 100pF 220pF 330pF 470pF 680pF 820pF 1000pF
Table 2. tSLOWCOMP vs CFILTER
tSLOWCOMP 82s 156s 224s 310s 440s 527s 638s
SENSE RESISTOR CONSIDERATIONS The fault current level at which the LTC4211's internal electronic circuit breaker trips is determined by a sense resistor connected between the LTC4211's VCC and SENSE pins and two separate trip points. The first trip point is set by the SLOW COMP's threshold, VCB(SLOW) = 50mV, and occurs should a load current fault condition exist for more than 20s. The current level at which the electronic circuit breaker trips is given by Equation 8: ITRIP(SLOW) = VCB(SLOW) RSENSE = 50mV RSENSE (8)
The second trip point is set by the FAST COMP's threshold, VCB(FAST) = 150mV, and occurs during fast load current transients that exist for 300ns or longer. The current level at which the circuit breaker trips in this case is given by Equation 9: ITRIP(FAST ) = VCB(FAST ) RSENSE = 150mV RSENSE (9)
As a design aid, the currents at which electronic circuit breaker trips for common values for RSENSE are shown in Table 3.
Table 3. ITRIP(SLOW) and ITRIP(FAST) vs RSENSE
RSENSE 0.005 0.006 0.007 0.008 0.009 0.01 ITRIP(SLOW) 10A 8.3A 7.1A 6.3A 5.6A 5A ITRIP(FAST) 30A 25A 21A 19A 17A 15A
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For proper circuit breaker operation, Kelvin-sense PCB connections between the sense resistor and the LTC4211's VCC and SENSE pins are strongly recommended. The drawing in Figure 11 illustrates the correct way of making connections between the LTC4211 and the sense resistor. PCB layout should be balanced and symmetrical to minimize wiring errors. In addition, the PCB layout for the sense resistor should include good thermal management techniques for optimal sense resistor power dissipation. The power rating of the sense resistor should accommodate steady-state fault current levels so that the component is not damaged before the circuit breaker trips. Table 4 in the Appendix lists sense resistors that can be used with the LTC4211's circuit breaker.
CURRENT FLOW TO LOAD IRC-TT SENSE RESISTOR LR251201R010F OR EQUIVALENT 0.01, 1%, 1W CURRENT FLOW TO LOAD TRACK WIDTH W: 0.03" PER AMP ON 1 OZ COPPER W
4211 F11
TO TO VCC SENSE
Figure 11. Making PCB Connections to the Sense Resistor
CALCULATING CIRCUIT BREAKER TRIP CURRENT For a selected RSENSE value, the nominal load current that trips the circuit breaker is given by Equation 10:
ITRIP(NOM) =
VCB(NOM) RSENSE(NOM)
=
50mV RSENSE(NOM)
(10)
The minimum load current that trips the circuit breaker is given by Equation 11.
ITRIP(MIN) = VCB(MIN) RSENSE(MAX) = 40mV RSENSE(MAX)
(11)
where
R RSENSE(MAX) = RSENSE(NOM) * 1 + TOL 100
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LTC4211
OPERATIO
The maximum load current that trips the circuit breaker is given in Equation 12.
ITRIP(MAX) = VCB(MAX) RSENSE(MIN) = 60mV RSENSE(MIN)
where
R RSENSE(MIN) = RSENSE(NOM) * 1 - TOL 100
For example: If a sense resistor with 7m 5% RTOL is used for current limiting, the nominal trip current ITRIP(NOM) = 7.1A. From Equations 11 and 12, ITRIP(MIN) = 5.4A and ITRIP(MAX) = 9.02A respectively. For proper operation and to avoid the circuit breaker tripping unnecessarily, the minimum trip current (ITRIP(MIN)) must exceed the circuit's maximum operating load current. For reliability purposes, the operation at the maximum trip current (ITRIP(MAX)) must be evaluated carefully. If necessary, two resistors with the same RTOL can be connected in parallel to yield an RSENSE(NOM) value that fits the circuit requirements. POWER MOSFET SELECTION CRITERIA To start the power MOSFET selection process, choose the maximum drain-to-source voltage, VDS(MAX), and the maximum drain current, ID(MAX) of the MOSFET. The VDS(MAX) rating must exceed the maximum input supply voltage (including surges, spikes, ringing, etc.) and the ID(MAX) rating must exceed the maximum short-circuit current in the system during a fault condition. In addition, consider three other key parameters: 1) the required gatesource (VGS) voltage drive, 2) the voltage drop across the drain-to-source on resistance, RDS(ON) and 3) the maximum junction temperature rating of the MOSFET.
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(12) Power MOSFETs are classified into two categories: standard MOSFETs (RDS(ON) specified at VGS = 10V) and logic-level MOSFETs (RDS(ON) specified at VGS = 5V). The absolute maximum rating for VGS is typically 20V for standard MOSFETs. However, the VGS maximum rating for logic-level MOSFETs ranges from 8V to 20V depending upon the manufacturer and the specific part number. The LTC4211's GATE overdrive as a function of VCC is illustrated in the Typical Performance curves. Logiclevel MOSFETs are recommended for low supply voltage applications and standard MOSFETs can be used for applications where supply voltage is greater than 4.75V. Note that in some applications, the gate of the external MOSFET can discharge faster than the output voltage when the circuit breaker is tripped. This causes a negative VGS voltage on the external MOSFET. Usually, the selected external MOSFET should have a VGS(MAX) rating that is higher than the operating input supply voltage to ensure that the external MOSFET is not destroyed by a negative VGS voltage. In addition, the VGS(MAX) rating of the MOSFET must be higher than the gate overdrive voltage. Lower VGS(MAX) rating MOSFETs can be used with the LTC4211 if the GATE overdrive is clamped to a lower voltage. The circuit in Figure 12 illustrates the use of Zener diodes to clamp the LTC4211's GATE overdrive signal if lower voltage MOSFETs are used.
RSENSE VCC D1* RG 200 GATE
4211 F12
Q1 VOUT D2*
*USER SELECTED VOLTAGE CLAMP (A LOW BIAS CURRENT ZENER DIODE IS RECOMMENDED) 1N4688 (5V) 1N4692 (7V): LOGIC-LEVEL MOSFET 1N4695 (9V) 1N4702 (15V): STANDARD-LEVEL MOSFET
Figure 12. Optional Gate Clamp for Lower VGS(MAX) MOSFETs
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LTC4211
OPERATIO
The RDS(ON) of the external pass transistor should be low to make its drain-source voltage (VDS) a small percentage of VCC. At a VCC = 2.5V, VDS + VRSENSE = 0.1V yields 4% error at the output voltage. This restricts the choice of MOSFETs to very low RDS(ON). At higher VCC voltages, the VDS requirement can be relaxed in which case MOSFET package dissipation (PD and TJ) may limit the value of RDS(ON). Table 5 lists some power MOSFETs that can be used with the LTC4211. For reliable circuit operation, the maximum junction temperature (TJ(MAX)) for a power MOSFET should not exceed the manufacturer's recommended value. This includes normal mode operation, start-up, current-limit and autoretry mode in a fault condition. Under normal conditions the junction temperature of a power MOSFET is given by Equation 13: MOSFET Junction Temperature, TJ(MAX) TA(MAX) + JA * PD where PD = (ILOAD)2 * RDS(ON) JA = junction-to-ambient thermal resistance TA(MAX) = maximum ambient temperature If a short circuit happens during start-up, the external MOSFET can experience a big single pulse energy. This is especially true if the applications only employed a small gate capacitor or no gate capacitor at all. Consult the safe operating area (SOA) curve of the selected MOSFET to ensure that the TJ(MAX) is not exceeded during start-up. USING STAGGERED PIN CONNECTORS The LTC4211 can be used on either a printed circuit board or on the backplane side of the connector, and examples for both are shown in Figures 13 and 14. Printed circuit board edge connectors with staggered pins are recommended as the insertion and removal of circuit boards do sequence the pin connections. Supply voltage and ground connections on the printed circuit board should be wired to the edge connector's long pins or blades. Control and status signals (like RESET, FAULT and ON) passing through the card's edge connector should be wired to short length pins or blades. (13)
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PCB CONNECTION SENSE There are a number of ways to use the LTC4211's ON pin to detect whether the printed circuit board has been fully seated in the backplane before the LTC4211 commences a start-up cycle. The first example is shown in the schematic on the front page of this data sheet. In this case, the LTC4211 is mounted on the PCB and a 20k/10k resistive divider is connected to the ON pin. On the edge connector, R1 is wired to a short pin. Until the connectors are fully mated, the ON pin is held low, keeping the LTC4211 in an OFF state. Once the connectors are mated, the resistive divider is connected to VCC, VON > 1.316V and the LTC4211 begins a start-up cycle. In Figure 13, an LTC4211 is illustrated in a basic configuration on a PCB daughter card. The ON pin is connected to VCC on the backplane through a 10k pull-up resistor once the card is seated into the backplane. R2 bleeds off any potential static charge which might exist on the backplane, the connector or during card installation. A third example is shown in Figure 14 where the LTC4211 is mounted on the backplane. In this example, a 2N2222 transistor and a pair of resistors (R4, R5) form the PCB connection sense circuit. With the card out of the chassis, Q2's base is biased to VCC through R5, biasing Q2 ON and driving the LTC4211's ON pin low. The base of Q2 is also wired to a socket on the backplane connector. When a card is firmly seated into the backplane, the base of Q2 is then grounded through a short pin connection on the card. Q2 is biased OFF, the LTC4211's ON pin is pulled-up to VCC and a start-up cycle begins. In the previous three examples, the connection sense was hard wired with no processor (low) interrupt capability. As illustrated in Figure 15, the addition of an inexpensive logic-level discrete MOSFET and a couple of resistors offers processor interrupt control to the connection sense. R4 keeps the gate of M2 at VCC until the card is firmly mated to the backplane. A logic low for the ON/OFF signal turns M2 OFF, allows the ON pin to pull high and turns on the LTC4211.
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23
LTC4211
APPLICATIO S I FOR ATIO
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) 5V VCC LONG VIN 5V
Z1* SHORT SHORT R2 10k LONG
RESET
Z1 = 1SMA10A OR SMAJ10A * OPTIONAL
Figure 13. Hot Swap Controller On Daughter Board (Staggered Pin Connections)
VIN 5V Z1* RX 10 CX 0.1F
R5 10k
R4 10k 2 Q2 4
PCB CONNECTION SENSE
VCC ON
GND TIMER 3
Z1 = 1SMA10A OR SMAJ10A * OPTIONAL
Figure 14. Hot Swap Controller on Backplane (Staggered Pin Connections)
A more elaborate connection sense scheme is shown in Figure 16. The bases of Q1 and Q2 are wired to short pins located on opposite ends of the edge connector because the installation/removal of printed circuit cards generally requires rocking the card back and forth. When VCC makes connection, the bases of transistors Q1 and Q2 are pulled high, biasing them ON. When either one of them is ON, the LTC4211's ON pin is held low, keeping the LTC4211 OFF. When both the short base connector pins
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RSENSE 0.007 R1 10 C1 0.1F Q1 Si4410DY VOUT 5V 5A R6 10k 1 2 RESET ON LTC4211 4 GATE GND TIMER 3 CTIMER 10nF FB VCC SENSE 8 7 6 5 R4 36k R5 15k
4211 F13
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COUT
RSENSE 0.007
Q1 Si4410DY
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) LONG
+
LONG 8 7 SENSE 6 1 5 R3 10k SHORT SHORT SHORT R7 15k COUT R1 36k
VOUT 5V 5A
GATE LTC4211 RESET FB
RESET R2 100k
4211 F14
CTIMER 10nF
of Q1 and Q2 finally mate to the backplane, their bases are grounded, biasing the transistors OFF. The ON pin voltage is then pulled high by R3 enabling the LTC4211 and a power-up cycle begins. A software-initiated power-down cycle can be started by momentarily driving transistor M1 with a logic high signal. This in turn will drive the LTC4211's ON pin low. If the ON pin is held low for more than 8s, the LTC4211's GATE pin is switched to ground.
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LTC4211
APPLICATIO S I FOR ATIO
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) VCC 5V LONG
Z1*
SHORT SHORT
R1 10k
ON/OFF
GND
LONG
PCB CONNECTION SENSE
ZZ1 = 1SMA10A OR SMAJ10A M2: 2N7002LT1 * OPTIONAL
Figure 15. Connection Sense with ON/OFF Control
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE)
LAST BLADE OR PIN ON CONNECTOR SHORT PCB CONNECTION SENSE RSENSE 0.007 M2 Si4410DY
VCC
LONG RX 10 CX 0.1F
Z1*
R8 10k SHORT LONG SHORT
ON/RESET GND
LAST BLADE OR PIN ON CONNECTOR
Figure 16. Connection Sense for Rocking the Daughter Board Back and Forth
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RSENSE 0.007 RX 10 CX 100nF M1 Si4410DY
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+
CLOAD 8 VCC 7 SENSE 6 GATE FB 2 ON LTC4211 RESET TIMER 3 CTIMER 10nF
4211 F15
VOUT 5V 5A
5
R5 36k R6 15k
R7 10k P LOGIC RESET
R4 10k
1
M2
R2 10k
GND 4
+
CLOAD R1 10k R2 10k R3 10k 8 VCC 2 Q1 Q2 M1 TIMER 3 CTIMER 10nF
4211 F16
VOUT 5V 5A
7 SENSE
6 GATE FB 5
R4 36k R5 15k
R7 10k P LOGIC RESET
ON
LTC4211 RESET GND 4 1
Z1 = 1SMA10A OR SMAJ10A M1: 2N7002LT1 Q1, Q2: MMBT3904LT1 * OPTIONAL
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LTC4211
APPLICATIO S I FOR ATIO
12V Hot Swap Application
Figure 17 shows a 12V, 3A hot swap application circuit. The resistor divider R1/R2 programs the undervoltage lockout externally and allows the system to start up after VCC increases above 9.46V. The resistor divider R3/R4 monitors VOUT and signals the RESET pin when VOUT goes above 10.54V. Transient voltage suppressor Z1 and snubber network (CX, RX) are highly recommended to protect the 12V applications system from ringing and voltage spikes. RG is recommended for VCC > 10V and it can minimize high frequency parasitic oscillations in the power MOSFET. AUTORETRY AFTER A FAULT To configure the LTC4211 to automatically retry after a fault condition, the FAULT and ON pins can be connected to a pull-up resistor (RAUTO) to the supply, as shown in
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) VCC 12V LONG RX 10 CX 100nF
SHORT
GND
PCB CONNECTION SENSE LONG Z1 = 1SMA12A OR SMAJ12A ** HIGHLY RECOMMENDED
Figure 17. 12V Hot Swap Application
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) VCC 5V LONG RPULL-UP 10k RAUTO (SEE NOTE) R3 10 C1 0.1F 1 2 3 CFILTER 100pF CTIMER 10nF 4 5 RSENSE 0.007 Q1 Si4410DY
RESET
SHORT
GND
CAUTO 1F LONG
Figure 18. LTC4211MS Autoretry Application
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Figure 18. In this case, the autoretry circuitry will attempt to restart the LTC4211 with a 50% duty cycle, as shown in the timing diagram of Figure 19. To prevent overheating the external MOSFET and other components during the autoretry sequence, adding a capacitor (CAUTO) to the circuit introduces an RC time constant (tOFF) that adjusts the autoretry duty cycle. Equation 14 gives the autoretry duty cycle, modified by this external time constant:
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Autoretry Duty Cycle
tTIMER * 100% (14) tOFF + 2 * tTIMER
where tTIMER = LTC4211 system timing(see TIMER function) and tOFF is a time needed to charge capacitor CAUTO from 0V to the ON pin threshold (1.316V). For the values shown, the external RC time constant is set at 1 second, the tTIMER delay equals 6.2ms and the autoretry duty cycle drops from 50% to 2.5%.
RSENSE 0.012
M1 Si4410DY
+
8 VCC 7 SENSE 6 RG 100 5 CLOAD R3 93.1k R4 12.4k RESET TIMER 3 CTIMER 8.2nF GND 4 1 R5 10k P LOGIC RESET
VOUT 12V 3A
Z1**
GATE FB
R1 61.9k R2 10k
2
ON
LTC4211
GND
4211 F17
VOUT 5V 5A
Z1* R1 36k
RESET ON FILTER TIMER GND
FAULT VCC SENSE GATE FB
10 9 8 7 6 R2 15k
+
CLOAD
LTC4211MS
Z1 = 1SMA10A OR SMAJ10A * OPTIONAL
4211 F18
NOTE: Q1 MOUNTED TO 300mm2 COPPER AREA RAUTO = 1M YIELDS 2.5% DUTY CYCLE AND Q1 TCASE = 50C RAUTO = 3.2M YIELDS 0.8% DUTY CYCLE AND Q1 TCASE = 37C
LTC4211
APPLICATIO S I FOR ATIO
1 2
VCC
ON/FAULT
TIMER
GATE VOUT RESET
VFB < VREF
VCC - VSENSE
FILTER tOFF DUTY CYCLE = t1 t2
t2 (t << t1, t2 AND tOFF) tOFF + t1 + t2 FILTER
To increase the RC delay, the user may either increase CAUTO or RAUTO. However, increasing CAUTO > 2F will actually limit the RC delay due to the reset sink-current capability of the FAULT pin. Therefore, in order to increase the RC delay, it is more effective to either increase RAUTO or to put a bleed resistor in parallel with CAUTO to GND. As an example, increasing RAUTO from 1M to 3.2M decreases duty cycle to 0.8%. HOT SWAPPING TWO SUPPLIES Using two external pass transistors, the LTC4211 can switch two supply voltages. In some cases, it is necessary to bring up the dominant supply first during power-up but ramp them down together during the power-down phase. The circuit in Figure 20 shows how to program two different delays for the pass transistors. The 5V supply is powered up first. R1 and C3 are used to set the rise and fall times on the 5V supply. Next, the 3.3V supply ramps up
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FAST COMPARATOR ARMED SLOW COMPARATOR ARMED 3 45 6 78 B ON/FAULT tRESET GATE FPD VOUT VSENSE = 50mV REGULATED LOAD CURRENT VREF 2A tFILTER tOFF
4211 F19
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>50mV
10A
Figure 19. Autoretry Timing
with 20ms delay set by R6 and C2. On the falling edge, both supplies ramp down together because D1 and D2 bypass R1 and R6. OVERVOLTAGE TRANSIENT PROTECTION Good engineering practice calls for bypassing the supply rail of any analog circuit. Bypass capacitors are often placed at the supply connection of every active device, in addition to one or more large value bulk bypass capacitors per supply rail. If power is connected abruptly, the large bypass capacitors slow the rate of rise of the supply voltage and heavily damp any parasitic resonance of lead or PC track inductance working against the supply bypass capacitors. The opposite is true for LTC4211 Hot Swap circuits mounted on plug-in cards. In most cases, there is no supply bypass capacitor present on the powered supply
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LTC4211
APPLICATIO S I FOR ATIO
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (MALE) (FEMALE) 3.3V LONG Z1* LONG Z2* SHORT SHORT R10 10k R11 10k C1 10nF 16V R9 10 C5 0.1F 10k LTC4211 1 2 3 4 RESET ON TIMER GND VCC SENSE GATE FB 8 7 6 5 C3 0.047F 25V C2 0.022F 25V D2 1N4148 R3 10 5% R1 10k 5% R8 10 C4 0.1F
CURRENT LIMIT: 3.3A
5V
RESET ON
GND
LONG
Z1, Z2: 1SMA10A OR SMAJ10A * OPTIONAL
Figure 20. Switching 5V and 3.3V
voltage side of the MOSFET switch. An abrupt connection, produced by inserting the board into a backplane connector, resulting in a fast rising edge applied on the supply line of the LTC4211. Since there is no bulk capacitance to damp the parasitic track inductance, supply voltage transients excite parasitic resonant circuits formed by the power MOSFET capacitance and the combined parasitic inductance from the wiring harness, the backplane and the circuit board traces. In these applications, there are two methods that should be applied together for eliminating these supply voltage transients: using transient voltage suppressor to clip the transient to a safe level and snubber networks. Snubber networks are series RC networks whose time constants are experimentally determined based on the board's parasitic resonance circuits. As a starting point, the capacitors in these networks are chosen to be 10x to 100x the power MOSFET's COSS under bias. The series resistor is a value determined experimentally and ranges from 1 to 50, depending on the parasitic resonance circuit. For applications with supply voltages of 12V or higher the ringing and overshoot during hot-swapping or when the output is short-circuited can easily exceed the absolute maximum specification of the LTC4211. To reduce the danger, transient voltage suppressors and snubber networks are highly recommended. For applications with lower supply
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5V OUT 3.3V OUT Q2 1/2 Si4936DY
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R2 0.015 5% Q1 1/2 Si4936DY R7 10 5% D3** CLOAD
VOUT1 3.3V 2A
+
D1 1N4148 R6 1M 5% CLOAD
VOUT2 5V 2A
R4 2.74k 1% TRIP POINT: 4.06V R5 1.2k 1%
4211 F20
**D3 IS OPTIONAL AND HELPS DISCHARGE VOUT1 IF VOUT2 SHORTS
voltage such as 5V, usually a snubber is adequate to reduce the supply ringing. Although, the need of a transient voltage suppressor arises for inductive and high current application. Note that in all LTC4211 5V applications schematics, transient suppressor and snubber networks have been added for protection. The transient suppressor is optional and a simple short-circuit test can be performed to determine the need of it. These protection networks should be mounted very close to the LTC4211's supply input rail using short lead lengths to minimize lead inductance. This is shown schematically in Figure 21, and a recommended layout of the transient protection devices around the LTC4211 is shown in Figure 22.
VIN 5V RSENSE 0.007 Q1 Si4410DY VOUT 5V 5A R1 36k
8 VCC RX 10 Z1* CX 0.1F GND 4
7 SENSE
6 GATE 5 FB
+
COUT
LTC4211 1 RESET 2 ON CTIMER RESET ON
R2 15k
TIMER 3
INPUT GND
Z1 = 1SMA10A OR SMAJ10A * OPTIONAL
OUTPUT GND
4211 F21
Figure 21. Placing Transient Protection Devices Close to the LTC4211's Input Rail
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LTC4211
APPLICATIO S I FOR ATIO
CURRENT FLOW TO LOAD
SENSE RESISTOR (RSENSE)
W D S
CX SNUBBER NETWORK RX
Z1* TRANSIENT VOLTAGE SUPPRESSOR
SENSE
GATE
VCC
FB
LTC4211**
RESET TIMER GND
1 CTIMER 10nF CURRENT FLOW FROM LOAD
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ON
Figure 22. Recommended Layout for LTC4211 Protection Devices, RSENSE, Power MOSFET and Feedback Network
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CURRENT FLOW TO LOAD POWER MOSFET (SO-8) D G D S W D S RGX* CGX* VIA TO GND PLANE R4 15k R3 36k NOTES: DRAWING IS NOT TO SCALE! *OPTIONAL COMPONENTS **ADDITIONAL DETAILS OMITTED FOR CLARITY
4211 F28
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LTC4211
APPLICATIO S I FOR ATIO
SUPPLY OVERVOLTAGE DETECTION/ PROTECTION USING FILTER PIN
In addition to using external protection devices around the LTC4211 for large scale transient protection, low power Zener diodes can be used with the LTC4211's FILTER pin to act as a supply overvoltage detection/protection circuit on either the high side (input) or low side (output) of the external pass transistor. Recall that internal control circuitry keeps the LTC4211 GATE voltage from ramping up if VFILTER > 1.156V, or when an external fault condition (VFILTER > 1.236V) causes FAULT to be asserted low. High Side (Input) Overvoltage Protection As shown in Figure 23, a low power Zener diode can be used to sense an overvoltage condition on the input (high) side of the main 5V supply. In this example, a low bias current 1N4691 Zener diode is chosen to protect the system. Here, the Zener diode is connected from VCC to the LTC4211's FILTER pin (Pin 3 MS). If the input voltage to the system is greater than 6.8V during start-up, the voltage on the FILTER pin is pulled higher than its 1.156V
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) LONG 5V R4 10k FAULT SHORT R5 10k Z2 6.2V LTC4211 1 2 R6 10k R7 10k CFILTER 47pF GND LONG Z1 = 1SMA10A OR SMAJ10A Z2 = 1N4691 * OPTIONAL 3 4 RESET FAULT ON VCC 10 9 8 7 6
4211 F23
Z1*
RESET ON/OFF
SHORT SHORT
Figure 23. LTC4211MS High Side Overvoltage Protection Implementation
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threshold. As a result, the GATE pin is not allowed to ramp and the second timing cycle will not commence until the supply overvoltage condition is removed. Should the supply overvoltage condition occur during normal operation, internal control logic would trip the electronic circuit breaker and the GATE would be pulled to ground, shutting OFF the external pass transistor. If a lower supply overvoltage threshold is desired, use a Zener diode with a smaller breakdown voltage. A timing diagram for illustrating LTC4211 operation under a high side overvoltage condition is shown in Figure 24. The start-up sequence in this case (between Time Points 1 and 2) is identical to any other start-up sequence under normal operating conditions. At Time Point 2A, the input supply voltage causes the Zener diode to conduct thereby forcing VFILTER > 1.156V. At Time Point 3, FAULT is asserted low and the TIMER pin voltage ramps down. At Time Point 4, the LTC4211 checks if VFILTER < 1.156V.
R3 10 C1 0.1F RSENSE 0.007 Q1 Si4410DY R1 36k R2 15k VOUT 5V 5A
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CLOAD
FILTER SENSE GATE FB
TIMER CTIMER 5 GND 10nF
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LTC4211
APPLICATIO S I FOR ATIO
OVERVOLTAGE 12 2A 34
IF ANY FAULT HAPPENS AFTER THIS POINT, THE CIRCUIT BREAKER TRIPS AND FAULT LATCHES LOW IF OVERVOLTAGE GOES AWAY, SECOND CYCLE CONTINUES
VCC
ON
TIMER
GATE VOUT
RESET
>VREF - 80mV FILTER
FAULT
FAULT IS PULLED LOW (BUT NOT LATCHED) DUE TO A START-UP OVERVOLTAGE PROBLEM
Figure 24. High Side Overvoltage Protection
FAULT is asserted low (but not latched) to indicate a startup failure. Only if the input overvoltage condition is removed before Time Point 5 does the start-up sequence resume at the second timing cycle. At this point in time, the GATE pin voltage is allowed to ramp up, FAULT is pulled to logic high and the circuit breaker is armed. Should, at any time after Time Point 5, a supply overvoltage condition develop (VFILTER > 1.236V), the electronic circuit breaker will trip, the GATE will be pulled low to turn off the external MOSFET and FAULT will be asserted low and latched. This sequence is shown in detail at Time Point B.
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SLOW COMPARATOR ARMED OVERVOLTAGE CIRCUIT BREAKER TRIPS, GATE PULLS DOWN AND FAULT LATCHES LOW 78 ABC 5 6 GATE VOUT POWER GOOD VFB > VREF FPD POWER BAD VFB < VREF >VREF
4211 F24
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FAULT LATCHED LOW
Low Side (Output) Overvoltage Protection A Zener diode can be used in a similar fashion to detect/ protect the system against a supply overvoltage condition on the load (or low) side of the pass transistor. In this case, the Zener diode is connected from the load to the LTC4211's FILTER pin, as shown in Figure 25. An additional diode, D1, prevents the FILTER pin from pulling low during an output short-circuit. Figure 26 illustrates the timing diagram for a low side output overvoltage condition. In this example, the LTC4211 can only sense the overvoltage supply condition after Time Point 5 and the GATE pin has
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31
LTC4211
APPLICATIO S I FOR ATIO
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) LONG 5V R3 10k SHORT Z1*
FAULT
RESET ON/OFF
SHORT SHORT R6 10k
R5 10k
R7 10k CFILTER 47pF
GND
LONG Z1 = 1SMA10A OR SMAJ10A Z2 = 1N4691 * OPTIONAL
Figure 25. LTC4211MS Low Side Overvoltage Protection Implementation
OVERVOLTAGE SENSED BY FILTER PIN CIRCUIT BREAKER TRIPS 12 345 6A 6B
VCC
ON
TIMER
GATE VOUT
RESET
FILTER
FAULT
Figure 26. Low Side Overvoltage Protection
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D1 IN4148 R4 10 C1 0.1F Z2 6.2V LTC4211 1 2 3 4 RESET FAULT ON VCC 10 9 8 7 6
4211 F25
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RSENSE 0.007
Q1 Si4410DY R1 36k R2 15k
VOUT 5V 5A
+
CLOAD
FILTER SENSE GATE FB
TIMER CTIMER 5 GND 10nF
FPD
VREF
4211 F26
LTC4211
APPLICATIO S I FOR ATIO
ramped up to its nominal operating value. After Time Point 5, a supply voltage fault occurs at the load and the Zener diode begins to conduct, causing VFILTER to increase. At Time Point 6A, VFILTER is greater than 1.236V, the circuit breaker is tripped, the GATE pin voltage is pulled to ground and FAULT is asserted low and latched. In either case, the LTC4211 can be configured to automatically initiate a start-up sequence. Please refer to the section on AutoRetry After a Fault for additional information. PCB Layout Considerations For proper operation of the LTC4211's circuit breaker function, a 4-wire Kelvin connection to the sense resistors is highly recommended. A recommended PCB layout for the sense resistor, the power MOSFET and the GATE drive components around the LTC4211 is illustrated in Figure 22. In Hot Swap applications where load currents
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can reach 10A or more, narrow PCB tracks exhibit more resistance than wider tracks and operate at more elevated temperatures. Since the sheet resistance of 1 ounce copper foil is approximately 0.54m/square, track resistances add up quickly in high current applications. Thus, to keep PCB track resistance and temperature rise to a minimum, PCB track width must be appropriately sized. Consult Appendix A of LTC Application Note 69 for details on sizing and calculating trace resistances as a function of copper thickness. In the majority of applications, it will be necessary to use plated-through vias to make circuit connections from component layers to power and ground layers internal to the PC board. For 1 ounce copper foil plating, a good starting point is 1A of DC current per via, making sure the via is properly dimensioned so that solder completely fills any void. For other plating thicknesses, check with your PCB fabrication facility.
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LTC4211
APPE DIX
Table 4 lists some current sense resistors that can be used with the circuit breaker. Table 5 lists some power MOSFETs that are available. Table 6 lists the web sites of several
Table 4. Sense Resistor Selection Guide
CURRENT LIMIT VALUE 1A 2A 2.5A 3.3A 5A 10A PART NUMBER LR120601R050 LR120601R025 LR120601R020 WSL2512R015F LR251201R010F WSR2R005F DESCRIPTION 0.05 0.5W 1% Resistor 0.025 0.5W 1% Resistor 0.02 0.5W 1% Resistor 0.015 1W 1% Resistor 0.01 1.5W 1% Resistor 0.005 2W 1% Resistor MANUFACTURER IRC-TT IRC-TT IRC-TT Vishay-Dale IRC-TT Vishay-Dale
Table 5. N-Channel Selection Guide
CURRENT LEVEL (A) 0 to 2 2 to 5 5 to 10 10 to 20 PART NUMBER MMDF3N02HD MMSF5N02HD MTB50N06V MTB75N05HD DESCRIPTION Dual N-Channel SO-8 RDS(ON) = 0.1, CISS = 455pF Single N-Channel SO-8 RDS(ON) = 0.025, CISS = 1130pF Single N-Channel DD Pak RDS(ON) = 0.028, CISS = 1570pF Single N-Channel DD Pak RDS(ON) = 0.0095, CISS = 2600pF MANUFACTURER ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor
Table 6. Manufacturers' Web Sites
MANUFACTURER TEMIC Semiconductor International Rectifier ON Semiconductor Harris Semiconductor IRC-TT Vishay-Dale Vishay-Siliconix Diodes, Inc. WEB SITE www.temic.com www.irf.com www.onsemi.com www.semi.harris.com www.irctt.com www.vishay.com www.vishay.com www.diodes.com
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manufacturers. Since this information is subject to change, please verify the part numbers with the manufacturer.
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LTC4211
PACKAGE DESCRIPTIO
0.889 0.127 (.035 .005)
5.23 (.206) MIN
3.2 - 3.45 (.126 - .136) GAUGE PLANE
0.42 0.04 (.0165 .0015) TYP
0.65 (.0256) BSC 0.18 (.077)
RECOMMENDED SOLDER PAD LAYOUT
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.889 0.127 (.035 .005)
5.23 (.206) MIN
3.2 - 3.45 (.126 - .136) GAUGE PLANE
0.50 0.305 0.038 (.0197) (.0120 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 0.18 (.007)
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP
0.014 - 0.019 (0.355 - 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.016 - 0.050 (0.406 - 1.270)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
MS8 Package 8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
3.00 0.102 (.118 .004) (NOTE 3) 0.52 (.206) REF 8 7 65 0.254 (.010) DETAIL "A" 0 - 6 TYP 4.88 0.1 (.192 .004) 3.00 0.102 (.118 .004) NOTE 4 0.53 0.015 (.021 .006) DETAIL "A" 1 1.10 (.043) MAX 23 4 0.86 (.034) REF SEATING PLANE 0.22 - 0.38 (.009 - .015) 0.65 (.0256) BCS 0.13 0.05 (.005 .002)
MSOP (MS8) 0102
MS Package 10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
3.00 0.102 (.118 .004) (NOTE 3) 10 9 8 7 6 0.497 0.076 (.0196 .003) REF
0.254 (.010)
DETAIL "A" 0 - 6 TYP
4.88 0.10 (.192 .004)
3.00 0.102 (.118 .004) NOTE 4
12345 0.53 0.01 (.021 .006) DETAIL "A" 1.10 (.043) MAX 0.86 (.034) REF
SEATING PLANE
0.17 - 0.27 (.007 - .011)
0.50 (.0197) TYP
0.13 0.05 (.005 .002)
MSOP (MS) 1001
S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 0.053 - 0.069 (1.346 - 1.752) 8 0.004 - 0.010 (0.101 - 0.254) 0.228 - 0.244 (5.791 - 6.197) 0.150 - 0.157** (3.810 - 3.988) 7 6 5
0.050 (1.270) BSC
SO8 1298
1
2
3
4
4211f
35
LTC4211
TYPICAL APPLICATIO S
LOW COST OVERVOLTAGE PROTECTION There is an alternative method to implementing the overvoltage protection using a resistor divider at the FILTER pin (see Figures 27 and 28). In this implementation, the SLOW COMP is NULL in Normal Mode. Only the FAST
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (FEMALE) (MALE) LONG 5V R4 10k FAULT SHORT R5 10k R8 4.3k LTC4211 1 2 R6 10k R7 10k R9 750 GND LONG Z1 = 1SMA10A OR SMAJ10A * OPTIONAL 3 4 RESET FAULT ON VCC 10 9 8 7 6
4211 F29
RESET ON/OFF
Figure 27. LTC4211MS High Side Overvoltage Protection Implementation (In Normal Mode, SLOW COMP is Disabled, In Soft-Start Cycle, ISOFTSTART is Still 50mV/RSENSE)
BACKPLANE PCB EDGE CONNECTOR CONNECTOR (MALE) (FEMALE) LONG 5V R3 10k SHORT R4 10k LTC4211 1 2 R5 10k R6 10k 3 4 RESET FAULT ON VCC 10 9 8 7 6
4211 F30
FAULT
RESET ON/OFF
SHORT SHORT
GND
LONG
Figure 28. LTC4211MS Low Side Overvoltage Protection Implementation (In Normal Mode, SLOW COMP is Disabled, In Soft-Start Cycle, ISOFTSTART is Still 50mV/RSENSE)
RELATED PARTS
PART NUMBER LTC1421 LTC1422 LT1640AL/LT1640AH LT1641-1/LT1641-2 LTC1642 LTC1644 LTC1647 LTC4230 DESCRIPTION Two Channels, Hot Swap Controller Single Channel, Hot Swap Controller Negative Voltage Hot Swap Controller Positive Voltage Hot Swap Controller Single Channel, Hot Swap Controller PCI Hot Swap Controller Dual Channel, Hot Swap Controller Triple Hot Swap Controller with Multifunction Current Control COMMENTS 24-Pin, Operates from 3V to 12V and Supports - 12V 8-Pin, Operates from 2.7V to 12V 8-Pin, Operates from -10V to -80V 8-Pin, Operates from 9V to 80V, Latch-Off/Auto Retry 16-Pin, Overvoltage Protection to 33V 16-Pin, 3.3V, 5V and 12V, 1V Precharge, PCI Reset Logic 8-Pin, 16-Pin, Operates from 2.7V to 16.5V Operates from 1.7V to 16.5V
4211f LT/TP 0702 2K * PRINTED IN USA
36
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
U
COMP circuit breaker is available and the current limit level is 150mV/RSENSE. During the soft-cycle, the inrush current servo loop is at 50mV/RSENSE. So, the heavy load should only turn on at/after the end of second cycle where the RESET pin goes high.
Z1*
R3 10 C1 0.1F
RSENSE 0.007
Q1 Si4410DY R1 36k R2 15k
VOUT 5V 5A
SHORT SHORT
+
CLOAD
FILTER SENSE TIMER GATE FB
CTIMER 5 GND 10nF
Z1*
R7 10 C1 0.1F
RSENSE 0.007
Q1 Si4410DY R1 3.6k
VOUT 5V 5A
+
CLOAD
R2 750
FILTER SENSE GATE FB
TIMER CTIMER 5 GND 10nF
R8 750
Z1 = 1SMA10A OR SMAJ10A * OPTIONAL
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2001

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