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FDC6020C November 2003 FDC6020C Complementary PowerTrench MOSFET General Description These N & P-Channel MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. Features * * * * * Q1 -4.2 A, -20V. RDS(ON) = 55 m @ VGS = - 4.5 V RDS(ON) = 82 m @ VGS = - 2.5 V Q2 5.9 A, 20V. RDS(ON) = 27 m @ VGS = 4.5 V RDS(ON) = 39 m @ VGS = 2.5 V Low gate charge High performance trench technology for extremely low RDS(ON). FLMP SSOT-6 package: Enhanced thermal performance in industry-standard package size Applications * * * DC/DC converter Load switch Motor Driving Bottom Drain Contact Q2 (N) 4 5 6 Q1 (P) Bottom Drain Contact 3 2 1 Absolute Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage TA = 25C unless otherwise noted Parameter Q1 -20 (Note 1a) Q2 20 12 5.9 20 1.6 1.8 1.2 -55 to +150 Units V V A W - Continuous - Pulsed Power Dissipation for Dual Operation Power Dissipation for single Operation Drain Current 12 -4.2 -20 (Note 1a) (Note 1a) (Note 1b) TJ, TSTG Operating and Storage Junction Temperature Range C Thermal Characteristics RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1a) 68 1 C/W Package Marking and Ordering Information Device Marking .020 2003 Fairchild Semiconductor Corporation Device FDC6020C Reel Size 7'' Tape width 8mm Quantity 3000 units FDC6020C Rev B(W) FDC6020C Electrical Characteristics Symbol BVDSS BVDSS TJ IDSS IGSS TA = 25C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage (Note 2) Test Conditions VGS = 0 V, ID = -250 A ID = 250 A VGS = 0 V, ID = -250 A, Referenced to 25C ID = 250 A, Referenced to 25C VDS = -16 V, VGS = 0 V VGS = 0 V VDS = 16 V, VGS = +12 V, VDS = 0 V VDS = 0 V VGS = +12 V, VDS = VGS, ID = -250 A ID = 250 A VDS = VGS, ID = -250 A, Referenced to 25C ID = 250 A, Referenced to 25C VGS = -4.5 V, ID = -4.2 A ID = -3.4 A VGS = -2.5 V, VGS = -4.5 V, ID = -4.2 A,TJ =125C VGS = 4.5 V, ID = 5.9 A ID = 4.9 A VGS = 2.5 V, VGS = 4.5 V, ID = 5.9 A, TJ = 125C VDS = -5 V, ID = - 4.2 A ID = 5.9 A VDS = 5 V, Type Min Typ Max Units Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 -20 20 -14 12 -1 1 +100 +100 -0.6 0.6 -1.0 1.0 3 -3 45 65 58 23 33 31 13 23 753 677 163 171 83 91 8 2.2 13 11 8 16 26 18 14 7 7 6 1.6 1.5 1.9 1.8 23 20 16 29 42 32 52 14 10 8 ns ns ns ns nC nC nC -1.5 1.5 V mV/C A nA Off Characteristics On Characteristics VGS(th) VGS(th) TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance V mV/C Q2 55 82 73 27 39 39 m gFS Forward Transconductance Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 S Dynamic Characteristics Ciss Coss Crss RG Q1: VDS = -10 V, VGS = 0 V, f = 1.0 MHz Output Capacitance Q2: Reverse Transfer Capacitance VDS = 10 V, VGS = 0 V, f = 1.0 MHz Input Capacitance Gate Resistance VGS = 15mV, f = 1.0 MHz pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Q1: VDS = -10 V,ID = -4.2 A,VGS= -4.5V Q2: VDS = 10 V, ID = 5.9 A,VGS = 4.5 V Q1: VDD = -10 V, VGS = -4.5 V, Q2: VDD = 10 V, VGS = 4.5V, ID = -1 A, RGEN = 6 ID = 1 A, RGEN = 6 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 FDC6020C RevB (W) FDC6020C Electrical Characteristics (continued) Symbol Parameter TA = 25C unless otherwise noted Test Conditions Type Min Typ Max Units Drain-Source Diode Characteristics and Maximum Ratings IS VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Diode Reverse Recovery Time Diode Reverse Recovery Charge VGS = 0 V, IS = -1.3 A (Note 2) VGS = 0 V, IS = 1.3 A (Note 2) IF = - 4.2A,dIF/dt = 100 A/s IF = 5.9A, dIF/dt = 100 A/s IF = - 4.2A,dIF/dt = 100 A/s IF = 5.9A, dIF/dt = 100 A/s Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 -0.8 0.7 17 15 6 4 -1.3 1.3 -1.2 1.2 A V nS nC Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a) 68C/W when mounted on a 1in2 pad of 2 oz copper (Single Operation). b) 102C/W when mounted on a minimum pad of 2 oz copper (Single Operation). Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% FDC6020C RevB (W) FDC6020C Typical Characteristics : Q1 20 2.8 -3.5V -3.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = -4.5V 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0 1 2 3 4 -ID, DRAIN CURRENT (A) 16 VGS= -2.0V -2.5V 12 -2.5V 8 -2.0V 4 -3.0V -3.5V -4.5V 0 -VDS, DRAIN TO SOURCE VOLTAGE (V) 0 4 8 12 16 20 -ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.16 RDS(ON), ON-RESISTANCE (OHM) ID = -2.1A 1.3 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = -4.2A VGS = -4.5V 1.2 0.14 0.12 0.1 TA = 125oC 1.1 1 0.08 TA = 25oC 0.9 0.06 0.04 0.8 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 1.5 2 2.5 3 3.5 4 4.5 5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 20 TA = -55 C o Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VGS = 0V 25 C o -IS, REVERSE DRAIN CURRENT (A) VDS = -5V -ID, DRAIN CURRENT (A) 16 10 1 TA = 125oC 12 125oC 0.1 25oC 8 0.01 -55oC 4 0.001 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V) 0 0.5 1 1.5 2 2.5 3 3.5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6020C RevB (W) FDC6020C Typical Characteristics : Q1 5 -VGS, GATE-SOURCE VOLTAGE (V) 1100 ID = -4.2A 4 VDS = -5V -15V -10V 1000 900 CAPACITANCE (pF) 800 700 600 500 400 300 200 100 f = 1 MHz VGS = 0 V CISS 3 2 COSS 1 CRSS 0 4 8 12 16 20 0 0 1 2 3 4 5 6 7 8 9 Qg, GATE CHARGE (nC) 0 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) Figure 8. Capacitance Characteristics. 10 -ID, DRAIN CURRENT (A) 10 RDS(ON) LIMIT 10s 100s 1ms 10ms 100ms 1s DC 8 SINGLE PULSE RJA = 102C/W TA = 25C 6 1 4 0.1 VGS = -4.5V SINGLE PULSE RJA = 102oC/W TA = 25 C o 2 0.01 0.1 1 10 100 -VDS, DRAIN-SOURCE VOLTAGE (V) 0 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. FDC6020C RevB (W) FDC6020C Typical Characteristics : Q2 20 2.8 VGS = 4.5V 3.5V 16 ID, DRAIN CURRENT (A) 3.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2.5V 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0 4 8 12 ID, DRAIN CURRENT (A) 16 VGS = 2.0V 12 2.0V 8 2.5V 3.0V 3.5V 4.5V 4 0 0 0.5 1 1.5 2 VDS, DRAIN-SOURCE VOLTAGE (V) 20 Figure 11. On-Region Characteristics. Figure 12. On-Resistance Variation with Drain Current and Gate Voltage. 0.08 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 5.9A VGS = 4.5V ID = 2.9A 0.07 0.06 0.05 1.4 1.2 1 TA = 125oC 0.04 0.03 0.8 TA = 25oC 0.6 -50 -25 0 25 50 75 100 o 0.02 125 150 1.5 2 2.5 3 3.5 4 4.5 5 TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V) Figure 13. On-Resistance Variation with Temperature. 20 VDS = 5V IS, REVERSE DRAIN CURRENT (A) Figure 14. On-Resistance Variation with Gate-to-Source Voltage. 100 VGS = 0V TA =-55 C 125oC o ID, DRAIN CURRENT (A) 16 25 C o 10 TA = 125oC 1 0.1 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) 12 25oC 8 -55oC 4 0 1 1.5 2 2.5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6020C RevB (W) FDC6020C Typical Characteristics : Q2 5 VGS, GATE-SOURCE VOLTAGE (V) 1000 ID = 5.9A VDS = 5V 10V CAPACITANCE (pF) 15V 900 800 700 600 500 400 300 200 100 CRSS 0 4 8 12 16 20 COSS CISS f = 1MHz VGS = 0 V 4 3 2 1 0 0 1 2 3 4 5 6 7 8 Qg, GATE CHARGE (nC) 0 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 17. Gate Charge Characteristics. 100 RDS(ON) LIMIT ID, DRAIN CURRENT (A) 10 10s 100s 1ms 10ms 100ms 1s DC VGS = 4.5V SINGLE PULSE RJA = 102oC/W TA = 25 C 0.01 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) 100 o Figure 18. Capacitance Characteristics. 10 P(pk), PEAK TRANSIENT POWER (W) SINGLE PULSE RJA = 102C/W TA = 25C 8 6 1 4 0.1 2 0 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 RJA(t) = r(t) * RJA RJA = 102 C/W P(pk) 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 0.01 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 21. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDC6020C RevB (W) FDC6020C Dimensional Outline and Pad Layout Bottom View Recommended Landing Pattern For Standard Dual Configuration Top View FDC6020C RevB (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FACT Quiet SeriesTM ActiveArrayTM FAST BottomlessTM FASTrTM CoolFETTM FRFETTM CROSSVOLTTM GlobalOptoisolatorTM DOMETM GTOTM EcoSPARKTM HiSeCTM E2CMOSTM I2CTM TM EnSigna ImpliedDisconnectTM FACTTM ISOPLANARTM Across the board. Around the world.TM The Power FranchiseTM Programmable Active DroopTM DISCLAIMER LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench QFET QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SILENT SWITCHER SMART STARTTM SPMTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic TINYOPTOTM TruTranslationTM UHCTM UltraFET VCXTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I5 |
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