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MC10ELT21, MC100ELT21 5 V Differential PECL to TTL Translator
Description
The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of the ELT21 makes it ideal for those applications where space, performance and low power are at a premium. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The 100 Series contains temperature compensation.
Features
http://onsemi.com MARKING DIAGRAMS*
8 1 SOIC-8 D SUFFIX CASE 751 1 8 HLT21 ALYW G 8 KLT21 ALYW G
1
5C MG G
DFN8 MN SUFFIX CASE 506AA H K 5C 2Q M = MC10 = MC100 = MC10 = MC100 = Date Code
1
4
1
A L Y W G
= Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
(Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
December, 2006 - Rev. 11
1
Publication Order Number: MC10ELT21/D
2Q MG G 4
* * * * * *
3.5 ns Typical Propagation Delay 24 mA TTL Output Flow Through Pinouts Operating Range: VCC = 4.75 V to 5.25 V with GND = 0 V Q Output Will Default LOW with Inputs Left Open or < 1.3 V Pb-Free Packages are Available
8 1 TSSOP-8 DT SUFFIX CASE 948R
8 HT21 ALYWG G
8 KT21 ALYWG G
1
1
MC10ELT21, MC100ELT21
NC 1 TTL PECL D0 3 6 NC 8 VCC
Table 1. PIN DESCRIPTION
Pin Q0 D0, DO VBB VCC GND NC EP TTL Outputs PECL Differential Outputs Reference Voltage Output Positive Supply Ground No Connect Exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply or leave floating open. Function
D0
2
7
Q0
VBB
4
5
GND
Figure 1. 8-Lead Pinout and Logic Diagram (Top View)
Table 2. ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Pb Pkg Level 1 Level 1 Level 1 Value 50 kW N/A > 2 kV Pb-Free Pkg Level 1 Level 3 Level 1
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) SOIC-8 TSSOP-8 DFN8 Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
UL 94 V-0 @ 0.125 in 81 Devices
Table 3. MAXIMUM RATINGS
Symbol VCC VIN IBB TA Tstg qJA qJC qJA qJA Tsol Parameter PECL Power Supply PECL Input Voltage VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Ambient) Wave Solder Pb Pb-Free 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm 0 lfpm 500 lfpm <2 to 3 sec @ 248C <2 to 3 sec @ 260C SOIC-8 SOIC-8 SOIC-8 TSSOP-8 TSSOP-8 DFN8 DFN8 Condition 1 GND = 0 V GND = 0 V VI VCC Condition 2 Rating 7 0 to 6 0.5 -40 to +85 -65 to +150 190 130 41 to 44 185 140 129 84 265 265 Unit V V mA C C C/W C/W C/W C/W C/W C/W C/W C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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MC10ELT21, MC100ELT21
Table 4. 10ELT SERIES PECL INPUT DC CHARACTERISTICS VCC = 5.0 V; GND = 0.0 V (Note 2)
-40C Symbol VIH VIL VBB VIHCMR IIH IIL Characteristic Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) Input HIGH Current Input LOW Current 0.5 Min 3770 3050 3.57 2.2 Typ Max 4110 3500 3.7 5.0 255 0.5 Min 3870 3050 3.65 2.2 25C Typ Max 4190 3520 3.75 5.0 175 0.3 Min 3930 3050 3.69 2.2 85C Typ Max 4265 3555 3.81 5.0 175 Unit mV mV V V mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Output parameters vary 1:1 with VCC. VCC can vary 0.25 V. 3. VIHCMR min varies 1:1 with GND, VIHCMR max varies 1:1 with VCC.
Table 5. 100ELT SERIES PECL INPUT DC CHARACTERISTICS VCC = 5.0 V; GND = 0.0 V (Note 4)
-40C Symbol VIH VIL VBB VIHCMR IIH IIL Characteristic Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 5) Input HIGH Current Input LOW Current 0.5 Min 3835 3190 3.62 2.2 Typ Max 4120 3525 3.74 5.0 255 0.5 Min 3835 3190 3.62 2.2 25C Typ Max 4120 3525 3.74 5.0 175 0.5 Min 3835 3190 3.62 2.2 85C Typ Max 4120 3525 3.745 5.0 175 Unit mV mV V V mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket o printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Input parameters vary 1:1 with VCC. VCC can vary 0.25 V. 5. VIHCMR min varies 1:1 with GND, VIHCMR max varies 1:1 with VCC.
Table 6. TTL OUTPUT DC CHARACTERISTICS VCC = 4.75 V to 5.25 V; TA = -40C to 85C)
Symbol VOH VOL ICCH ICCL IOS Characteristic Output HIGH Voltage Output LOW Voltage Power Supply Current Power Supply Current Output Short Circuit Current -150 Condition IOH = -3.0 mA IOL = 24 mA 20 22 Min 2.4 Typ Max (Note 6) 0.5 29 32 -60 Unit V V mA mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. Maximum level is VCC - 0.7 by design.
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MC10ELT21, MC100ELT21
AC CHARACTERISTICS VCC = 4.75 V to 5.25 V; GND = 0.0 V (Note 7)
-40C Symbol fmax tJITTER tPLH tPHL VPP tr/tf Characteristic Maximum Toggle Frequency Random Clock Jitter (RMS) Propagation Delay @ 1.5 V Propagation Delay @ 1.5 V Input Swing (Note 8) Output Rise/Fall Time (10-90%) 2.0 2.0 200 5.5 5.5 1000 2.0 2.0 200 750 Min Typ Max Min 25C Typ 100 35 5.5 5.5 1000 2.0 2.0 200 5.5 5.5 1000 Max Min 85C Typ Max Unit MHz ps ns ns mV ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 7. RL = 500 W to GND and CL = 20 pF to GND. Refer to Figure 2. 8. VPP(min) is the minimum input swing for which AC parameters are guaranteed. The device has a DC gain of 40.
APPLICATION
TTL RECEIVER
CHARACTERISTIC TEST
*CL includes fixture capacitance
CL *
RL
AC TEST LOAD
GND
Figure 2. TTL Output Loading Used for Device Evaluation
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MC10ELT21, MC100ELT21
ORDERING INFORMATION
Device MC10ELT21D MC10ELT21DG MC10ELT21DR2 MC10ELT21DR2G MC10ELT21DT MC10ELT21DTG MC10ELT21DTR2 MC10ELT21DTR2G MC10ELT21MNR4 MC10ELT21MNR4G MC100ELT21D MC100ELT21DG MC100ELT21DR2 MC100ELT21DR2G MC100ELT21DT MC100ELT21DTG MC100ELT21DTR2 MC100ELT21DTR2G MC100ELT21MNR4 MC100ELT21MNR4G Package SOIC-8 SOIC-8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) DFN8 DFN8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) DFN8 DFN8 (Pb-Free) Shipping 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 100 Units / Rail 100 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 100 Units / Rail 100 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC10ELT21, MC100ELT21
PACKAGE DIMENSIONS
SOIC-8 NB CASE 751-07 ISSUE AH
-X-
A
8 5
B
1
S
4
0.25 (0.010)
M
Y
M
-Y- G
K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
C -Z- H D 0.25 (0.010)
M SEATING PLANE
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060
7.0 0.275
4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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MC10ELT21, MC100ELT21
PACKAGE DIMENSIONS
TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A
8x
K REF 0.10 (0.004)
M
0.15 (0.006) T U
S 2X
TU
S
V
S
L/2
8 1
5
L
PIN 1 IDENT
4
B -U-
0.25 (0.010) M
0.15 (0.006) T U
S
A -V-
F DETAIL E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_
C 0.10 (0.004) -T- SEATING
PLANE
D
G DETAIL E
-W-
DIM A B C D F G K L M
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MC10ELT21, MC100ELT21
PACKAGE DIMENSIONS
DFN8 CASE 506AA-01 ISSUE D
1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D D2 E E2 e K L MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.20 --- 0.25 0.35
D
A B
PIN ONE REFERENCE
2X
0.10 C
2X
0.10 C
0.10 C
8X
0.08 C
SEATING PLANE
A1
e/2
1 8X 4
L
K
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
CCC CCC CCC CCC
8
E
TOP VIEW
A (A3) C e
SIDE VIEW D2
E2
5 8X
b
0.10 C A B 0.05 C
NOTE 3
BOTTOM VIEW
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MC10ELT21/D

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