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SyncMOS Technologies Inc.
December 1998
SM2964
8 - Bit Micro-controller
with 64KB flash embedded
Product List
SM2964C16, 16 MHz 64KB internal flash MCU SM2964C25, 25 MHz 64KB internal flash MCU SM2964C40, 40 MHz 64KB internal flash MCU
Features
Working voltage:4.5V through 5.5V General 8051 family compatible 12 clocks per machine cycle 64K byte internal flash memory 256 byte data RAM Three 16 bit Timers/Counters Four 8-bit I/O ports Full duplex serial channel Bit operation instructions Page free jumps 8-bit Unsigned Division 8-bit Unsigned Multiply BCD arithmetic Direct Addressing Indirect Addressing Nested Interrupt Two priority level interrupt A serial I/O port Power save modes: Idle mode and Power down mode Code protection function
Description
The SM2964 series product is an 8 - bit single chip micro controller with 64KB flash embedded.It provides hardware features and a powerful instruction set, necessary to make it a versatile and cost effective controller for those applications demand up to 32 I/O pins or need up to 64 K byte memory either for program or for data or mixed. To program the flash block, a commercial programmer is capable to do it.
Ordering Information
yyww SM2964ihhk yy: year, ww:week v: version identifier { , A, B, ...} i: process identifier {C} hh: working clock in MHz {16, 25, 40} k: package type postfix {as below table}
Pin/Pad Package Configuration 40L PDIP page 2 44L PLCC page 2 44L PQFP page 2 44L LQFP page 2 Logo Size at Top Marking 5.0 x 4.2 mm 4.5 x 3.8 mm 2.8 x 2.4 mm 2.8 x 2.4 mm
Postfix P J Q U
Dimension page 11 page 12 -
Taiwan 4F, No.1 Creation Road 1, Science-Based Industrial Park, Hsinchu, Taiwan 30077 TEL: 886-3-578-3344 FAX: 886-3-579-2960 886-3-578-0493
Specifications subject to change without notice,contact your sales representatives for the most recent information.
1/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998
SM2964
Pin Configurations
T2EX/P1.1/FD1 T2/P1.0/FD0 NC VDD
P0.0/FA0
P1.4/FD4
P1.3/FD3
P1.2/FD2
P0.1/FA1
T2EX/P1.1/FD1 T2/P1.0/FD0 NC VDD
P0.0/FA0 P0.1/FA1
P1.4/FD4
P0.2/FA2 P0.3/FA3
P1.3/FD3 P1.2/FD2
P1.5/FD5 P0.4/FA4 P0.5/FA5 P0.6/FA6 P0.7/FA7 #EA NC ALE/#FCE #PSEN/#FOE P2.7/FA15 P2.6/FA14 P2.5/FA13 P1.6/FD6 P1.5/FD7 RES RXD/P3.0 NC TXD/P3.1 #INT0/P3.2 #INT1/P3.3 T0/P3.4 T1/P 3.5
6
5
4
32
P1.5/FD5 P1.6/FD6 P1.7/FD7 RES RXD/P3.0 NC TXD/P3.1 #INT0/P3.2 #INT1/P3.3 T0/P3.4 T1/P3.5
7 8 9 10 11 12 13
1 44 43 42 41 40 39 38 37 36 35 34 33
1 2 3 4 5 6 7 8 9 10 11
44 43 42 41 40 39 38 37 36 35 34 33 32 31
P0.2/FA2 P0.3/FA3
P0.4/FA4 P0.5/FA5 P0.6/FA6 P0.7/FA7 #EA NC ALE/#FCE #PSEN/#FOE P2.7/FA15 P2.6/FA14 P2.5/FA13
SM2964 ihh-yyyJ 44L PLCC
(Top View)
SM2964 ihh-yyyQ 44L PQFP
(Top View)
30 29 28 27 26 25 24 23
32 14 15 31 16 30 17 29 18 19 20 21 22 23 24 25 26 27 28
12 13 14 15 16 17 18 19 20 21 22
P2.1/FA9
P2.2/FA10 P0.1/FA1
#WR/P3.6 #RD/P3.7/#FWE
T2EX/P1.1/FD1 T2/P1.0/FA0 NC VDD
#RD/P3.7/#FWE XTAL2 XTAL1
P2.1/FA9 P2.2/FA10 P2.3/FA11
P2.4/FA12
P2.0/FA8
P1.4/FD4
T2/P1.0/FD0 T2EX/P1.1/FD1 P1.2/FD2 P1.3/FD3 P1.4/FD4 P1.5/FD5 P1.6/FD6 P1.7/FD7 RES RXD/P3.0 TXD/P3.1 #INT0/P3.2 #INT1/P3.3 T0/P3.4 T1/P3.5 #WR/P3.6 #RD/P3.7/#FWE XTAL2 XTAL1 VSS
1 2 3 4 5 6 7 8 9 10 11
40 39 38 37 36 35 34
VDD P0.0/FA0 P0.1/FA1 P0.2/FA2 P0.3/FA3 P0.4/FA4 P0.5/FA5 P0.6/FA6 P0.7/FA7 #EA ALE/#FCE #PSEN/#FOE P2.7/FA15 P2.6/FA14 P2.5/FA13 P1.5/FD5 P1.6/FD6 P1.5/FD7 RES RXD/P3.0 NC TXD/P3.1 #INT0/P3.2 #INT1/P3.3 T0/P3.4 T1/P 3.5
1 2 3 4 5 6 7 8 9 10 11
44 43 42 41 40 39 38 37 36 35 34 33 32 31
P1.2/FD2
P0.2/FA2 P0.3/FA3
P1.3/FD3
P0.0/FA0
P2.4/FA12
#WR/P3.6
P2.3/FA11
XTAL2
P2.0/FA8
XTAL1
VSS NC
VSS NC
P0.4/FA4 P0.5/FA5 P0.6/FA6 P0.7/FA7 #EA NC ALE/#FCE #PSEN/#FOE P2.7/FA15 P2.6/FA14 P2.5/FA13
SM2964ihh-yyyP
33 32 31 30 29 28 27 26 25 24 23 22 21
SM2964 ihh-yyyU 44L LQFP
(Top View)
30 29 28 27 26 25 24 23
40L PDIP
(Top View)
12
13 14 15 16 17 18 19 20
12 13 14 15 16 17 18 19 20 21 22
P2.1/FA9
P2.2/FA10
#RD/P3.7/#FWE XTAL2 XTAL1
P2.3/FA11 P2.2/FA10 P2.1/FA9 P2.0/FA8
Specifications subject to change without notice,contact your sales representatives for the most recent information.
2/15
Ver1.0
P2.4/FA12
#WR/P3.6
P2.3/FA11
P2.0/FA8
VSS NC
P2.4/FA12
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998 Block Diagram
Stack Pointer Decoder & Register 256 bytes RAM
SM2964
Timer 2
Timer 1
Timer 0
Buffer
RES
Reset Circuit
to pertinent blocks Acc to whole chip Buffer2 Buffer1
DPTR
Vdd Vss
Power Circuit
PC Incrementer
Interrupt Circuit
to pertinent blocks
ALU
Program Counter
XTAL2 XTAL1 #EA ALE #PSEN Timing Generator to whole system
PSW
Register
Instruction Register
Port 0 Latch
Port 1 Latch
Port 2 Latch
Port 3 Latch
64K bytes Flash Memory
Port 0 Driver & Mux 8
Port 1 Port 2 Port 3 Driver & Mux Driver & Mux Driver & Mux 8 8 8
Specifications subject to change without notice,contact your sales representatives for the most recent information.
3/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998 Pin Descriptions
40L 44L PDIP LQFP Pin# Pin#
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 40 41 42 43 44 1 2 3 4 5 7 8 9 10 11 12 13 14 15 16 18 19 20 21 22 23 24 25 26 27 29 30 31 32 33 34 35 36 37 38
SM2964
44L 44L PQFP PLCC Pin# Pin#
40 41 42 43 44 1 2 3 4 5 7 8 9 10 11 12 13 14 15 16 18 19 20 21 22 23 24 25 26 27 29 30 31 32 33 34 35 36 37 38 2 3 4 5 6 7 8 9 10 11 13 14 15 16 17 18 19 20 21 22 24 25 26 27 28 29 30 31 32 33 35 36 37 38 39 40 41 42 43 44
Symbol
T2/P1.0/FD0 T2EX/P1.1/FD1 P1.2/FD2 P1.3/FD3 P1.4/FD4 P1.5/FD5 P1.6/FD6 P1.7/FD7 RES RXD/P3.0 TXD/P3.1 #INT0/P3.2 #INT1/P3.3 T0/P3.4 T1/P3.5 #WR/P3.6 #RD/P3.7/#FWE XTAL2 XTAL1 VSS P2.0/FA8 P2.1/FA9 P2.2/FA10 P2.3/FA11 P2.4/FA12 P2.5/FA13 P2.6/FA14 P2.7/FA15 #PSEN/#FOE ALE/#FCE #EA P0.7/FA7 P0.6/FA6 P0.5/FA5 P0.4/FA4 P0.3/FA3 P0.2/FA2 P0.1/FA1 P0.0/FA0 VDD
Active I/O
i/o i/o i/o i/o i/o i/o i/o i/o i i/o i/o i/o i/o i/o i/o i/o i/o o i i/o i/o i/o i/o i/o i/o i/o i/o o/i o/i i i/o i/o i/o i/o i/o i/o i/o i/o
Names
bit 0 of port 1 & timer 2 & bit 0 of flash block address bit 1 of port 1 & timer control & bit 1 of flash block address bit 2 of port 1 & bit 2 of flash/ext. memory address bit 3 of port 1 & bit 3 of flash/ext. memory address bit 4 of port 1 & bit 4 of flash/ext. memory address bit 5 of port 1 & bit 5 of flash/ext. memory address bit 6 of port 1 & bit 6 of flash/ext. memory address bit 7 of port 1 & bit 7 of flash/ext. memory address Reset bit 0 of port 3 & Receive data & flash block enable bit 1 of port 3 & Transmit data bit 2 of port 3 & low true interrupt 0 bit 3 of port 3 & low true interrupt 1 bit 4 of port 3 & Timer 0 bit 5 of port 3 & Timer 1 bit 6 of port 3 & o/p enable to flash block (low enable) bit 7 of port 3 & write enable to flash block (low enable) Crystal out Crystal in Sink Voltage, Ground bit 0 of port 2 & bit 8 of flash block address bit 1 of port 2 & bit 9 of flash block address bit 2 of port 2 & bit 10 of flash block address bit 3 of port 2 & bit 11 of flash block address bit 4 of port 2 & bit 12 of flash block address bit 5 of port 2 & bit 13 of flash block address bit 6 of port 2 & bit 14 of flash block address bit 7 of port 2 & bit 15 of flash block address program storage enable address latch enable external access bit 7 of port 0 & data bit 7 of flash block bit 6 of port 0 & data bit 6 of flash block bit 5 of port 0 & data bit 5 of flash block bit 4 of port 0 & data bit 4 of flash block bit 3 of port 0 & data bit 3 of flash block bit 2 of port 0 & data bit 2 of flash block bit 1 of port 0 & data bit 1 of flash block bit 0 of port 0 & data bit 0 of flash block Drive Voltage, +5 Vcc
H
L/ L/ -
L/ L/ - /L
L/L - /L L
Specifications subject to change without notice,contact your sales representatives for the most recent information.
4/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998 Operating Conditions
Symbol TA VCC5 Fosc 16 Fosc 25 Fosc 40 Description Ambient temperature under bias Supply voltage Oscillator Frequency Min. 0 4.5 3.0 16 25 Typ. 25 5.0 16 25 40 Max. 70 5.5 16 25 40 Unit. degree C V MHz MHz MHz SM2964C SM2964C16 SM2964C25 SM2964C40 Remarks
SM2964
AC Characteristics
(16/25/40 MHZ, operating conditions; CL for Port 0, ALE and PSEN Outputs=150uF; CL for all Other Output=80pF) Valid f osc 16 Variable f osc Unit Symbol Parameter Cycle Min. Typ. Max Min. Typ. Max T LHLL ALE pulse width RD/WRT 115 2xT - 10 nS T AVLL Address Valid to ALE low RD/WRT 43 T - 20 nS T LLAX Address Hold after ALE low RD/WRT 53 T - 10 nS T LLIV ALE low to Valid Instruction In RD 240 4xT - 10 nS T LLPL ALE low to #PSEN low RD 53 T - 10 nS T PLPH #PSEN pulse width RD 173 3xT - 15 nS T PLIV #PSEN low to Valid Instruction In RD 177 3xT - 10 nS T PXIX Instruction Hold after #PSEN RD 0 0 nS T PXIZ Instruction Float after #PSEN RD 87 T + 25 nS T AVIV Address to Valid Instruction In RD 292 5xT - 20 nS T PLAZ #PSEN low to Address Float RD 10 10 nS T RLRH #RD pulse width RD 365 6xT - 10 nS T WLWH #WR pulse width WRT 365 6xT - 10 nS T RLDV #RD low to Valid Data In RD 302 5xT - 10 nS T RHDX Data Hold after #RD RD 0 0 nS T RHDZ Data Float after #RD RD 145 2xT + 20 nS T LLDV ALE low to Valid Data In RD 590 8xT - 10 nS T AVDV Address to Valid Data In RD 542 9xT - 20 nS T LLYL ALE low to #WR High or #RD low RD/WRT 178 197 3xT - 10 3xT + 10 nS T AVYL Address Valid to #WR or #RD low RD/WRT 230 4xT - 20 nS T QVWH Data Valid to #WR High WRT 403 7xT - 35 nS T QVWX Data Valid to #WR transition WRT 38 T - 25 nS T WHQX Data hold after #WR WRT 73 T + 10 nS T RLAZ #RD low to Address Float RD 5 nS T YALH #WR or #RD high to ALE high RD/WRT 53 72 T -10 T + 10 nS T CHCL clock fall time nS T CLCX clock low time nS T CLCH clock rise time nS T CHCX clock high time nS T , TCLCL clock period 63 1/fosc nS Remarks
Specifications subject to change without notice,contact your sales representatives for the most recent information.
5/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998
SM2964
DC Characteristics
(12MHz, typical operating conditions, valid for SM2964C series) Symbol VILX VILR VIHX VIHR VOL0 VOL1 Parameter Input low voltage " Input High Voltage " Output Low Voltage " " Output High Voltage " " " " " " " Output Low Current Logical 0 Input Current Logical 1 Input Current Logic Transition Current Input Leakage Current Reset Pull-down Resistance Crystal feedback Resistance Pin Capacitance Power Supply Current Valid XTAL1 #EA RES XTAL1 #EA RES ALE, #PSEN ports 0,3 ports 1,2 ALE, #PSEN port 0 port 1,3 port 2 ports 0,3 ports 1,2,3 port 0 port 1,2,3 port 0 RES XTAL1,2 Vdd Vdd Vdd port 0,1,2,3,#EA RST XTAL1 port 0,1,2,3,#EA RST XTAL1 Min. -0.5 0 -0.5 70% Vcc 20%Vcc+0.9 70%Vcc Typ. Max 20%Vcc-0.1 20%Vcc-0.3 20%Vcc-0.1 Vcc+0.5 Vcc+0.5 Vcc+0.5 450 450 350 Unit V V V V V V mV mV mV V V V V V V V V mA 50 uA 1.5 uA Test Conditions
VOH0 VOH1 VOH2 IOL0 IIL IIH ITL ILI R RES RX CIO ICC
2.4 90%Vcc 2.4 90%Vcc 2.4 90%Vcc 2.4 90%Vcc
IOL=3.2mA IOL=3.2mA IOL=1.6mA IOH= -60uA IOH= -10uA IOH= -800uA IOH= -80uA IOH= -60uA IOH= -10uA IOH= -60uA IOH= -10uA VOL=0.45V,note1 Vin=0.45V Vin=5.0V Vin=2.0V 0.45V50 50
VIL1 VIL2 VIL3 VIH1 VIH2 VIH3
Input Low Voltage " " Input Low Voltage " "
1.3 3.0 3.0
650 uA 10 uA 150 Kohm 330 Kohm 10 pF 20 mA 6.5 mA 150 uA 0.5 V 0.4 V 0.4 V V V V
Freq=1MHZ,Ta=25 C Active mode, 12MHZ Idle mode, 12MHZ Power down mode Vcc= 5V " " " " "
note1: no more than 80 mA IOLs for all 16-bit ports & 3 output pins.
To Programme
The Program mean is identical to MVI's flash V29C51002 except the memory size. This SM2964 has 512K bit (64K x 8) while the V29C51002 has 2 mega bit (256K x 8). Of course, the pin configuration is not identical. MVI provides an adapter board M9015 to transform those pins to fit into pins of commercial 2-mega-bit flash which is organized in 8-bit width.
Specifications subject to change without notice,contact your sales representatives for the most recent information.
6/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998 Application Reference Valid for SM2964C
X'tal C1 C2 R X'tal C1 C2 R 3MHz 30 pF 30 pF open 16MHz 30 pF 30 pF open 6MHz 30 pF 30 pF open 25MHz 15 pF 15 pF 62K 9MHz 30 pF 30 pF open 33MHz 10 pF 10 pF 6.8K 12MHz 30 pF 30 pF open 40MHz 2 pF 2 pF 4.7K
XI X'tal SM2964C R X2 C1 C2
SM2964
NOTE : Oscillation circuit may differs with different crystal or ceramic resonator, especially in higher oscillation frequency which was due to each crystal or ceramic resonator has its own characteristics. User should check with the crystal or ceramic resonator manufacture for appropriate value of external components.
Data Memory Read Cycle Timing
T12 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T1 T2 T3
OSC
1 2
ALE
#PSEN
#RD
5
7
3
PORT2
ADDRESS A15 - A8
3
4 Float
6 DATA in
8 Float ADDRESS or Float
PORT0
INST in Float
A7 - A0
Specifications subject to change without notice,contact your sales representatives for the most recent information.
7/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998 Program Memory Read Cycle Timing
T12 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T1 T2
SM2964
OSC ALE
1
2
#PSEN #RD,#WR
5
7
PORT2
3 ADDRESS A15 - A8 ADDRESS A15 - A8
PORT0
3 Float A7 - A0
4 Float
6 INST in
8 Float A7 - A0 Float INST in Float
Data Memory Write Cycle Timing
T12 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T1 T2 T3
OSC
1
ALE
#PSEN
#WR
5
6
2
PORT2
ADDRESS A15 - A8
2
PORT0
3 DATA OUT
4 ADDRESS or Float
INST
Float
A7 - A0
Specifications subject to change without notice,contact your sales representatives for the most recent information.
8/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998
SM2964
I/O Ports Timing
T6 T7 T8 T9 T10 T11 T12 T1 T2 T3 T4 T5 T6 T7 T8
X1 inputs P0,P1
sampled
sampled
inputs P2,P3 Output by Mov Px,Src RxD at Serial Port Shift Clock (Mode 0)
current data next data
sampled
Timing Critical, Requirement of External Clock (Vss=0.0V is assumed)
TCLCL
Vdd-0.5V
70%Vdd
0.45V
20%Vdd-0.1V TCHCL TCLCX TCLCH TCHCX
Tm.I
#PSEN ALE PORT 0
External Program Memory Read Cycle
TPLPH
TLHLL TAVLL A0 - A7
TLLPL TLLAX TPLAZ TPLIV
TPXIZ TPXIX Instruction. IN A0 - A7
TAVIV
PORT 2
A8 - A15
A8 - A15
Specifications subject to change without notice,contact your sales representatives for the most recent information.
9/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998 Tm.II External Data Memory Read Cycle
SM2964
#PSEN
TYHLH
ALE
TLLDV TLLYL TRLRH
#RD
TAVLL
TLLAX A0 - A7 from Ri or DPL TAVYL TAVDV
TRLDV TRLAZ
TRHDZ TRHDX DATA IN A0 - A7 FROM PCL INSTRL IN
PORT 0
PORT 2
P2.0 - P2.7 or A8 - A15 from DPH
A8 - A15 from PCH
Tm.III External Data Memory Write Cycle
#PSEN
TLHLL
TYHLH
ALE
TLLYL TWLWH
#WR
TAVLL TLLAX
TQVWX
TQVWH
TWHQX
PORT 0
A0-A7 from Ri or DPL
DATA OUT
A0-A7 From PCL
INSTRL IN
TAVYL
PORT 2
P2.0-P2.7 or A8-A15 from DPH
A8-A15 from PCH
Specifications subject to change without notice,contact your sales representatives for the most recent information.
10/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998
SM2964
40L 600mil PDIP Information
E S D E1
A1
A2 A
C
L e1 B1 B
eA a
Note: 1.Dimension D Max & S include mold flash or tie bar burrs. 2.Dimension E1 does not include inter lead flash. 3.Dimension D & E1 include mold mismatch and are determined at the mold parting line. 4.Dimension B1 does not include dam bar protrusion/ infusion. 5.Controlling dimension is inch. 6.General appearance spec. should base on final visual inspection spec.
Symbol A A1 A2 B B1 C D E E1 e1 L a eA S
Dimension in inch minimal/maximal - / 0.210 0.010 / 0.150 / 0.160 0.016 / 0.022 0.048 / 0.054 0.008 / 0.014 - / 2.070 0.590 / 0.610 0.540 / 0.552 0.090 / 0.110 0.120 / 0.140 0 / 15 0.630 / 0.670 - / 0.090
Dimension in mm minimal/maximal - / 5.33 0.25 / 3.81 / 4.06 0.41 / 0.56 1.22 / 1.37 0.20 / 0.36 - / 52.58 14.99 / 15.49 13.72 / 14.02 2.29 / 2.79 3.05 / 3.56 0 / 15 16.00 / 17.02 - / 2.29
Specifications subject to change without notice,contact your sales representatives for the most recent information.
11/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998 44L Plastic Chip Carrier (PLCC)
6 7 L
SM2964
E
HE y
GE
D HD A2 A C A1
b1 e GD
b
Note: 1.Dimension D & E does not include inter lead flash. 2.Dimension b1 does not include dam bar protrusion/ intrusion. 3.Controlling dimension: Inch 4.General appearance spec. should base on final visual inspection spec.
Symbol A A1 A2 b1 b C D E e GD GE HD HE L
y
Dimension in inch minimal/maximal - / 0.185 0.020 / 0.145 / 0.155 0.026 / 0.032 0.016 / 0.022 0.008 / 0.014 0.648 / 0.658 0.648 / 0.658 0.050 BSC 0.590 / 0.630 0.590 / 0.630 0.680 / 0.700 0.680 / 0.700 0.090 / 0.110 - / 0.004 /
Dimension in mm minimal/maximal - / 4.70 0.51 / 3.68 / 3.94 0.66 / 0.81 0.41 / 0.56 0.20 / 0.36 16.46 / 16.71 16.46 / 16.71 1.27 BSC 14.99 / 16.00 14.99 / 16.00 17.27 / 17.78 17.27 / 17.78 2.29 / 2.79 - / 0.10 /
Specifications subject to change without notice,contact your sales representatives for the most recent information.
12/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998 Dice Pad Assignment
INDEX 1 2 3 4 5 6 7 8 9 10 11 12 PAD-NAME P3.6 P3.7 XTAL2 XTAL1 Vss Vss Vss P2.0 P2.1 P2.2 P2.3 P2.4 INDEX 13 14 15 16 17 18 19 20 21 22 PAD-NAME P2.5 P2.6 P2.7 #FOE #FCE #EA P0.7 P0.6 P0.5 P0.4 INDEX 23 24 25 26 27 28 29 30 31 32 33 34 35 PAD-NAME P0.3 P0.2 P0.1 P0.0 Vdd Vdd Vdd Vss P1.0 P1.1 P1.2 P1.3 P1.4 INDEX 36 37 38 39 40 41 42 43 44 45
SM2964
PAD-NAME P1.5 P1.6 P1.7 RES P3.0 P3.1 P3.2 P3.3 P3.4 P3.5
1 2 3 4 5 6 7 8 9 10 11
45 44
43 42
41
40 39
38
37
36 35 34 33 32 31
MSU2964 PAD SIZE: 90x 90 (um) substrate should be bonded to Vss (Gnd)
30 29 28 27 26 25 pid 264* 02/98 pid 264** 04/98 pid 264*** 11/98 pid 264**** 12/98 pid 264A 01/99 pid 264A* 08/00
12 13 14
15 16
17
18 19
20
21
22
24 23
Specifications subject to change without notice,contact your sales representatives for the most recent information.
13/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998 Feedback / Inquiry: To Attn Fax Tel :SyncMOS Technologies, Inc. :MKT / Customer Service Dept. :886-3-579-2960 :886-3-578-0493 :886-3-579-2988 :886-3-579-2926 From Company : :
SM2964
Dept, Section : Position Title Inquiry Date Ref No : : :
Logo Top Marking Request & Spec. Below is the specification of logo in 20:1 scale base. This logo diagram is clear enough and is able to be shrunk directly to fit into available top marking area on top of the device package. Description:
Specifications subject to change without notice,contact your sales representatives for the most recent information.
14/15
Ver1.0
PID 2964 08/00
SyncMOS Technologies Inc.
December 1998 SM2964 Application Note
SM2964 may need pull-up resistor when driving multiple device with its I/O pins.The pull-up resistor value 10Kohm to 47Kohm
SM2964
pull-up resister 10Kohm to 47Kohm
DEVICE 1
N> 1
I/O pin SM2964
DEVICE N
When using port 0 as input pin, user need to set corresponding SFR (special function register) to 1 before read in data through port 0. Otherwise data read may be incorrect.
e.g. Original program Modified program mov b,#0dh mov b,#0dh djnz b,$ djnz b,$ mov c,p0.2 setb p0.2 mov acc.7, c mov c,p0.2 mov.7, c
Extra instruction added
SM2964 has 64KB internal ROM addressing space which fully occupies 16-bit address line. /EA pin of SM2964 will be disabled after internal ROM been protected. This feature will prevent internal ROM content been dump externally. If the internal ROM not been protected, /EA pin function of SM2964 will be the same as /EA pin function of intel 80C52.
Specifications subject to change without notice,contact your sales representatives for the most recent information.
15/15
Ver1.0
PID 2964 08/00

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