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ISL59123
Data Sheet April 4, 2007 FN6432.1
Triple Channel Video Driver with LPF
The ISL59123 is a triple channel reconstruction filter with a -3dB roll-off frequency of 18MHz. Operating from single supplies ranging from +2.5V to +3.6V and sinking a low 4mA quiescent current, the ISL59123 is ideally suited for low power, battery-operated applications. An enable pin allows the part to be placed in a 500nA shutdown mode in less than 30ns. The ISL59123 is designed to meet the needs for extremely low power and bandwidth requirements in battery-operated communication, instrumentation, and modern industrial applications such as video on demand, cable set-top boxes, MP3 players, and HDTV. The ISL59123 is offered in a space-saving chipscale package guaranteed to a 0.57mm maximum height constraint and specified for operation from -40C to +85C temperature range.
Features
* 3rd order 18MHz reconstruction filter * 4mA typical supply current * Less than 500nA maximum power-down current * 2.5V to 3.6V supply range * CSP package * Pb-free plus anneal available (RoHS compliant)
Applications
* Video amplifiers * Portable and handheld products * Communications devices * Video on demand * Cable set-top boxes * Satellite set-top boxes
Block Diagram
50mV VIN1 18MHz -+ X2 VOUT1
* MP3 players * HDTV * Personal video recorder
50mV VIN2 18MHz -+ X2 VOUT2
Pinout
ISL59123 (9 BALL WLCSP) TOP VIEW
1 2 3
50mV VIN3 18MHz -+ X2 VOUT3 A VIN1 B VIN2 C VIN3 VDD VOUT3 EN VOUT2 GND VOUT1
EN
BIASING AND CONTROL
Ordering Information
PART NUMBER (Note) ISL59123IIZ-T7 PART MARKING TAPE AND REEL 123Z 7" TEMP. RANGE (C) -40 to +85 PACKAGE (Pb-free) 9 Ball 3x3 WLCSP PKG. DWG. # W3x3.9B
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
ISL59123
Absolute Maximum Ratings (TA = +25C)
Supply Voltage from VDD to GND . . . . . . . . . . . . . . . . . . . . . . . 4.2V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . VDD +0.3V to GND -0.3V Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 40mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +125C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125C ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . .2500V Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . .300V
Thermal Information
Thermal Resistance (Typical) JA (C/W) 9 Ball WLCSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS VDD IDD IDD_OFF CIN IIN VOLS AV
VDD = 3.3V, TA = +25C, RSOURCE = 200, RL = 150 to GND, unless otherwise specified. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
Supply Voltage Range Quiescent Supply Current Shutdown Supply Current VIN Input Capacitance VIN Input Bias Current Output Level Shift Voltage Voltage Gain Channel-to Channel Gain Mismatch DC Power Supply Rejection Output Voltage High Swing Output Short-Circuit Current VDD = 2.7V to 3.3V VIN = 2V, RL = 150 to GND VIN = 2V, VOUT shorted to GND through 10 VIN = 0V, VOUT shorted to VDD through 10 0.0V < VIN < 2.0V VIN = 0V, no load (minimum output voltage) RL = 150 VIN = 500mV, EN = VDD, no load EN = 0V
2.5 4.0
3.6 6.0 0.5 10 0.01 1 150 2.04 1.75
V mA A pF A mV V/V % dB V mA mA
45 1.95
100 1.99 0.5 63
AV
PSRR VOH ISC
2.85 100 140
3.1 140 200 0.003 1 0.8
IENABLE VIL VIH ROUT
Enable Input Current Disable Threshold Enable Threshold Shutdown Output Impedance
0V < VEN < 3.3V VDD = 2.7V to 3.3V VDD = 2.7V to 3.3V EN = 0V DC EN = 0V, f = 4.5MHz 2.0 5.0
A V V
6.4 1.5
8.0
k k
AC PERFORMANCE BW Passband Gain Stopband Gain -3dB Bandwidth Normalized Gain at 11MHz Normalized Stopband Gain (minimum limits guaranteed by design and bench characterization) Differential Gain Differential Phase Group Delay Variation Signal To Noise Ratio Positive Slew Rate RL = 150, CL = 5pF RL = 150, CL = 5pF f = 43MHz f = 54MHz NTSC and PAL NTSC and PAL f = 400kHz, 5MHz 100% white signal 10% to 90%, VIN = 1V step 40 -0.5 -11 -16 -16 -21 0.10 0.5 5.4 65 55 18 +0.5 MHz dB dB dB % ns dB V/s
dG dP D/DT SNR +SR
2
FN6432.1 April 4, 2007
ISL59123
Electrical Specifications
PARAMETER -SR tF tR tON tOFF VDD = 3.3V, TA = +25C, RSOURCE = 200, RL = 150 to GND, unless otherwise specified. (Continued) CONDITIONS 90% to 10%, VIN = 1V step 2.5VSTEP, 80% to 20% 2.5VSTEP, 20% to 80% VIN = 500mV, VOUT to 1% VIN = 500mV, VOUT to 1% MIN 50 TYP 60 25 22 250 30 MAX UNIT V/s ns ns ns ns
DESCRIPTION Negative Slew Rate Fall Time Rise Time Enable Time Disable Time
Pin Descriptions
PIN NUMBER A1 A2 A3 B1 B2 B3 C1 C2 C3 PIN NAME VIN1 GND VOUT1 VIN2 EN VOUT2 VIN3 VDD VOUT3 Video input for Channel 1 Ground Video output for Channel 1 Video input for Channel 2 Enable Video output for Channel 2 Video input for Channel 3 Positive power supply Video output for Channel 3 DESCRIPTION
Component Video Connection Diagram
3.3V
0.1F V DD Y CURRENT DAC 200 PB CURRENT DAC 200 VIN2 18MHz 50mV -+ X2 VIN1 18MHz 50mV -+ X2 VOUT1 75
COMPONENT VIDEO CABLE
YOUT 75
VOUT2 75
PBOUT 75
PR CURRENT DAC 200
VIN3 18MHz
50mV -+ X2
VOUT3 75
PROUT 75
C OR TIE TO 3.3V
EN
BIASING AND CONTROL
3
FN6432.1 April 4, 2007
ISL59123 Composite and S-Video Connection Diagram
3.3V
0.1F V DD Y (LUMA) CURRENT DAC 200 C (CHROMA) CURRENT DAC 200 VIN2 18MHz 50mV -+ X2 75 VOUT2 50mV VIN1 18MHz -+ X2 VOUT1 75 S-VIDEO CABLE
YOUT 75
COUT 75
CVBS CURRENT DAC 200
VIN3 18MHz
50mV -+ X2
VOUT3 75
CVBSOUT 75
C OR TIE TO 3.3V
EN
BIASING AND CONTROL
4
FN6432.1 April 4, 2007
ISL59123 Typical Performance Curves
5.0 4.0 3.0 2.0 GAIN (dB) 1.0 GAIN (dB) 0.0 -1.0 -2.0 -3.0 -4.0 -5.0 0.1M 1M 10M FREQUENCY (Hz) 100M -60 -30 -40 -50 VDD = +3.3V RL = 150 INPUT SWING = +0.3V TO +1.0V RSOURCE = 200 0 -10 -20
VDD = +3.3V, RL = 150, unless otherwise noted
VDD = +3.3V RL = 150 INPUT SWING = +0.3V TO +1.0V RSOURCE = 200 1M 10M 100M FREQUENCY (Hz) 1G
-70 0.1M
FIGURE 1. GAIN vs FREQUENCY -0.1dB
FIGURE 2. GAIN vs FREQUENCY -3dB POINT
10 0 -10 CL = 27pF
3.5 3.0 2.5
-20 VOUT (VP-P) GAIN (dB) -30 -40 -50 1.0 -60 -70 VDD = +3.3V RL = 150 INPUT SWING = +0.3V TO +1.0V RSOURCE = 200 1M 10M FREQUENCY (Hz) 100M 0.5 0 0 0.5 1.0 1.5 2.0 2.5 VIN (VP-P) 3.0 3.5 4.0 CL = 10pF 2.0 1.5
-80 0.1M
FIGURE 3. GAIN vs FREQUENCY FOR VARIOUS CLOAD
FIGURE 4. MAXIMUM OUTPUT MAGNITUDE vs INPUT MAGNITUDE
250 200 150
0 -10 -20 VDD = +3.3V VAC = 100mVP-P
100 PHASE () 50 0 -50 -100 -60 -150 -200 -250 0.1M 1M 10M FREQUENCY (Hz) 100M -70 -80 0.1M PSRR (dB) -30 -40 -50
1M 10M FREQUENCY (Hz)
100M
FIGURE 5. PHASE vs FREQUENCY
FIGURE 6. PSRR vs FREQUENCY
5
FN6432.1 April 4, 2007
ISL59123 Typical Performance Curves
35 30 25 IMPEDANCE () 20 15 10 5 0 0.01M ISOLATION (dB)
VDD = +3.3V, RL = 150, unless otherwise noted (Continued)
0 VIN3 to VOUT2 -20 -40 -60 -80 -100 -120 -140 0.1M VIN3 to VOUT1 VIN2 to VOUT2 VIN2 to VOUT1 VIN1 to VOUT2 VIN1 to VOUT3 VDD = +3.3V
0.1M
1.0M FREQUENCY (Hz)
10M
100M
1M
10M FREQUENCY (Hz)
100M
1G
FIGURE 7. OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 8. ISOLATION vs FREQUENCY
3.05 MAX OUTPUT MAGNITUDE (VP-P) 3.00 2.95 2.90 2.85 2.80 2.75 2.70 VDD = +3.3V fIN = 3MHz 0 100 200 300 400 500 600 LOAD RESISTANCE () 700 800 900 SUPPLY CURRENT (mA)
6
5
4
3
2
1 NO INPUT NO LOAD 0 0.5 1.0 1.5 2.0 2.5 3.0 SUPPLY VOLTAGE (V) 3.5 4.0
FIGURE 9. MAXIMUM OUTPUT vs LOAD RESISTANCE
FIGURE 10. SUPPLY CURRENT vs SUPPLY VOLTAGE
TIME SCALE = 100ns/DIV
TIME SCALE = 100ns/DIV
VDD = +3.3V RL = 150 VOUT = 1VP-P
VDD = +3.3V RL = 150 VOUT = 200mVP-P
tRISE = 20.07ns tFALL = 21.22ns
tRISE = 19.03ns tFALL = 20.49ns
FIGURE 11. LARGE SIGNAL STEP RESPONSE
FIGURE 12. SMALL SIGNAL STEP RESPONSE
6
FN6432.1 April 4, 2007
ISL59123 Typical Performance Curves
ENABLE SIGNAL OUTPUT SIGNAL
VDD = +3.3V, RL = 150, unless otherwise noted (Continued)
TIME SCALE = 10ns/DIV
TIME SCALE = 50ns/DIV
OUTPUT SIGNAL DISABLE SIGNAL
FIGURE 13. ENABLE TIME
FIGURE 14. DISABLE TIME
0 -10 HARMONIC DISTORTION (dBc) -20 -30 -40 -50 -60 -70 3RD HD -80 0M 1M 2M 3M 4M 5M 6M 7M FREQUENCY (Hz) 2ND HD THD VDD = +3.3V VOUT = 2VP-P, SINE WAVE RL = 150
0 -10 HARMONIC DISTORTION (dBc) -20 -30 -40 -50 -60 -70 -80 0 0.5 1.0 1.5 2.0 2.5 3.0 OUTPUT VOLTAGE (VP-P) 3RD HD THD 2ND HD VDD = +3.3V fIN = 500kHz RL = 150
FIGURE 15. HARMONIC DISTORTION vs FREQUENCY
FIGURE 16. HARMONIC DISTORTION vs OUTPUT VOLTAGE
30
25
25 GROUP DELAY (ns) BANDWIDTH (MHz)
20
20
15
15
10
10
5
5 VDD = +3.3V RL = 150
0 0.1M
0 1M 10M FREQUENCY (Hz) 100M 0 50 100 150 200 250 300 350 INPUT RESISTANCE () 400 450 500
FIGURE 17. GROUP DELAY vs FREQUENCY
FIGURE 18. -3dB BANDWIDTH vs INPUT RESISTANCE
7
FN6432.1 April 4, 2007
ISL59123 Typical Performance Curves
80 70 60 SLEW RATE (V/s) 50 40 30 20 10 0 VOUT = 2VP-P RL = 150 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 SUPPLY VOLTAGE (V) 3.6 3.8 4.0 NEGATIVE SLEW POSITIVE SLEW DIFFERENTIAL GAIN (%)
VDD = +3.3V, RL = 150, unless otherwise noted (Continued)
0.10 0.08 0.06 0.04 0.02 0.00 -0.02 -0.04 0.3 RL = 150 VAC = 40mV FREQ = 3.58MHz VDD = +3.3V AV = +2
0.4
0.5
0.6 0.7 0.8 INPUT DC LEVEL (V)
0.9
1.0
FIGURE 19. SLEW RATE vs SUPPLY VOLTAGE
FIGURE 20. DIFFERENTIAL GAIN
0.45 0.40 0.35 0.30 PHASE () 0.25 0.20 0.15 0.10 0.05 0 0.3 0.4 0.5 0.6 0.7 INPUT DC LEVEL RL = 150 VAC = 40mV FREQ = 3.58MHz VDD = +3.3V AV = +2 0.8 0.9 1.0 NOISE FLOOR (nV/ ROOT Hz)
300
250
200
150
100
50
0 0.01M
0.10M 1.00M FREQUENCY (Hz)
10.0M
FIGURE 21. DIFFERENTIAL PHASE
FIGURE 22. UNWEIGHTED NOISE FLOOR
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1 0.9 POWER DISSIPATION (W) POWER DISSIPATION (W) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 85 100 125 150 462mW
WLCSP (3x3 BUMP) JA=216C/W
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.4 1.2 952mW 1
WLCSP (3x3 BUMP)
0.8 0.6 0.4 0.2 0 0 25 50
JA=105C/W
75 85
100
125
150
AMBIENT TEMPERATURE (C)
AMBIENT TEMPERATURE (C)
FIGURE 23. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 24. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
8
FN6432.1 April 4, 2007
ISL59123 Application Information
The ISL59123 is a single-supply rail-to-rail triple video lowpass filter and amplifier with a -3dB bandwidth of 18MHz. It provides anti-aliasing for component, s-video, and composite video signals. Its small size and low power make the ISL59123 ideal for portable video applications. Where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature JA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or: for sourcing use Equation 2:
V OUT PD MAX = V S x I SMAX + ( V S - V OUT ) x --------------R
L
The Sallen Key Low Pass Filter
The Sallen Key is a classic low pass configuration. This provides a very stable low pass function, and in the case of the ISL59123, a three-pole roll-off at 18MHz. The three-pole function is accomplished with an RC low pass network placed in series with and before the Sallen Key. The first pole is formed by an RC network (including the impedance of the source driving the ISL59123), with poles two and three generated by a Sallen Key, creating a three-pole roll-off characteristic at 18MHz.
(EQ. 2)
for sinking use Equation 3:
PD MAX = V S x I SMAX + ( V OUT - V S ) x I LOAD (EQ. 3)
Output Coupling
The ISL59123 can be AC or DC coupled to its output. When AC coupled, a 220F coupling capacitor is recommended to ensure that low frequencies are passed, preventing video "tilt" or "droop" across a line.
Where: VS = Supply voltage ISMAX = Maximum quiescent supply current VOUT = Maximum output voltage of the application RLOAD = Load resistance tied to ground ILOAD = Load current
Output Drive Capability
The ISL59123 does not have internal short circuit protection circuitry. If the output is shorted indefinitely, the power dissipation could easily overheat the die or the current could eventually compromise metal integrity. Maximum reliability is maintained if the output current never exceeds 40mA. This limit is set by the design of the internal metal interconnect. Note that for transient short circuits, the part is robust. Short circuit protection can be provided externally with a back match resistor in series with the output placed close as possible to the output pin. In video applications this would be a 75 resistor and will provide adequate short circuit protection to the device. Care should still be taken not to stress the device with a short at the output.
Power Supply Bypassing Printed Circuit Board Layout
As with any modern operational amplifier, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, a single 4.7F tantalum capacitor in parallel with a 0.1F ceramic capacitor from VDD to GND will suffice.
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should be kept to minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance.
Power Dissipation
With the high output drive capability of the ISL59123, it is possible to exceed the +125C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for an application to determine if load conditions or package types need to be modified to assure operation of the amplifier in a safe operating area. The maximum power dissipation allowed in a package is determined according to Equation 1:
T JMAX - T AMAX PD MAX = ------------------------------------------- JA (EQ. 1)
9
FN6432.1 April 4, 2007
ISL59123 Wafer Level Chip Scale Package (WLCSP)
E
W3x3.9B
3x3 ARRAY 9 BALL WAFER LEVEL CHIP SCALE PACKAGE (Intersil Standard) SYMBOL A MILLIMETERS 0.54 Min, 0.65 Max 0.24 0.03 0.355 0.03 0.32 0.03 0.30 REF. 1.45 0.05 1.00 BASIC 1.45 0.05 1.00 BASIC 0.50 BASIC 0.00 BASIC 9 NOTES 3 Rev. 0 6/06
PIN A1 ID AREA D
A1 A2 b bb D
TOP VIEW
bb
D1 E E1
A2
A A1 b SIDE VIEW
e SD N
NOTES: 1. Dimensions are in Millimeters. 2. Dimensioning and tolerancing conform to ASME 14.5M-1994. 3. Symbol "N" is the actual number of solder balls. 4. Reference JEDEC MO-211-C, variation DD.
SD D1
E1 C B A 1 2 3 b
BOTTOM VIEW
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 10
FN6432.1 April 4, 2007


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