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 74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
Rev. 01 -- 25 August 2006 Product data sheet
1. General description
The 74AUP2G80 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74AUP2G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The input pin D must be stable one setup time prior to the LOW-to-HIGH clock transition for predictable operation.
2. Features
s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114-D Class 3A exceeds 5000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101-C exceeds 1000 V s Low static power consumption; ICC = 0.9 A (maximum) s Latch-up performance exceeds 100 mA per JESD 78 Class II s Inputs accept voltages up to 3.6 V s Low noise overshoot and undershoot < 10 % of VCC s IOFF circuitry provides partial Power-down mode operation s Multiple package options s Specified from -40 C to +85 C and -40 C to +125 C
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
3. Ordering information
Table 1. Ordering information Package Temperature range Name 74AUP2G80DC 74AUP2G80GT 74AUP2G80GM -40 C to +125 C -40 C to +125 C -40 C to +125 C VSSOP8 XSON8 XQFN8 Description Version plastic very thin shrink small outline package; 8 leads; SOT765-1 body width 2.3 mm plastic extremely thin small outline package; no leads; SOT833-1 8 terminals; body 1 x 1.95 x 0.5 mm plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1.6 x 0.5 mm SOT902-1 Type number
4. Marking
Table 2. Marking Marking code p80 p80 p80 Type number 74AUP2G80DC 74AUP2G80GT 74AUP2G80GM
5. Functional diagram
2 1 6 5
1D 1Q 1CP 2D 2Q 2CP 3 6 5
001aaf306
7
2 1
D CP
7
D CP
3
001aaf307
Fig 1. Logic symbol
Fig 2. IEC logic symbol
CP
C C C C
D
TG C
TG C
Q
C
C
TG
TG
C
C
mna651
Fig 3. Logic diagram (one flip-flop)
74AUP2G80_1 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
2 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
6. Pinning information
6.1 Pinning
74AUP2G80
1CP 1D 2Q GND 1 2 3 4
001aaf308
8 7 6 5
VCC 1Q 2D 2CP
Fig 4. Pin configuration SOT765-1 (VSSOP8)
74AUP2G80 74AUP2G80
1CP 1 8 VCC terminal 1 index area 1Q 1 VCC 8
7
1CP
1D
2
7
1Q
2D
2
6
1D
2Q
3
6
2D 2CP 3 4 5 2Q
GND
GND
4
5
2CP
001aaf310
001aaf309
Transparent top view
Transparent top view
Fig 5. Pin configuration SOT833-1 (XSON8)
Fig 6. Pin configuration SOT902-1 (XQFN8)
6.2 Pin description
Table 3. Symbol 1CP 1D 2Q GND 2CP 2D 1Q VCC Pin description Pin SOT765-1/SOT833-1 1 2 3 4 5 6 7 8 SOT902-1 7 6 5 4 3 2 1 8 clock pulse input data input data output ground (0 V) clock pulse input data input data output supply voltage Description
74AUP2G80_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
3 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
7. Functional description
Table 4. Input nCP L
[1]
Function table[1] Output nD L H X nQ H L q
H = HIGH voltage level; L = LOW voltage level; = LOW-to-HIGH CP transition; X = don't care; q = lower case letter indicates the state of referenced input, one setup time prior to the LOW-to-HIGH CP transition.
8. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK VI IOK VO IO ICC IGND Tstg Ptot
[1] [2]
Parameter supply voltage input clamping current input voltage output clamping current output voltage output current supply current ground current storage temperature total power dissipation
Conditions VI < 0 V
[1]
Min -0.5 -0.5 [1]
Max +4.6 -50 +4.6 50 +4.6 20 +50 -50 +150 250
Unit V mA V mA V mA mA mA C mW
VO > VCC or VO < 0 V Active mode and Power-down mode VO = 0 V to VCC
-0.5 -65
Tamb = -40 C to +125 C
[2]
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For VSSOP8 packages: above 110 C the value of Ptot derates linearly with 8.0 mW/K. For XSON8 and XQFN8 packages: above 45 C the value of Ptot derates linearly with 2.4 mW/K.
9. Recommended operating conditions
Table 6. Symbol VCC VI VO Tamb t/V Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature input transition rise and fall rate VCC = 0.8 V to 3.6 V Active mode Power-down mode; VCC = 0 V Conditions Min 0.8 0 0 0 -40 0 Max 3.6 3.6 VCC 3.6 +125 200 Unit V V V V C ns/V
74AUP2G80_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
4 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
10. Static characteristics
Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 C VIH HIGH-level input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-level input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VOH HIGH-level output voltage VI = VIH or VIL IO = -20 A; VCC = 0.8 V to 3.6 V IO = -1.1 mA; VCC = 1.1 V IO = -1.7 mA; VCC = 1.4 V IO = -1.9 mA; VCC = 1.65 V IO = -2.3 mA; VCC = 2.3 V IO = -3.1 mA; VCC = 2.3 V IO = -2.7 mA; VCC = 3.0 V IO = -4.0 mA; VCC = 3.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V II IOFF IOFF ICC ICC CI CO input leakage current power-off leakage current additional power-off leakage current supply current additional supply current input capacitance output capacitance VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V VCC = 0 V to 3.6 V; VI = GND or VCC VO = GND; VCC = 0 V
[1]
Conditions
Min
Typ
Max -
Unit V V V V
0.70 x VCC 0.65 x VCC 1.6 2.0 VCC - 0.1 1.11 1.32 2.05 1.9 2.72 2.6 0.6 1.3
0.30 x VCC V 0.35 x VCC V 0.7 0.9 0.1 0.3 x VCC 0.31 0.31 0.31 0.44 0.31 0.44 0.1 0.2 0.2 0.5 40 V V V V V V V V V V V V V V V V V V A A A A A pF pF
0.75 x VCC -
74AUP2G80_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
5 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
Table 7. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = -40 C to +85 C VIH HIGH-level input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-level input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VOH HIGH-level output voltage VI = VIH or VIL IO = -20 A; VCC = 0.8 V to 3.6 V IO = -1.1 mA; VCC = 1.1 V IO = -1.7 mA; VCC = 1.4 V IO = -1.9 mA; VCC = 1.65 V IO = -2.3 mA; VCC = 2.3 V IO = -3.1 mA; VCC = 2.3 V IO = -2.7 mA; VCC = 3.0 V IO = -4.0 mA; VCC = 3.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V II IOFF IOFF ICC ICC input leakage current power-off leakage current additional power-off leakage current supply current additional supply current VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V
[1]
Conditions
Min
Typ
Max -
Unit V V V V
0.70 x VCC 0.65 x VCC 1.6 2.0 VCC - 0.1 0.7 x VCC 1.03 1.30 1.97 1.85 2.67 2.55 -
0.30 x VCC V 0.35 x VCC V 0.7 0.9 0.1 0.3 x VCC 0.37 0.35 0.33 0.45 0.33 0.45 0.5 0.5 0.6 0.9 50 V V V V V V V V V V V V V V V V V V A A A A A
74AUP2G80_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
6 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
Table 7. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = -40 C to +125 C VIH HIGH-level input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-level input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VOH HIGH-level output voltage VI = VIH or VIL IO = -20 A; VCC = 0.8 V to 3.6 V IO = -1.1 mA; VCC = 1.1 V IO = -1.7 mA; VCC = 1.4 V IO = -1.9 mA; VCC = 1.65 V IO = -2.3 mA; VCC = 2.3 V IO = -3.1 mA; VCC = 2.3 V IO = -2.7 mA; VCC = 3.0 V IO = -4.0 mA; VCC = 3.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V II IOFF IOFF ICC ICC input leakage current power-off leakage current additional power-off leakage current supply current additional supply current VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V
[1]
Conditions
Min
Typ
Max -
Unit V V V V
0.75 x VCC 0.70 x VCC 1.6 2.0 -
0.25 x VCC V 0.30 x VCC V 0.7 0.9 0.11 0.41 0.39 0.36 0.50 0.36 0.50 0.75 0.75 0.75 1.4 75 V V V V V V V V V V V V V V V V V A A A A A
VCC - 0.11 0.6 x VCC 0.93 1.17 1.77 1.67 2.40 2.30 -
0.33 x VCC V
[1]
One input at VCC - 0.6 V, other input at VCC or GND.
74AUP2G80_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
7 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
11. Dynamic characteristics
Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V; for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 5 pF tpd propagation nCP to nQ; see Figure 7 delay VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fmax maximum frequency nCP; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V CL = 10 pF tpd propagation nCP to nQ; see Figure 7 delay VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fmax maximum frequency nCP; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 52 192 324 421 486 550 150 280 310 370 410 150 230 250 360 360 MHz MHz MHz MHz MHz MHz
[2] [2]
25 C Typ[1] Max
-40 C to +125 C Min Max Min Max (85 C) (85 C) (125 C) (125 C)
Unit
2.9 1.9 1.7 1.4 1.2 -
20.9 6.0 4.2 3.4 2.6 2.2 53 203 347 435 550 619
12.9 7.6 5.9 4.3 3.6 -
2.6 2.0 1.6 1.2 1.0 170 310 400 490 550
14.3 8.9 7.0 5.6 4.4 -
2.6 2.0 1.6 1.2 1.0 170 300 390 480 510
15.7 9.8 7.7 6.2 4.8 -
ns ns ns ns ns ns MHz MHz MHz MHz MHz MHz
3.3 2.6 2.3 1.9 1.8
24.6 6.9 4.8 3.9 3.1 2.7
14.9 8.8 6.8 5.1 4.4
3.0 2.3 2.0 1.7 1.4
16.5 10.3 8.1 6.3 4.9
3.0 2.3 2.0 1.7 1.4
18.2 11.3 8.9 6.9 5.4
ns ns ns ns ns ns
74AUP2G80_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
8 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
Table 8. Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V; for test circuit see Figure 9. Symbol Parameter Conditions Min CL = 15 pF tpd propagation nCP to nQ; see Figure 7 delay VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fmax maximum frequency nCP; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V CL = 30 pF tpd propagation nCP to nQ; see Figure 7 delay VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fmax maximum frequency nCP; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V CL = 5 pF, 10 pF, 15 pF and 30pF tsu(H) setup time HIGH nD to nCP; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V
74AUP2G80_1
25 C Typ[1] Max
-40 C to +125 C Min Max Min Max (85 C) (85 C) (125 C) (125 C)
Unit
[2]
3.0 3.0 2.6 2.2 1.9 [2]
28.2 7.6 5.3 4.4 3.5 3.1 50 181 301 407 422 481
16.7 9.8 7.6 5.7 5.0 -
3.4 2.6 2.3 2.0 1.8 120 190 240 300 320
18.6 11.5 9.1 6.9 5.5 -
3.4 2.6 2.3 2.0 1.8 120 160 190 270 300
20.5 12.7 10.0 7.6 6.1 -
ns ns ns ns ns ns MHz MHz MHz MHz MHz MHz
4.9 4.0 3.5 3.1 2.9 -
38.8 9.8 6.8 5.6 4.5 4.1 28 128 206 262 269 309
20.7 12.7 9.9 7.5 6.4 -
4.4 3.5 2.2 2.8 2.7 70 120 150 190 200
24.7 15.0 11.9 9.3 7.5 -
4.4 3.5 2.2 2.8 2.7 70 110 120 170 190
27.2 16.5 13.1 10.2 8.3 -
ns ns ns ns ns ns MHz MHz MHz MHz MHz MHz
-
2.5 0.5 0.3 0.3 0.2 0.2
-
2.4 1.2 0.8 0.6 0.4
-
2.4 1.2 0.8 0.6 0.4
-
ns ns ns ns ns ns
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
9 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
Table 8. Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V; for test circuit see Figure 9. Symbol Parameter Conditions Min tsu(L) setup time LOW nD to nCP; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V th hold time nD to nCP; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V tW pulse width nCP HIGH or LOW; see Figure 8 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V CPD power f = 1 MHz; VI = GND to VCC dissipation VCC = 0.8 V capacitance VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V
[1] [2] [3] All typical values are measured at nominal VCC. tpd is the same as tPLH and tPHL CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs.
[3]
25 C Typ[1] Max
-40 C to +125 C Min Max Min Max (85 C) (85 C) (125 C) (125 C) 2.0 1.3 1.1 0.8 0.7 0 0 0 0 0 2.0 1.3 1.1 0.8 0.7 0 0 0 0 0 -
Unit
-
1.7 0.3 0.2 0.2 0.3 0.3 -2.1 -0.4 -0.3 -0.2 -0.2 -0.3
-
ns ns ns ns ns ns ns ns ns ns ns ns
-
5.2 1.0 0.8 0.6 0.5 0.5 1.8 1.8 1.9 2.0 2.4 2.9
-
3.0 2.0 2.0 2.0 2.0 -
-
3.0 2.0 2.0 2.0 2.0 -
-
ns ns ns ns ns ns pF pF pF pF pF pF
74AUP2G80_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
10 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
12. Waveforms
VI nD input GND VI nCP input GND tPLH VOH nQ output VOL VM VM
001aaf311
VM
VM
tPHL
Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 7. The clock input (nCP) to output (nQ) propagation delays
VI nD input GND th tsu(L) 1/fmax VI nCP input GND tW tPLH VOH nQ output VOL VM
001aaf312
VM
th tsu(H)
VM
tPHL
Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 8. The clock input (nCP) to output (nQ) propagation delays, clock pulse width, nD to nCP setup and hold times and the nCP maximum frequency Table 9. VCC 0.8 V to 3.6 V Measurement points Output VM 0.5 x VCC Input VM 0.5 x VCC VI VCC tr = tf 3.0 ns
Supply voltage
74AUP2G80_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
11 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
VCC
VEXT
5 k
PULSE GENERATOR
VI
VO
DUT
RT CL RL
001aac521
Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times.
Fig 9. Load circuitry for switching times Table 10. VCC 0.8 V to 3.6 V
[1]
Test data Load CL RL[1] 5 pF, 10 pF, 15 pF and 30 pF 5 k or 1 M VEXT tPLH, tPHL open tPZH, tPHZ GND tPZL, tPLZ 2 x VCC
Supply voltage
For measuring enable and disable times RL = 5 k, for measuring propagation delays, setup and hold times and pulse width RL = 1 M.
74AUP2G80_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
12 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
13. Package outline
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1
D
E
A X
c y HE vMA
Z
8
5
Q A pin 1 index A2 A1 (A3) Lp L
1
e bp
4
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1 A1 0.15 0.00 A2 0.85 0.60 A3 0.12 bp 0.27 0.17 c 0.23 0.08 D(1) 2.1 1.9 E(2) 2.4 2.2 e 0.5 HE 3.2 3.0 L 0.4 Lp 0.40 0.15 Q 0.21 0.19 v 0.2 w 0.13 y 0.1 Z(1) 0.4 0.1 8 0
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 REFERENCES IEC JEDEC MO-187 JEITA EUROPEAN PROJECTION
ISSUE DATE 02-06-07
Fig 10. Package outline SOT765-1 (VSSOP8)
74AUP2G80_1 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
13 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
SOT833-1
1
2
3
b 4 4x L
(2)
L1
e
8 e1
7 e1
6 e1
5
8x
(2)
A
A1 D
E
terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A (1) max 0.5 A1 max 0.04 b 0.25 0.17 D 2.0 1.9 E 1.05 0.95 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm
Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT833-1 REFERENCES IEC --JEDEC MO-252 JEITA --EUROPEAN PROJECTION ISSUE DATE 04-07-22 04-11-09
Fig 11. Package outline SOT833-1 (XSON8)
74AUP2G80_1 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
14 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
XQFN8: plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1.6 x 0.5 mm
SOT902-1
D terminal 1 index area
B
A
E
A A1
detail X
L1 L
e
4
e v M C A B w M C
5
C y1 C y
3
metal area not for soldering
2 6
b
e1
e1
7 1
terminal 1 index area
8
X
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max 0.5 A1 0.05 0.00 b 0.25 0.15 D 1.65 1.55 E 1.65 1.55 e 0.55 e1 0.5 L 0.35 0.25 L1 0.15 0.05 v 0.1 w 0.05 y 0.05 y1 0.05
OUTLINE VERSION SOT902-1
REFERENCES IEC --JEDEC MO-255 JEITA ---
EUROPEAN PROJECTION
ISSUE DATE 05-11-16 05-11-25
Fig 12. Package outline SOT902-1 (XQFN8)
74AUP2G80_1 (c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
15 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
14. Abbreviations
Table 11. Acronym CDM CMOS DUT ESD HBM MM TTL Abbreviations Description Charged Device Model Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic
15. Revision history
Table 12. Revision history Release date 20060825 Data sheet status Product data sheet Change notice Supersedes Document ID 74AUP2G80_1
74AUP2G80_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
16 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
16. Legal information
16.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.semiconductors.philips.com.
16.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Philips Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Philips Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of a Philips Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Philips Semiconductors accepts no liability for inclusion and/or use of Philips Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- Philips Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.semiconductors.philips.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by Philips Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
16.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, Philips Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- Philips Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- Philips Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
17. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
74AUP2G80_1
(c) Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 -- 25 August 2006
17 of 18
Philips Semiconductors
74AUP2G80
Low-power dual D-type flip-flop; positive-edge trigger
18. Contents
1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) Koninklijke Philips Electronics N.V. 2006.
All rights reserved.
For more information, please visit: http://www.semiconductors.philips.com. For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com. Date of release: 25 August 2006 Document identifier: 74AUP2G80_1


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