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STM6315
Open Drain Microprocessor Reset
PRELIMINARY DATA
Features Summary
GUARANTEED RST ASSERTION DOWN TO VCC = 1.0V (-40C to 85C) OPEN-DRAIN RST OUTPUT CAN EXCEED VCC 1.8% RESET THRESHOLD ACCURACY (25C) POWER SUPPLY TRANSIENT IMMUNITY LOW SUPPLY CURRENT - 5A (typ) OPERATING TEMPERATURE: -40C TO 125C AVAILABLE IN SOT143-4 PACKAGE SOT143-4 (W1)

December 2005
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Rev 1.0 1/22
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STM6315
Contents
1 2 Summary Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 2.2 2.3 2.4 Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Manual Reset Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Negative-Going VCC Transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Valid RST Output Down to VCC = 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 4 5 6 7 8
Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Maximum Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 DC and AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Package Mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Part Numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
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STM6315
List of Figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Logic Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 SOT143-4 Connections (Top View) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Reset Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Manual Reset Timing Diagram, Switch Bounce/Debounce . . . . . . . . . . . . . . . . . . . . . . . . . 8 Supply Current vs. Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Supply Current vs. Temperature (No load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 RST Output Voltage vs. Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 VCC-to-Reset Delay vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Normalized Reset Time-out Period vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Normalized Reset Threshold vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Max. Transient Duration NOT Causing Reset Pulse vs. Reset Threshold Overdrive. . . . . 12 AC Testing Input/Output Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 SOT143-4 - 4-lead Small Outline Transistor Package Outline. . . . . . . . . . . . . . . . . . . . . . 18
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STM6315
List of Tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 DC and AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SOT143-4 - 4-lead Small Outline Transistor Package Mechanical Data . . . . . . . . . . . . . . 18 Ordering Information Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Marking Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Document Revison History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
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STM6315
1 Summary Description
1
Summary Description
The STM6315 Microprocessor Reset Circuit is a low power supervisory device used to monitor power supplies. It performs a single function: asserting a reset signal whenever the VCC supply voltage drops below a preset value and keeping it asserted until VCC has risen above the preset threshold for a minimum period of time (trec). It also provides a manual reset input (MR). The open drain RST output can be pulled up to a voltage higher than VCC, but less than 6V. The STM6315 comes with standard factory-trimmed reset thresholds of 2.63V, 2.93V, 3.08V, 4.38V, and 4.63V. The STM6315 is available in the SOT143-4 package. Figure 1. Logic Diagram
VCC
MR
STM6315
RST
VSS
Table 1. Signal Names
Symbol VCC MR RST VSS Supply Voltage Manual Reset Input Active-low Open Drain Reset Output Ground
AI11162
Description
Figure 2.
SOT143-4 Connections (Top View)
VSS RST
1 2
4 3
VCC MR
AI11163
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1 Summary Description
STM6315
Figure 3.
Block Diagram
VCC COMPARE trec Generator DEBOUNCE
AI11164
VRST
RST
MR
Figure 4.
Hardware Hookup
VCC VCC VCC
10k
STM6315
MCU
MR Manual Reset
RST(1)
RESET Input VSS
VSS
AI11165
1. Open drain RST output requires external pull-up resistor.
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STM6315
2 Operation
2
2.1
Operation
Reset Output
The STM6315 Microprocessor Reset Circuit has an active-low, open drain reset output. This output structure will sink current when RST is asserted. Connect a pull-up resistor from RST to any supply voltage up to 6V (see Figure 4 on page 6). Select a resistor value large enough to register a logic low, and small enough to register a logic high while supplying all input current and leakage paths connected to the reset output line. A 10k pull-up is sufficient in most applications. The STM6315 asserts a reset signal to the MCU whenever VCC goes below the reset threshold (VRST), or when the manual reset input (MR) is taken low (see Figure 5 and Figure 6 on page 8). RST is guaranteed valid down to VCC = 1.0V (-40C to +85C). During power-up, (once VCC exceeds the reset threshold) an internal timer keeps RST low for the reset time-out period, trec. After this interval, RST returns high. If VCC drops below the reset threshold, RST goes low. Each time RST is asserted, it stays low for at least the reset time-out period. Any time VCC goes below the reset threshold, the internal timer clears. The reset timer starts when VCC returns above the reset threshold.
2.2
Manual Reset Input
A logic low on MR asserts RST. RST remains asserted while MR is low, and for trec after it returns high. The MR input has an internal pull-up resistor 63k (typ), allowing it to be left open if not used. This input can be driven with TTL/CMOS-logic levels or with open drain/collector outputs. Connect a standard open push-button switch from MR to VSS to create a manual reset function (see Figure 4 on page 6); external debounce circuitry is not required. If the device is used in a noisy environment, connect a 0.1F capacitor from MR to VSS to provide additional noise immunity.
2.3
Negative-Going VCC Transients
The STM6315 is relatively immune to negative-going VCC transients (glitches). Figure 13 on page 12 shows typical transient duration versus reset comparator overdrive (for which the STM6315 will NOT generate a reset pulse). The graph was generated using a negative pulse applied to VCC, starting at 0.5V above the actual reset threshold and ending below it by the magnitude indicated (Reset Threshold Overdrive). The graph indicates the maximum pulse width a negative VCC transient can have without causing a reset pulse. As the magnitude of the transient increases (further below the threshold), the maximum allowable pulse width decreases. Any combination of duration and overdrive which lies under the curve will NOT generate a reset signal (see Figure 13). A 0.1F bypass capacitor mounted as close as possible to the VCC pin provides additional transient immunity.
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2 Operation
STM6315
2.4
Valid RST Output Down to VCC = 0V
When VCC falls below 1V, the RST output no longer sinks current, but becomes an open circuit. In most systems this is not a problem, as most MCUs do not operate below 1V. However, in applications where RST output must be valid down to 0V, a pull-down resistor may be added to hold the RST output low. This resistor must be large enough to not load the RST output, and still be small enough to pull the output to Ground. A 100K resistor is recommended.
Figure 5.
Reset Timing Diagram
VRST
VCC
RST
VCC (min)
trec
AI11166
Figure 6.
Manual Reset Timing Diagram, Switch Bounce/Debounce
MR Glitch Rejection
MR MR Input Pulse Width RST trec MR-to-RST Delay
AI11167b
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STM6315
3 Typical Operating Characteristics
3
Typical Operating Characteristics
Note: Typical values are at TA = 25C.
Figure 7.
6
Supply Current vs. Supply Voltage
5
Supply Current, ICC (A)
4
3
2
1
0 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
AI11871
Supply Voltage, VCC (V)
Figure 8.
7 6
Supply Current vs. Temperature (No load)
Supply Current, ICC (A)
5 4 3 VCC = 1.8V 2 VCC = 3V VCC = 5V 1 0 -40
-20
0
20
40
60
80
100
120
AI11872
Temperature, TA (C)
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3 Typical Operating Characteristics
STM6315
Figure 9.
0.20
RST Output Voltage vs. Output Current
0.16
Output Voltage (V)
0.12
0.08
0.04
0.00 0 3 6 9 12
AI11873
Output Current (mA)
Figure 10. VCC-to-Reset Delay vs. Temperature
8.8 8.6
VCC-to-RST Delay, tRD (s)
8.4 8.2 8.0 7.8 7.6 7.4 7.2 7.0 -40
-20
0
20
40
60
80
100
120
AI11874
Temperature, TA (C)
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STM6315
Figure 11. Normalized Reset Time-out Period vs. Temperature
1.140
3 Typical Operating Characteristics
Normalized Reset Time-out Period, trec/trec (typ) (-)
1.120 1.100 1.080 1.060 1.040 1.020 1.000 0.980 -40
-20
0
20
40
60
80
100
120
AI11875
Temperature, TA (C)
Figure 12. Normalized Reset Threshold vs. Temperature
1.0100
Normalized Reset Threshold, VTH/VTH (typ) (-)
1.0050
1.0000
0.9950
0.9900 -40
-20
0
20
40
60
80
100
120
AI11876
Temperature, TA (C)
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3 Typical Operating Characteristics
STM6315
Figure 13. Max. Transient Duration NOT Causing Reset Pulse vs. Reset Threshold Overdrive
100 90 80
Transient Duration (s)
70 60 50 40 30 20 10 0 1 10 100 1000
AI11877
Reset Threshold Overdrive (mV)
Note:
Reset occurs above the curve.
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STM6315
4 Maximum Rating
4
Maximum Rating
Stressing the device above the rating listed in the "Absolute Maximum Ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 2.
Symbol
Absolute Maximum Ratings
Parameter Operating Temperature Range Value -40 to 125 -55 to 150 260 -0.3 to VCC + 0.3 -0.3 to 7.0 20 320 Unit C C C V V mA mW
TSTG TSLD(1) VIO VCC IO PD
Storage Temperature (VCC Off) Lead Solder Temperature for 10 seconds Input or Output Voltage Supply Voltage Output Current Power Dissipation
1. Reflow at peak temperature of 260C (total thermal budget not to exceed 245C for greater than 30 seconds).
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5 DC and AC Parameters
STM6315
5
DC and AC Parameters
This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics Tables that follow are derived from tests performed under the Measurement Conditions summarized in Table 3, Operating and AC Measurement Conditions. Designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. Table 3. Operating and AC Measurement Conditions
Parameter STM6315 1.0 to 5.5 -40 to +125 Unit V C ns V V
VCC Supply Voltage Ambient Operating Temperature (TA) Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Reference Voltages Figure 14. AC Testing Input/Output Waveforms
~5
0.2 to 0.8VCC 0.3 to 0.7VCC
0.8VCC
0.7VCC 0.3VCC
AI02568
0.2VCC
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STM6315
Table 4.
Sym VCC
5 DC and AC Parameters
DC and AC Characteristics
Alternative Description Operating Voltage Test Condition(1) TA = -40 to +85C VCC = 5.5V, No load TA = -40 to +85C VCC = 5.5V, No load TA = -40 to +125C VCC = 3.6V, No load TA = -40 to +85C VCC = 3.6V, No load TA = -40 to +125C VCC > 4.25V, ISINK = 3.2mA 4 Min 1.0 5 Typ Max 5.5 12 Unit V A
15
A
ICC
VCC Supply Current
10
A
12 0.4 0.3 0.3 1
A V V V A
VOL
RST Output Voltage
VCC > 2.5V, ISINK = 1.2mA VCC > 1.0V, ISINK = 80A
RST Output Open Drain Leakage Current Reset Thresholds
VCC > VRST, RST not asserted
VCC falling; TA = 25C VRST Reset Threshold VCC falling; TA = -40 to 85C VCC falling; TA = -40 to 125C VCC falling from tRD VCC-to-RST Delay (VRST + 100mV) to (VRST - 200mV) @ 10mV/s STM6315xAxxxx TA = -40 to +85C TA = -40 to +125C TA = -40 to +85C TA = -40 to +125C TA = -40 to +85C TA = -40 to +125C TA = -40 to +85C TA = -40 to +125C
VRST x 0.982 VRST x 0.975 VRST x 0.965
2.63 2.93 3.08 4.38 4.63
VRST x 1.018 VRST x 1.025 VRST x 1.035
V V V
35
s
1 1.5 0.8 20 30 16 140 210 112 1120 1680 896 60
2 2.4 40 48 280 336 2240 2688
ms ms ms ms ms ms ms ms ppm/ C
STM6315xBxxxx trec RST Pulse Width STM6315xDxxxx
STM6315xGxxxx Reset Threshold Temperature Coefficient
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5 DC and AC Parameters
STM6315
Sym
Alternative
Description
Test Condition(1)
Min
Typ
Max
Unit
Manual Reset Input VIL MR Low Input Threshold VRST > 4.0V VRST < 4.0V VRST > 4.0V VRST < 4.0V 1 100 500 32 63 100 0.8 0.3V CC 2.4 0.7VCC V V V V s ns ns k
VIH
MR Low Input Threshold MR Input Pulse Width MR Glitch Rejection MR-to-RST Delay MR Pull-up Resistance
1. Valid for Ambient Operating Temperature: TA = -40 to 125C; VCC = 2.5V to 5.5V (except where noted).
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STM6315
6 Package Mechanical
6
Package Mechanical
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
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6 Package Mechanical
STM6315
Figure 15. SOT143-4 - 4-lead Small Outline Transistor Package Outline
E E1
B 0.15
M
CAB
A1
1
e1
e/2 e D
0.15
M
CAB
b2
0.20
M
CAB A
4X
C 0.10 C
A2 A
3X b C
L1 L
SOT143-4z(1)
C
Drawing is not to scale.
Table 5.
Symbol
SOT143-4 - 4-lead Small Outline Transistor Package Mechanical Data
mm Typ Min 0.89 0.01 0.88 0.37 0.76 0.09 2.80 2.10 1.20 - - - 0.40 0 4 Max 1.12 0.10 1.02 0.51 0.94 0.18 3.04 2.64 1.40 - - - 0.60 10 Typ - - - - - - - - - 0.076 0.008 0.022 - inches Min 0.035 0.001 0.035 0.015 0.030 0.004 0.110 0.083 0.047 - - - 0.016 0 4 Max 0.044 0.004 0.042 0.020 0.037 0.007 0.120 0.104 0.055 - - - 0.024 10
A A1 A2 b b2 C D E E1 e e1 L L1 N
- - - - - - - - - 1.92 0.20 0.55 -
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STM6315
7 Part Numbering
7
Table 6.
Example:
Part Numbering
Ordering Information Scheme
STM6315 T B W1 3 F
Device Type STM6315 Reset Threshold Voltage L = VRST = 4.63V M = VRST = 4.38V T = VRST = 3.08V S = VRST = 2.93V R = VRST = 2.63V RST Pulse Width A = trec = 1.5ms B = trec = 30ms D = trec = 210ms G = trec = 1680ms Package W1 = SOT143-4 Temperature Range 3 = -40 to 125C Shipping Method F = ECOPACK Package, Tape & Reel
Note:
For other options, or for more information on any aspect of this device, please contact the ST Sales Office nearest you.
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7 Part Numbering
STM6315
Table 7.
Marking Description
Reset Threshold 4.63 4.38 3.08 2.93 2.63 4.63 4.38 3.08 2.93 2.63 4.63 4.38 3.08 2.93 2.63 4.63 4.38 3.08 2.93 2.63 RST Pulse Width 1.5 1.5 1.5 1.5 1.5 30 30 30 30 30 210 210 210 210 210 1680 1680 1680 1680 1680 Output Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Open-drain RST Topside Marking 9LAx 9MAx 9TAx 9SAx 9RAx 9LBx 9MBx 9TBx 9SBx 9RBx 9LDx 9MDx 9TDx 9SDx 9RDx 9LGx 9MGx 9TGx 9SGx 9RGx
Part Number STM6315LA STM6315MA STM6315TA STM6315SA STM6315RA STM6315LB STM6315MB STM6315TB STM6315SB STM6315RB STM6315LD STM6315MD STM6315TD STM6315SD STM6315RD STM6315LG STM6315MG STM6315TG STM6315SG STM6315RG
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STM6315
8 Revision History
8
Revision History
Table 8. Document Revison History
Date 14-November-2005 Revision 1.0 Description First edition
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8 Revision History
STM6315
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
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