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FEATURES 6 (Max) On Resistance 0.8 (Max) On-Resistance Flatness 2.7 V to 5.5 V Single Supply 2.7 V to 5.5 V Dual Supply Rail-to-Rail Operation 8-Lead SOT-23 Package, 8-Lead Micro-SOIC Package Typical Power Consumption (<0.1 W) TTL/CMOS Compatible Inputs APPLICATIONS Automatic Test Equipment Power Routing Communication Systems Data Acquisition Systems Sample and Hold Systems Avionics Relay Replacement Battery-Powered Systems
4
CMOS 5 V/+5 V Single SPDT Switches ADG619/ADG620
ADG619/ADG620
S2 S1 D
FUNCTIONAL BLOCK DIAGRAM
IN
SWITCHES SHOWN FOR A LOGIC "1" INPUT
GENERAL DESCRIPTION
Table I. Truth Table for the ADG619/ADG620
The ADG619 and the ADG620 are monolithic, CMOS SPDT (single pole, double throw) switches. Each switch conducts equally well in both directions when on. The ADG619/ADG620 offers low On-Resistance of 4 , which is matched to within 0.7 between channels. These switches also provide low power dissipation yet give high switching speeds.The ADG619 exhibits break-before-make switching action, thus preventing momentary shorting when switching channels. The ADG620 exhibits make-before-break action. The ADG619/ADG620 are available in 8-lead SOT-23 packages and 8-lead Micro-SOIC packages.
IN 0 1
Switch S1 ON OFF
Switch S2 OFF ON
PRODUCT HIGHLIGHTS
1. Low On Resistance (RON) (4 typ) 2. Dual 2.7 V to 5.5 V or Single 2.7 V to 5.5 V 3. Low Power Dissipation. CMOS construction ensures low power dissipation. 4. Fast tON/tOFF 5. Tiny 8-Lead SOT-23 Package and 8-Lead Micro-SOIC Package
REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2001
ADG619/ADG620-SPECIFICATIONS
DUAL SUPPLY1 (V
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS ADG619 tON tOFF Break-Before-Make Time Delay, tBBM ADG620 tON tOFF Make-Before-Break Time Delay, tMBB Charge Injection Off Isolation Channel-to-Channel Crosstalk Bandwidth -3 dB CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD ISS
2
DD =
+5 V
10%, VSS = -5 V
10%, GND = 0 V. All specifications -40 C to +85 C unless otherwise noted.)
B Version -40 C to +85 C VSS to VDD
+25 C
Unit V typ max typ max typ max nA typ nA max nA typ nA max V min V max A typ A max pF typ
Test Conditions/Comments VDD = +4.5 V, VSS = -4.5 V VS = 4.5 V, IS = -10 mA, Test Circuit 1 VS = 4.5 V, IS = -10 mA VS = 3.3 V, IS = -10 mA VDD = +5.5 V, VSS = -5.5 V VS = 4.5 V, VD = 4.5 V, Test Circuit 2 VS = VD = 4.5 V, Test Circuit 3
4 6 0.7 1.1 0.7
8
1.35 0.8 1.2
0.01 0.25 0.01 0.25
1 1 2.4 0.8
0.005 0.1 2
VIN = VINL or VINH
80 120 45 75 40
155 90 10
ns typ ns max ns typ ns max ns typ ns min ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ A typ A max A typ A max
RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF VS1 = VS2 = 3.3 V, Test Circuit 5 RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF VS = 0 V, Test Circuit 6 VS = 0 V, RS = 0 , CL = 1 nF, Test Circuit 7 RL = 50 , CL = 5 pF, f = 1 MHz, Test Circuit 8 RL = 50 , CL = 5 pF, f = 1 MHz, Test Circuit 10 RL = 50 , CL = 5 pF, Test Circuit 9 f = 1 MHz f = 1 MHz VDD = +5.5 V, VSS = -5.5 V Digital Inputs = 0 V or 5.5 V Digital Inputs = 0 V or 5.5 V
40 65 200 330 160 110 -67 -67 190 25 95 0.001
85 400 10
1.0 0.001 1.0
NOTES 1 Temperature ranges are as follows: B Version, -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
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ADG619/ADG620 SINGLE SUPPLY1
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 ADG619 tON tOFF Break-Before-Make Time Delay, tBBM ADG620 tON tOFF Make-Before-Break Time Delay, tMBB Charge Injection Off Isolation Channel-to-Channel Crosstalk Bandwidth -3 dB CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD
(VDD = +5 V
10%, VSS = 0 V, GND = 0 V. All specifications -40 C to +85 C unless otherwise noted.)
B Version -40 C to +25 C +85 C 0 V to VDD 7 10 0.8 1 0.5 12.5 1.2 0.5 0.8
Unit V typ max typ max typ max nA typ nA max nA typ nA max V min V max A typ A max pF typ
Test Conditions/Comments VDD = 4.5 V, VSS = 0 V VS = 0 V to 4.5 V, IS = -10 mA, Test Circuit 1 VS = 0 V to 4.5 V, IS = -10 mA VS = 1.5 V to 3.3 V, IS = -10 mA VDD = 5.5 V VS = 1 V/4.5 V, VD = 4.5 V/1 V, Test Circuit 2 VS = VD = 1 V/4.5 V, Test Circuit 3
0.01 0.25 0.01 0.25
1 1 2.4 0.8
0.005 0.1 2
VIN = VINL or VINH
120 220 50 75 70
280 110 10
ns typ ns max ns typ ns max ns typ ns min ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ A typ A max
RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF, VS1 = VS2 = 3.3 V, Test Circuit 5 RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 6 VS = 0 V, RS = 0 , CL = 1 nF, Test Circuit 7 RL = 50 , CL = 5 pF, f = 1 MHz, Test Circuit 8 RL = 50 , CL = 5 pF, f = 1 MHz, Test Circuit 10 RL = 50 , CL = 5 pF, Test Circuit 9 f = 1 MHz f = 1 MHz VDD = 5.5 V Digital Inputs = 0 V or 5.5 V
50 85 210 340 170 6 -67 -67 190 25 95 0.001
110 420 10
1.0
NOTES 1 Temperature ranges are as follows: B Version, -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
REV. 0
-3-
ADG619/ADG620
ABSOLUTE MAXIMUM RATINGS 1
(TA = 25C unless otherwise noted)
PIN CONFIGURATIONS 8-Lead SOT-23 (RT-8)
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6.5 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to -6.5 V Analog Inputs2 . . . . . . . . . . . . . . . . VSS -0.3 V to VDD +0.3 V Digital Inputs2 . . . . . . . . . . . . . . . . . -0.3 V to VDD +0.3 V or 30 mA, Whichever Occurs First Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA (Pulsed at 1 ms, 10% Duty Cycle max) Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 50 mA Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150C Micro-SOIC Package JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 206C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 44C/W SOT-23 Package JA Thermal Impedance . . . . . . . . . . . . . . . . . . 229.6C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . 91.99C/W Lead Temperature, Soldering (10 seconds) . . . . . . . . . 300C IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . 220C
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given.
D1 S1 2 GND
3
8
S2 VSS IN
ADG619/ ADG620
7 6
TOP VIEW VDD 4 (Not to Scale) 5 NC NC = NO CONNECT
8-Lead Micro-SOIC (RM-8)
D1 S1 2 GND
3
8 S2
6 IN TOP VIEW VDD 4 (Not to Scale) 5 NC
ADG619/ ADG620
7
VSS
NC = NO CONNECT
ORDERING GUIDE
Model ADG619BRM ADG619BRT ADG620BRM ADG620BRT
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Branding Information* SVB SVB SWB SWB
Package Description Micro-SOIC (microSmall Outline IC) SOT-23 (Plastic Surface Mount) Micro-SOIC (microSmall Outline IC) SOT-23 (Plastic Surface Mount)
Package Option RM-8 RT-8 RM-8 RT-8
*Branding on SOT-23 and Micro-SOIC packages is limited to three characters due to space constraints.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG619/ADG620 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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ADG619/ADG620
TERMINOLOGY
Mnemonic V DD VSS GND IDD ISS S D IN RON DRON RFLAT(ON) IS (OFF) ID, IS (ON) VD (VS) VINL VINH IINL(IINH) CS (OFF) CD, CS (ON) tON tOFF tMBB t BBM Charge Injection Crosstalk Off Isolation Bandwidth Insertion Loss
Description Most Positive Power Supply Potential Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be tied to ground at the device. Ground (0 V) Reference Positive Supply Current Negative Supply Current Source Terminal. May be an input or output. Drain Terminal. May be an input or output. Logic Control Input Ohmic Resistance Between D and S On Resistance Match Between Any Two Channels, i.e., RON Max - RON Min. Flatness is Defined as the Difference Between the Maximum and Minimum Value of On Resistance as Measured Over the Specified Analog Signal Range. Source Leakage Current With the Switch "OFF" Channel Leakage Current With the Switch "ON" Analog Voltage on Terminals D, S Maximum Input Voltage for Logic "0" Minimum Input Voltage for Logic "1" Input Current of the Digital Input "OFF" Switch Source Capacitance "ON" Switch Capacitance Delay Between Applying the Digital Control Input and the Output Switching On Delay Between Applying the Digital Control Input and the Output Switching Off "ON" Time, Measured Between the 80% Points of Both Switches, When Switching From One Address State to Another "OFF" Time or "ON" Time Measured Between the 90% Points of Both Switches, When Switching from One Address State to Another A Measure of the Glitch Impulse Transfered From the Digital Input to the Analog Output During Switching A Measure of Unwanted Signal that is Coupled Through From One Channel to Another as a Result of Parasitic Capacitance A Measure of Unwanted Signal Coupling Through an "OFF" Switch The Frequency Response of the "ON" Switch The Loss Due to the ON Resistance of the Switch
Typical Performance Characteristics
8 VDD, VSS = 7 6 VDD, VSS = 3V
ON RESISTANCE -
18 2.5V 16 14 12 10 8 6 4
VDD = 2.7V VDD = 3V
6 TA = 25 C VSS = 0V 5 TA = +85 C TA = +25 C TA = -40 C 2 1 VDD = +5V VSS = -5V
ON RESISTANCE -
5 4 3 2 1 TA = 25 C -3 -2 -1 0 1 VD, VS - V 2 3 4 5 VDD, VSS = VDD, VSS = 4.5V 3.3V VDD, VSS = 5V
VDD = 3.3V VDD = 4.5V VDD = 5V
ON RESISTANCE -
5
4
3
2 0 0 1 3 2 VD, VS - V 4
0 -5 -4
0 -5 -4 -3 -2
1 -1 0 VD, VS - V
2
3
4
5
TPC 1. On Resistance vs. VD (VS) - Dual Supply
TPC 2. On Resistance vs. VD (VS) - Single Supply
TPC 3. On Resistance vs. VD (VS) for Different Temperatures - Dual Supply
REV. 0
-5-
ADG619/ADG620-Typical Performance Characteristics
10 9
LEAKAGE CURRENTS - nA
0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 ID, I S (ON) VDD = +5V VSS = -5V VD = 4.5V VS = 4.5V
0.5 0.4 VDD = 5V VSS = 0V VD = 4.5V/1V VS = 1V/4.5V ID, I S (ON)
ON RESISTANCE -
7 6 5 4 3 2 1 0 0 1 VDD = 5V VSS = 0V
TA = +85 C TA = +25 C TA = -40 C
IS (OFF)
LEAKAGE CURRENTS - nA
8
0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4
IS (OFF)
3 2 VD, VS - V
4
5
-0.5
0
10
20
30 40 50 60 TEMPERATURE - C
70
80 0
-0.5
0
10
20
30 40 50 60 TEMPERATURE - C
70
80 0
TPC 4. On Resistance vs. VD (VS) for Different Temperatures - Single Supply
TPC 5. Leakage Currents vs. Temperature - Dual Supply
TPC 6. Leakage Currents vs. Temperature - Single Supply
250 TA = 25 C
180 160
-10 -20
CHARGE INJECTION - pC
200 VDD VSS 150 +5V -5V
TIME - ns
140 120 100 80 60 40 20 tOFF tON
VDD VSS
5V 0V VDD VSS +5V -5V
ALTERNATION - dB
-30 -40 -50 -60 -70 -80 VDD = +5V VSS = -5V TA = 25 C 1 10 FREQUENCY - MHz 100
100 VDD VSS 50 5V 0V
VDD VSS -20
5V 0V
VDD VSS
+5V -5V 80
-90 -100 0.03
0 -5 -4 -3
-2
-1
01 VS - V
2
3
4
5
0 -40
0 20 40 60 TEMPERATURE - C
TPC 7. Charge Injection vs. Source Voltage
TPC 8. tON/tOFF Times vs. Temperature
TPC 9. Off Isolation vs. Frequency
-10 -20
ATTENUATION - dB
0 -2 VDD = +5V VSS = -5V TA = 25 C
-30 -40 -50 -60 -70 -80 0.2 VDD = +5V VSS = -5V TA = 25 C 1 10 FREQUENCY - MHz 100
ATTENUATION - dB
-4 -6 -8 -10 -12
0.2
1
10 100 FREQUENCY - MHz
1000
TPC 10. Crosstalk vs. Frequency
TPC 11. On Response vs. Frequency
-6-
REV. 0
ADG619/ADG620
TEST CIRCUITS
IDS
V1 S VS D
VS IS (OFF) S D VD ID (OFF)
ID (ON) NC S D A VD
RON = V1/I DS
Test Circuit 1. On Resistance
VDD VSS 0.1 F VDD VSS S VS IN GND D
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
0.1 F
VIN RL 300 VOUT CL 35pF VOUT
50% 90%
50% 90%
t ON
t OFF
Test Circuit 4. Switching Times
VDD VSS 0.1 F 0.1 F VDD VSS D S2 IN VIN GND D2 RL2 300 CL2 35pF VOUT VIN 50% 90% 0V 90% 50%
VS1 VS2
S1
0V
VOUT
t BBM
t BBM
Test Circuit 5. Break-Before-Make Time Delay, tBBM (ADG619 Only)
0.1 F
VDD VSS
0.1 F
VDD VSS VD IN VIN GND VS1 RL2 300 CL2 35pF RL1 300 CL1 35pF
VS1 VIN 0V VS1 80%VD VS2 50% 80%VD 50%
t MBB
Test Circuit 6. Make-Before-Break Time Delay, tMBB (ADG620 Only)
VDD VDD RS VS D
VSS
VSS S CL 1nF GND VOUT
VIN S2 VOUT VOUT QINJ = CL VOUT
VOUT
IN
S1
Test Circuit 7. Charge Injection
REV. 0
-7-
ADG619/ADG620
VDD 0.1 F VSS 0.1 F NETWORK ANALYZER
NETWORK ANALYZER VOUT R 50 0.1 F VDD VSS 0.1 F
VDD S IN D VIN GND
VSS
VDD S1 S2
VSS
50 50 VS VOUT RL 50
D
50 VS
IN GND
OFF ISOLATION = 20 LOG
VOUT VS
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
VOUT VS
Test Circuit 8. Off Isolation
Test Circuit 10. Channel-to-Channel Crosstalk
VDD 0.1 F
VSS 0.1 F NETWORK ANALYZER
VDD S IN D VIN GND
VSS
50 VS VOUT RL 50
INSERTION LOSS = 20 LOG
VOUT WITH SWITCH VS WITHOUT SWITCH
Test Circuit 9. Bandwidth
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Micro-SOIC Package (RM-8)
0.122 (3.10) 0.114 (2.90)
8-Lead Plastic Surface Mount Package (RT-8)
0.122 (3.10) 0.110 (2.80)
0.122 (3.10) 0.114 (2.90)
1 4
0.199 (5.05) 0.187 (4.75)
8
7
6
5
0.071 (1.80) 0.059 (1.50)
1 2 3 4
PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) SEATING 0.008 (0.20) PLANE 0.043 (1.09) 0.037 (0.94) 0.011 (0.28) 0.003 (0.08) 0.120 (3.05) 0.112 (2.84) 33 27
PIN 1 0.077 (1.95) BSC 0.051 (1.30) 0.035 (0.90) 0.026 (0.65) BSC
0.028 (0.71) 0.016 (0.41)
0.057 (1.45) 0.035 (0.90) 10 0
0.006 (0.15) 0.000 (0.00)
0.015 (0.38) 0.009 (0.22)
SEATING PLANE
0.009 (0.23) 0.003 (0.08)
0.022 (0.55) 0.014 (0.35)
-8-
REV. 0
PRINTED IN U.S.A.
8
5
C02617-.8-10/01(0)
R 50

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