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STB40NF03L
N-CHANNEL 30V - 0.020 - 40A D2PAK STripFETTM POWER MOSFET
TYPE STB40NF03L
s s
VDSS 30 V
RDS(on) <0.022
ID 40 A
TYPICAL RDS(on) = 0.020 LOW THRESHOLD DRIVE
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DESCRIPTION This Power Mosfet is the latest development of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
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D2PAK TO-263 (suffix"T4")
ADD SUFFIX "T4" FOR ORDERING IN TAPE & REEL
INTERNAL SCHEMATIC DIAGRAM APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SOLENOID AND RELAY DRIVERS s MOTOR CONTROL, AUDIO AMPLIFIERS s DC-DC & DC-AC CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM(*) Ptot EAS (1) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Single Pulse Avalanche Energy Storage Temperature Max. Operating Junction Temperature Value 30 30 20 40 28 160 70 0.46 250 -60 to 175 175
(1) Starting TJ = 25 oC, ID = 20A, VDD = 15V
Unit V V V A A A W W/C m/J C C 1/8
(*)Pulse width limited by safe operating area.
December 2000
STB40NF03L
THERMAL DATA
Rthj-case Rthj-amb Tj Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max Max 2.1 62.5 300 C/W C/W C
ELECTRICAL CHARACTERISTICS (Tcase = 25 C unless otherwise specified) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A VGS = 0 Min. 30 1 10 100 Typ. Max. Unit V A A nA
VDS = Max Rating VDS = Max Rating TC = 125 C VGS = 20 V
ON (*)
Symbol VGS(th) IDS(on) ID(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance On State Drain Current Test Conditions VDS = VGS VGS = 10 V VGS = 4.5 V ID = 250 A ID = 20 A ID = 20 A 40 Min. 1 Typ. 1.7 0.018 0.028 Max. 2.5 0.022 0.035 Unit V A
VDS > ID(on) x RDS(on)max VGS = 10 V
DYNAMIC
Symbol gfs
(*)
Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitances
Test Conditions VDS>ID(on) x RDS(on)max ID=20A VDS = 25V f = 1 MHz VGS = 0
Min.
Typ. 20 830 230 92
Max.
Unit S pF pF pF
Ciss Coss Crss
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STB40NF03L
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Test Conditions Min. Typ. 35 205 18 7 8 23 Max. Unit ns ns nC nC nC Turn-on Delay Time Rise Time VDD = 15 V ID = 20 A VGS = 4.5 V RG = 4.7 (Resistive Load, see fig.3) Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=24V ID=40A VGS=5V
SWITCHING OFF
Symbol td(off) tf td(off) tf tc Parameter turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 15 V ID = 20 A VGS = 4.5 V RG = 4.7 (Resistive Load, see fig.3) Vclamp = 24 V ID = 20 A RG = 4.7 VGS = 4.5 V (Inductive Load, see fig.5) Min. Typ. 90 240 150 155 340 Max. Unit ns ns ns ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (*) VSD (*) trr Qrr Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 40 A VGS = 0 65 72 2 Test Conditions Min. Typ. Max. 40 160 1.5 Unit A A V ns nC A
IRRM
ISD = 40 A di/dt = 100 A/s VDD = 15 V Tj = 150 C (see test circuit, Figure 5)
(*)Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. (*)Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedance
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STB40NF03L
Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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STB40NF03L
Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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STB40NF03L
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STB40NF03L
D2PAK MECHANICAL DATA
DIM. A A1 A2 B B2 C C2 D D1 E E1 G L L2 L3 M R V2
mm. MIN. 4.4 2.49 0.03 0.7 1.14 0.45 1.23 8.95 8 10 8.5 4.88 15 1.27 1.4 2.4 0.4 0 8 5.28 15.85 1.4 1.75 3.2 0.192 0.590 0.050 0.055 0.094 10.4 0.393 TYP MAX. 4.6 2.69 0.23 0.93 1.7 0.6 1.36 9.35 MIN. 0.173 0.098 0.001 0.027 0.044 0.017 0.048 0.352
inch TYP. MAX. 0.181 0.106 0.009 0.036 0.067 0.023 0.053 0.368 0.315 0.334 0.208 0.625 0.055 0.068 0.126 0.015
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STB40NF03L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics (c) 2000 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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