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PD - 96917
DirectFET Power MOSFET
Typical values (unless otherwise specified)
l l l l l l l l
IRF6619
Low Profile (<0.7 mm) VDSS VGS RDS(on) RDS(on) Dual Sided Cooling Compatible 20V max 20V max 1.65m@ 10V 2.2m@ 4.5V Ultra Low Package Inductance Qg tot Qgd Qgs2 Qrr Qoss Vgs(th) Optimized for High Frequency Switching above 1MHz Ideal for CPU Core DC-DC Converters 38nC 13nC 3.5nC 18nC 22nC 2.0V Optimized for Sync. FET socket of Sync. Buck Converter Low Conduction Losses Compatible with existing Surface Mount Techniques MX
MX
DirectFET ISOMETRIC
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details) SQ SX ST MQ MX MT
Description
The IRF6619 combines the latest HEXFET(R) Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, IMPROVING previous best thermal resistance by 80%. The IRF6619 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6619 has been optimized for parameters that are critical in synchronous buck operating from 12 volt buss converters including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF6619 offers particularly low Rds(on) and high Cdv/dt immunity for synchronous FET applications.
Absolute Maximum Ratings
Parameter
VDS VGS ID @ TA = 25C ID @ TA = 70C ID @ TC = 25C IDM EAS (Thermally limited) IAR EAR
6.0
Typical R DS (on) (m)
Max.
20 20 30 24 150 240 240 See Fig. 14, 15, 17a, 17b,
VGS, Gate-to-Source Voltage (V)
Units
V
Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS Continuous Drain Current, VGS Continuous Drain Current, VGS @ 10V
Pulsed Drain Current Single Pulse Avalanche Energy Avalanche CurrentAe Repetitive Avalanche Energy
e
h @ 10V h @ 10V kA(Package Limited) f
12 10 8 6 4 2 0 0 20 ID= 16A
A
mJ A mJ
e
5.0 4.0 3.0 2.0 1.0 2.0 TJ = 25C TJ = 125C
ID = 30A
VDS = 16V VDS= 10V
4.0 6.0 8.0 VGS, Gate-to-Source Voltage (V)
10.0
40
60
80
100
Notes:
Fig 1. Typical On-Resistance Vs. Gate Voltage
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25C, L = 0.86mH, RG = 25, IAS = Surface mounted on 1 in. square Cu board, steady state. TC measured with thermocouple mounted to top (Drain) of part.
24A, VGS =10V. Part not recommended for use above this value.
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2/10/05
IRF6619
Static @ TJ = 25C (unless otherwise specified)
Parameter
BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min.
20 --- --- --- 1.55 --- --- --- --- --- 89 --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. Max. Units
--- 14 1.65 2.2 --- -5.8 --- --- --- --- --- 38 10.2 3.5 13.2 11.1 16.7 22 --- 21 71 25 9.3 5040 1580 780 --- --- 2.2 3.0 2.45 --- 1.0 150 100 -100 --- 57 --- --- --- --- --- --- 2.3 --- --- --- --- --- --- --- pF VGS = 0V VDS = 10V = 1.0MHz ns nC
Conditions
VGS = 0V, ID = 250A VGS = 10V, ID = 30A g VGS = 4.5V, ID = 24A g VDS = VGS, ID = 250A VDS = 16V, VGS = 0V VDS = 16V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VDS = 10V, ID = 24A VDS = 10V
V m V mV/C A nA S
mV/C Reference to 25C, ID = 1mA
nC
VGS = 4.5V ID = 16A See Fig. 17 VDS = 10V, VGS = 0V VDD = 16V, VGS = 4.5V g ID = 24A Clamped Inductive Load
Diode Characteristics
Parameter
IS ISM VSD trr Qrr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) e --- --- --- 0.8 29 18 1.0 44 27 V ns nC Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge --- --- 240
Min.
---
Typ. Max. Units
--- 30 A
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 24A, VGS = 0V g TJ = 25C, IF = 24A di/dt = 100A/s g
Notes:
Repetitive rating; pulse width limited by max. junction temperature. Pulse width 400s; duty cycle 2%.
2
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IRF6619
Absolute Maximum Ratings
PD @TA = 25C PD @TA = 70C PD @TC = 25C TP TJ TSTG
h Power Dissipation h Power Dissipation k
Power Dissipation Operating Junction and
Parameter
Max.
2.8 1.8 89 270 -40 to + 150
Units
W
Peak Soldering Temperature Storage Temperature Range
C
Thermal Resistance
RJA RJA RJA RJC RJ-PCB
hl Junction-to-Ambient il Junction-to-Ambient jl Junction-to-Case kl
Junction-to-Ambient Linear Derating Factor
100
Parameter
Typ.
--- 12.5 20 --- 1.0 0.017
Max.
45 --- --- 1.4 ---
Units
C/W
Junction-to-PCB Mounted
hA
W/C
10
Thermal Response ( Z thJA )
1
D = 0.50 0.20 0.10 0.05 0.02 0.01
J R1 R1 J 1 2 R2 R2 R3 R3 3 R4 R4 C 2 3 4 4
0.1
Ri (C/W)
0.6784 17.299 17.566 9.4701
i (sec)
0.00086 0.57756 8.94 106
0.01
1
Ci= i/Ri Ci i/Ri
0.001
SINGLE PULSE ( THERMAL RESPONSE )
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc
0.001 0.01 0.1 1 10 100
0.0001 1E-006 1E-005 0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Surface mounted on 1 in. square Cu board, steady state. Used double sided cooling , mounting pad. Mounted on minimum footprint full size board with metalized
back and with small clip heatsink. Notes:
TC measured with thermocouple incontact with top (Drain) of part. R is measured at TJ of approximately 90C.
Surface mounted on 1 in. square Cu board (still air).
Mounted to a PCB with a thin gap filler and heat sink. (still air)
Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air)
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IRF6619
1000
TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
1000
TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V
100
BOTTOM
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
BOTTOM
10
10
2.5V
1
2.5V 60s PULSE WIDTH Tj = 25C
60s PULSE WIDTH Tj = 150C
1 0.1 1 10
0.1 0.1 1 10
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
100.0
1.5
Fig 5. Typical Output Characteristics
ID = 30A
ID, Drain-to-Source Current()
Typical R DS(on) (Normalized)
TJ = 150C TJ = 25C
10.0
VGS = 10V
TJ = -40C
1.0
1.0
VDS = 10V
0.1 1.5 2.0 2.5 3.0
60s PULSE WIDTH
3.5 4.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 6. Typical Transfer Characteristics
8000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd
Fig 7. Normalized On-Resistance vs. Temperature
10 9 8
(m)
TA= 25C
VGS = 3.0V
6000
Coss = Cds + Cgd
VGS = 3.5V VGS = 4.0V VGS = 4.5V VGS = 5.0V VGS = 10V
C, Capacitance (pF)
DS(on) Typical R
10 100
Ciss
4000
7 6 5 4 3 2 1
2000
Coss Crss
0 1
0
40
80
120
160
200
VDS , Drain-to-Source Voltage (V)
ID, Drain Current (A)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
Fig 9. Typical On-Resistance Vs. Drain Current and Gate Voltage
4
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IRF6619
1000.0
ID, Drain-to-Source Current (A)
1000
OPERATION IN THIS AREA LIMITED BY R DS (on) 100sec
ISD , Reverse Drain Current (A)
100.0 TJ = 150C TJ = 25C TJ = -40C
100
10.0
10
1msec 10msec
1.0 VGS = 0V 0.1 0.2 0.6 1.0 1.4 1.8 VSD , Source-to-Drain Voltage (V)
1
TA = 25C Tj = 150C Single Pulse 0.01 0.10 1.00 10.00 100.00
0.1 VDS , Drain-toSource Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
180
VGS(th) Gate threshold Voltage (V)
2.5
Fig11. Maximum Safe Operating Area
160 140
ID , Drain Current (A)
LIMITED BY PACKAGE
2.0
120 100 80 60 40 20 0 25 50 75 100 125 150 TC , Case Temperature (C)
ID = 250A
1.5
1.0
0.5 -75 -50 -25 0 25 50 75 100 125 150
TJ , Junction Temperature ( C )
Fig 12. Maximum Drain Current vs. Case Temperature
1000
Fig 13. Typical Threshold Voltage vs. Junction Temperature
Duty Cycle = Single Pulse
100
Avalanche Current (A)
10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
0.01
1
0.05 0.10
0.1
0.01 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
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IRF6619
300
EAR , Avalanche Energy (mJ)
Single Pulse ID = 24A
200
100
0 25 50 75 100 125 150
Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 17a, 17b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 3) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Starting TJ , Junction Temperature (C)
Fig 15. Maximum Avalanche Energy vs. Temperature
1000
EAS, Single Pulse Avalanche Energy (mJ)
15V
800
12A 15A BOTTOM 24A
TOP
ID
VDS
L
DRIVER
RG
D.U.T
IAS tp
600
20V VGS
+ V - DD
A
0.01
400
Fig 17a. Unclamped Inductive Test Circuit
V(BR)DSS tp
200
0 25 50 75 100 125 150
Starting TJ, Junction Temperature (C)
Fig 16. Maximum Avalanche Energy Vs. Drain Current
Current Regulator Same Type as D.U.T.
I AS
Fig 17b. Unclamped Inductive Waveforms
LD VDS
50K 12V .2F .3F
+
D.U.T. + V - DS
VDD D.U.T
VGS
3mA
VGS Pulse Width < 1s Duty Factor < 0.1%
IG ID
Current Sampling Resistors
Fig 18a. Gate Charge Test Circuit
Vds Vgs Id
Fig 19a. Switching Time Test Circuit
VDS
90%
Vgs(th)
10%
VGS
Qgs1 Qgs2
td(on)
Qgd Qgodr
tr
td(off)
tf
Fig 18b. Gate Charge Waveform
Fig 19b. Switching Time Waveforms
6
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IRF6619
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * di/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage
Body Diode
Forward Drop
Inductor Curent Inductor Current
Ripple 5% ISD
* VGS = 5V for Logic Level Devices Fig 20. Diode Reverse Recovery Test Circuit for N-Channel HEXFET(R) Power MOSFETs
DirectFET Substrate and PCB Layout, MX Outline (Medium Size Can, X-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
VGS This includes all recommendations for stencil and substrate designs.
6 3 5 4 7
1- Drain 2- Drain 3- Source 4- Source 5- Gate 6- Drain 7- Drain
1
2
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IRF6619
DirectFET Outline Dimension, MX Outline (Medium Size Can, X-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC CODE MIN MAX A 6.35 6.25 B 5.05 4.80 C 3.95 3.85 D 0.45 0.35 E 0.72 0.68 F 0.72 0.68 G 1.42 1.38 H 0.84 0.80 J 0.42 0.38 K 0.88 1.01 L 2.28 2.41 M 0.59 0.70 N 0.03 0.08 P 0.08 0.17 IMPERIAL MAX MAX 0.246 0.250 0.189 0.201 0.152 0.156 0.014 0.018 0.027 0.028 0.027 0.028 0.054 0.056 0.032 0.033 0.015 0.017 0.035 0.039 0.090 0.095 0.023 0.028 0.001 0.003 0.003 0.007
DirectFET Part Marking
8
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IRF6619
DirectFET Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6619). For 1000 parts on 7" reel, order IRF6619TR1 REEL DIMENSIONS STANDARD OPTION (QTY 4800) TR1 OPTION (QTY 1000) IMPERIAL IMPERIAL METRIC METRIC MIN MIN MAX MIN MAX MAX 12.992 6.9 N.C 177.77 N.C N.C 0.795 0.75 N.C 19.06 N.C N.C 0.504 0.53 0.50 13.5 0.520 12.8 0.059 0.059 1.5 N.C N.C N.C 3.937 2.31 58.72 N.C N.C N.C N.C N.C N.C 0.53 0.724 13.50 0.488 0.47 11.9 N.C 0.567 12.01 0.469 0.47 11.9 N.C 0.606 12.01
Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.2/05
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