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PRELIMINARY
Z89300/01 CPS DC-4166-00
PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION
Z89300/01
DIGITAL TELEVISION CONTROLLER
GENERAL DESCRIPTION
The Z89300/01 Digital Television Controller is an application- specific controller designed to provide complete audio and video control of television receivers, video recorders, and advanced on-screen display facilities. The Z89301 is the one-time-programmable (OTP) version of the Z89300.The powerful 12 MHz Z89C00 RISC processor core allows the user to control the on-board peripheral functions and registers using the standard processor instruction set. The extensive character attributes can be controlled in two modes: by the on-screen display controller character control mode for maximum display control flexibility, and closed caption mode for optimum display of closed caption text. Closed caption text can be decoded directly from the composite video signal with the assistance of the processor's digital signal processing capabilities and displayed on the screen. The character representation in this mode allows for a simple attribute control through the insertion of control characters, and each word of RAM specifies two displayed characters. The character control mode provides access to the full set of attribute controls. Each word of RAM specifies a single displayed character and basic character attributes, allowing the modification of attributes on a character-by-character basis. The insertion of control characters permits direction of other character attributes. The fully customized 512 character set, formatted in two 256 character banks, can be displayed with a host of display attributes that incude underlining, italics, blinking, eight foreground/background colors, character position offset delay, and background transparency. The 16-bit display character representation allows the modification of some key attributes on a character-by-character basis. A character's pixel array is stored as a 16- or 18-word representation in Character Graphics ROM (CGROM). The ROM contents are referenced by a 16-bit word stored in video RAM (VRAM) defining the character type and its key attributes. Serial interfacing with the television tuner is provided through the tuner serial port. Other serial devices, such as digital channel tunning adjustments, may be accessed through the industry standard I2C port. Additional hardware provides the capability to display two to three times normal size characters. The smoothing logic contained in the on-screen display circuit improves the appearance of larger fonts. Fringing circuitry can be activated to improve the visibiity of text by surrounding the character lines with a one-pixel border. RGB outputs provide the direct video signals, and a blanking output is provided to control the video multiplexor. Dot clock and verticle line synchronization are normally obtained from H_FLYBACK and V_FLYBACK, but can be generated by the Z89300/01 and driven to the external deflection unit through the bidirectional SYNC ports when external video synchronization signals are not present. User control can be monitored through the keypad scanning port, or the 16-bit remote control capture register. Receiver functions such as color and volume can be directly controlled by eight 8-bit pulse width modulated ports. All nine PWM ports are only available in the 52-pin package. Only six 8-bit and one 14-bit PWM output pins are available in the 40-pin package. The Z89300/01 has two internal 12 MHz VCOs that are referenced to a 32 KHz internal oscillator to provide the system clock. In Sleep mode, the controller uses the 32 KHz clock for the system clock to reduce power consumption. The processor can be suspended by placing it into STOP mode when main power is not available for minimal power consumption.
DC-4166-00
(8-3-93)
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PRELIMINARY
Z89300/01 CPS DC-4166-00
GENERAL DESCRIPTION (Continued)
Functional Block Diagram
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PRELIMINARY
Z89300/01 CPS DC-4166-00
Port
PWM9 IRIN Port18 Port19 Port0E Port/ADC2 Port01 Port02 Port03 GND Port04 Port05 Port06 Port07 Port08 Port09 VCC Port10 Port11 Port12 Port13 Port14 Port15 Port16 Port0A Port0B
PWM8 PWM7 PWM6 PWM5 PWM4 PWM3 PWM2 PWM1 ADC3 CVI/ADC0 LPF XTAL2 GND XTAL1 VCC /RESET Port0F/HalfBlnk Port17/ADC1 Blank V1 V2 V3 VSync HSync Port0D Port0C
40-Pin DIP Configuration
52-Pin Shrink DIP Configuration
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PRELIMINARY
Z89300/01 CPS DC-4166-00
PIN DESCRIPTIONS Z89300
Pin Name CVI/ADC0 /RESET ADC3 Port1 [7] /ADC1 PWM9 PWM8 PWM7 PWM6 PWM5 PWM4 PWM3 PWM2 PWM1 Standard Application COMP_VID RESET A/D I/O/B/ PWR I I I B/I O O O O O O O O O Reset Pad Condition Type 1 8 1 4/1 7 7 7 7 7 7 7 7 7
52-Pin 43 37 44 35 1 52 51 50 49 48 47 46 45
40-Pin 34 28 27 1 40 39 38 37 36 35
Description Analog Input Reset Signal Analog Input to A/D
BALANCE/ VST PWMB PWMA TONE VOLUME BRIGHT CONTRAST COLOR TINT
14-Bit PWM General-Purpose PWM B General-Purpose PWM A Tone Control Volume Control Brightness Control Contrast Control Color Control Tint Control Data I/O
PORT0 [8] PORT0 [9] PORT0 [3] PORT0 [2] PORT0 [1]
SER_DATA SER_CLK SER_EN IIC_DATA IIC_CLK
15 16 9 8 7
12 13 7 6 5
B B B B B
O O O
4 4 4 4 4
Serial Data Serial Clock Serial Enable I2C Data I2C Clock Keyscanning Ports
PORT0 [4] PORT0 [5] PORT0 [6] PORT0 [7] PORT1 [6] PORT1 [7] PORT1 [8] PORT1 [9] PORT0 [0] /ADC2 PORT0 [A] PORT0 [B] PORT0 [C]
SCAN_IN0 SCAN_IN1 SCAN_IN2 SCAN_IN3 SCAN_OUT0 SCAN_OUT1 SCAN_OUT2 SCAN_OUT3
11 12 13 14 24 35 3 4 6 25 26 27
8 9 10 11 20 27 3 4 -
B B B B B B B B B/I B B B
I I I I O O O O O O O O
4 4 4 4 4 4 4 4 4 4 4 4 4
Key Scan Input 0 Key Scan Input 1 Key Scan Input 2 Key Scan Input 3 Key Scan Output 0 Key Scan Output 1 Key Scan Output 2 Key Scan Output 3 General-Purpose Control
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PRELIMINARY
Z89300/01 CPS DC-4166-00
PIN DESCRIPTIONS Z89300 (continued)
Pin Name PORT0 [D] PORT0 [E] PORT0 [F] /HalfBlnk PORT1 [0] PORT1 [1] PORT1 [2] PORT1 [3] LED1_PWR LED2_AUD LED3_TMR TV_VCR Standard Application I/O/B/ PWR B B B B B B B Reset Pad Condition Type O O O O O O O 4 4 4 4 4 4 4 Power LED Control Mono/Stereo LED Control Timer On/OFF LED Control TV/Video Switch Control Power & Power Mgmt PORT1 [4] PORT1 [5] VCC GND PWR_CTL PWR_DET + 5 Volts 0 Volts 22 23 17 38 10 40 41 LOOP FILTER RED GREEN BLUE BLANK 39 42 33 32 31 34 18 19 29 31 B B PWR PWR O 4 4 Power On/Off Control Low Power Detect Input Supply Power Digital/Analog Ground Oscillator Oscillator Crystal Terminal 2 Oscillator Crystal Terminal 1 PLL Loop Filter RGB Display Red Display Signal Green Dislay Signal Blue Display Signal RGB Video Multipleor Control Signal Display Synchronization HSYNC VSYNC IRIN H_SYNC V_SYNC REMOTE 29 30 2 21 22 2 B B I I I 4 4 1 Horizontal Synchronization Detect/Source Vertical Synchronization Source Remote Control Capture
52-Pin 28 5 36 18 19 20 21
40-Pin 14 15 16 17
Description
XTAL2 XTAL1 LPF V1 V2 V3 BLANK
32 30 33 25 24 23 26
Analog Analog I O O O O
3 1
6+Analog 6+Analog 6+Analog 3
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PRELIMINARY
Z89300/01 CPS DC-4166-00
V1, V2, V3 ANALOG OUTPUT Specifications VCC = 5.25V
VCC = 5.25V Output Voltage Condition Bit = 11 Bit = 10 Bit = 01 Bit = 00 Settling Time 70% of DC Level, 10pf Load Limit 4.30V +/- 0.25V 3.20V +/- 0.2V 2.10V +/- 0.15V 0.1V +/- 0.1V < 50 nsec
V1, V2, V3 ANALOG OUTPUT Specifications VCC = 4.75V
VCC = 4.75V Output Voltage Condition Bit = 11 Bit = 10 Bit = 01 Bit = 00 Settling Time 70% of DC Level, 10pf Load Limit 3.90V +/- 0.25V 2.90V +/- 0.2V 1.90V +/- 0.15V 0.1V +/- 0.1V < 50 nsec
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PRELIMINARY
Z89300/01 CPS DC-4166-00
DC CHARACTERISTICS TA = 0C to + 70C; VCC = + 4.75 V to + 5.25V
Symbol VIL VIH VHY VPU VOL Parameter Input Voltage Low Input Voltage High TA = 0 to + 70C Min Max 0 0.7 VCC 0.2 VCC VCC 13.2 0.4 0.4 0.4 -80 3.0 3.0 Typical @ 25C 1.48 3.0 0.8 0.16 0.19 0.19 4.75 -46 0.01 0.02 Units V V V V V V V V A A A [2] IOL = 1.00 mA IOL = mA, [1] IOL =0.75 mA, [2] IOH = -0.75 mA VRL = 0 V 0 V, VCC 0 V, VCC Conditions
Schmitt Hysteresis 0.1 VCC Maximum Pull-Up Voltage Output Voltage Low
VOH IIR IIL IOL
Output Voltage High Reset Input Current Input Leakage Tri-State Leakage
VCC -0.4 -3.0 -3.0
[1] Port 0, 1 [2] PWM Open-Drain
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PRELIMINARY
Z89300/01 CPS DC-4166-00
(c) 1993 by Zilog, Inc. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Zilog, Inc. The information in this document is subject to change without notice. Devices sold by Zilog, Inc. are covered by warranty and patent indemnification provisions appearing in Zilog, Inc. Terms and Conditions of Sale only. Zilog, Inc. makes no warranty, express, statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from intellectual property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be responsible for any errors that may appear in this document. Zilog, Inc. makes no commitment to update or keep current the information contained in this document.
Zilog's products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to such intended use is executed between the customer and Zilog prior to use. Life support devices or systems are those which are intended for surgical implantation into the body, or which sustains life whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. Zilog, Inc. 210 East Hacienda Ave. Campbell, CA 95008-6600 Telephone (408) 370-8000 Telex 910-338-7621 FAX 408 370-8056
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