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PRELIMINARY
Features
D D D D D D D D
CMOS for optimum speed/power High speed tAA = 25 ns max. (commercial) tAA = 35 ns max. (military) Low power
275 mW max. Less than 85 mW when deselected Byte wide memory organization 100% reprogrammable in the windowed package EPROM technology Capable of withstanding >2001V static discharge Available in 32 pin PLCC 28 pin TSOP I 28 pin, 600 mil plastic or hermetic DIP 32 pin hermetic LCC
The CY27H512 is a high performance, 512K CMOS EPROM organized in 64 Kbytes. It is available in industry standard 28 pin, 600 mil DIP, 32 pin LCC and PLCC, and 28 pin TSOP I packages. These devices offer high density storage combined with 40 MHz performance. The CY27H512 is available in windowed and opaque packages. Windowed packages al low the device to be erased with UV light for 100% reprogrammability. The CY27H512 is equipped with a power down chip enable (CE) input and output enable (OE). When CE is deasserted, the device powers down to a low power stand by mode. The OE pin three states the out puts without putting the device into stand by mode. While CE offers lower power, OE provides a more rapid transition to and from three stated outputs.
Functional Description
64K x 8 High Speed CMOS EPROM The memory cells utilize proven EPROM
CY27H512
floating gate technology and byte wide in telligent programming algorithms. The EPROM cell requires only 12.75 V for the supervoltage and low programming cur rent allows for gang programming. The de vice allows for each memory location to be tested 100%, because each location is writ ten to, erased, and repeatedly exercised prior to encapsulation. Each device is also tested for AC performance to guarantee that the product will meet DC and AC specification limits after customer pro gramming. The CY27H512 is read by asserting both the CE and the OE inputs. The contents of the memory location selected by the ad dress on inputs A15-A0 will appear at the outputs O7-O0.
Logic Block Diagram
Pin Configurations
DIP
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 POWER DOWN O6 O5 MULTIPLEXER O4 O3 O1 PROGRAMMABLE ARRAY O2 O0 A15 A12 A7 A6 A5 A4 A3 A2 ADDRESS DECODER A1 A0 O0 O1 O2 GND
Top View
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VCC A14 A13 A8 A9 A11 OE/VPP A10 CE O7 O6 O5 O4 O3
LCC/PLCC
O7
[1]
H512 2
Top View
A 15 V CC A 14 A 12 A 13 DU
A15
4 A6 A5 A4 A3 A2 CE OUTPUT ENABLE OE DECODER A1 A0 NC O0 H512 1 5 6 7 8 9 10 11 12 13
A7
3
2
1 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A11 NC OE/VPP A10 CE O7 O6
14 15 16 17 1819 20 GND DU O 1 O 2 O 3 O 4 5
1. For LCC/PLCC only: Pins 1 and 17 are common and tied to the die at tach pad. They should not be used.
Note:
Cypress Semiconductor Corporation
D
3901 North First Street 1
D
San Jose
D
CA 95134
O
H512 3
D
408-943-2600 November 1994
PRELIMINARY
Pin Configurations
CY27H512
(continued)
TSOP Top View T ype 1
OE/VPP A11 A9 A8 A13 A14 VCC A15 A12 A7 A6 A5 A4 A3
22 23 24 25 26 27 28 1 2 3 4 5 6 7
21 20 19 18 17 16 15 14 13 12 11 10 9 8
A10 CE O7 O6 O5 O4 O3 GND O2 O1 O0 A0 A1 A2
H512 4
Selection Guide
27H512-25 27H512-30 27H512-35 27H512-45 27H512-55 27H512-70
Maximum Access Time (ns) CE Access Time (ns) Com'l Mil OE Access Time (ns)
[2]
25 30
30 35
35 35 40
45 45 45 15 20 50 60 15 25
55 55 55 20 20 50 60 15 25
70 70 70 25 25 50 60 15 25
Com'l Mil
12
15
15 20
ICC (mA) Power Supply Current ISB Stand by Current
[3] (mA)
Com'l Mil Com'l Mil
75
75
50 85
15
15
15 25
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature . . . . . . . . . . . . . . . . . . . -65_C to +150_C Ambient Temperature with Power Applied . . . . . . . . . . . . . . . . . . . . . . . . -55_C to +125_C Supply Voltage to Ground Potential . . . . . . . . . -0.5V to +7.0V DC Voltage Applied to Outputs in High Z State . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +5.5V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . -3.0V to +7.0V Transient Input Voltage . . . . . . . . . . . . . . . . . -3.0V for <20 ns DC Program Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.0V
Notes:
UV Erasure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7258 Wsec/cm2 Static Discharge Voltage . . . . . . . . . . . . . . . . . . . . . . . . >2001V (per MIL STD 883, Method 3015) Latch Up Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . >200 mA
Operating Range
Ambient Range Temperature VCC
Commercial Industrial[4] Military[5]
4. 5.
0_C to +70_C -40_C to +85_C -55_C to +125_C
5V 10% 5V 10% 5V 10%
2. 3.
VCC = Max., IOUT = 0 mA, f=10 MHz. VCC = Max., CE = VIH.
Contact a Cypress representative for industrial temperature range specification. TA is the instant on" case temperature.
2
PRELIMINARY
Electrical Characteristics
Over the Operating Range
[6, 7]
CY27H512
27H512-25 27H512-30 Parameter
VOH
27H512-35 Min.
2.4
27H512-45 27H512-55 27H512-70 Min.
2.4
Description
Output HIGH V oltage
Test Conditions
VCC = Min., IOH = -4.0 mA
Min.
2.4
Max.
Max.
Max.
Unit
V
VOL VIH
Output LOW V oltage Input HIGH Level
VCC = Min., IOL = 12.0 mA Guaranteed Input Logical HIGH V oltage for All Inputs 2.0
0.45 VCC+0.5 2.0
0.45 VCC+0.5 2.0
0.45 VCC+0.5
V V
VIL
Input LOW Level
Guaranteed Input Logical LOW V oltage for All Inputs
0.8
0.8
0.8
V
IIX
Input Leakage Current
GND < VIN < VCC
-10
+10
-10
+10
-10
+10
mA mA
mA mA
IOZ
Output Leakage Current
GND < VOUT < VCC, Output Disable VCC=Max., IOUT=0 mA, f=10 MHz Mil Com'l
-10
+10
-10
+10
-10
+10
ICC
Power Supply Current
75
50
50
85
60
ISB
Stand By Current
VCC=Max., CE = VIH
Com'l Mil
15
15 25
15 25
mA mA
Capacitance[7]
Parameter
CIN COUT
Description
Input Capacitance Output Capacitance
Test Conditions
TA = 25_C, f = 1 MHz, VCC = 5.0V
Max.
10
Unit
pF pF
10
Notes:
6. See the last page of this specification for Group A subgroup testing in formation. 7. See Introduction to CMOS PROMs in this Data Book for general in formation on testing.
AC Test Loads and Waveforms
R1 318W 5V OUTPUT R2 30 pF INCLUDING JIG AND SCOPE 197W 5 pF INCLUDING JIG AND SCOPE 5V OUTPUT R2 197W GND < 3 ns < 3 ns 10% 10% R1 318W 3.0V 90% 90% ALL INPUT PULSES
(a)
(b)
H512 5
H512 6
Equivalent to:
THEVENIN EQUIVALENT 121W
OUTPUT
1.91V
3
PRELIMINARY
Switching Characteristics Over the Operating Range
Parameter
tAA tOE tHZOE tCE tHZCE tPU tPD tOH
CY27H512
Description
Address to Output Valid OE Active to Output Valid OE Inactive to High Z CE Active to Output Valid CE Inactive to High Z CE Active to Power Up CE Inactive to Power Down Output Data Hold
27H512-25 27H512-30 27H512-35 27H512-45 27H512-55 27H512-70 Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
25 12 12 30 12 0 30 0 0 0 35 0 30 15 15 35 15 0 40 0 35 15 15 35 15 0 40 0 45 15 15 45 15 0 50 0 55 20 20 55 20 0 60 70 25 25 70 25 ns ns ns ns ns ns ns ns
Switching Waveform
ICC CE OE A0 - A15 O0 -O7 tCE ADDR A tAA DATA A tAA ADDR B tHZOE DATA B tOH tOE DATA B tHZCE
H512 7
tPU
tPD
4
PRELIMINARY
Erasure Characteristics
CY27H512
Wavelengths of light less than 4000 Angstroms begin to erase the CY27H512 in the windowed package. For this reason, an opaque label should be placed over the window if the EPROM is exposed to sunlight or fluorescent lighting for extended periods of time. The recommended dose of ultraviolet light for erasure is a wave length of 2537 Angstroms for a minimum dose (UV intensity mul tiplied by exposure time) of 25 Wsec/cm2. For an ultraviolet lamp with a 12 mW/cm2 power rating, the exposure time would be ap proximately 35 minutes. The CY27H512 needs to be within 1 inch of the lamp during erasure. Permanent damage may result if the
EPROM is exposed to high intensity UV light for an extended pe riod of time. 7258 Wsec/cm2 is the recommended maximum dosage.
Programming Modes
Programming support is available from Cypress as well as from a number of third party software vendors. For detailed program ming information, including a listing of software packages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be obtained from any Cypress representative.
Table 1. Programming Electrical Characteristics
Parameter
Description
Min.
Max.
Unit
VPP IPP VIHP VILP VCCP
Programming Power Supply Programming Supply Current Programming Input Voltage HIGH Programming Input Voltage LOW Programming VCC
12.5
13 50
V mA V V V
3.0 -0.5 6.0
VCC 0.4 6.5
Table 2. Mode Selection
Pin Function Mode CE OE/VPP A0
[8]
Data
A9
Read Output Disable Stand by Program Program Verify Program Inhibit Signature Read (MFG) Signature Read (DEV)
Note:
VIL X VIH VILP VILP VIHP VIL VIL
VIL VIH X VPP VILP VPP VIL VIL
9.
A0 A0 X A0 A0 A0 VIL VIH
A9 A9 X A9 A9 A9 VHV[9] VHV[9]
O7 - O0 High Z High Z D7 - D0 O7 - O0 High Z 34H 1FH
8.
X can be VIL or VIH.
VHV=120.5V
5
PRELIMINARY
T ypical DC and AC Characteristics
NORMALIZED SUPPLY CURRENT vs. CYCLE PERIOD NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE
CY27H512
OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE
1.1
1.7 1.6 1.5
1.25 1.2 1.15 f = 10 MHz TA = 25_C 1.1 1.05 1.0 0.95 0.9 0.85 0.8 4 4.5 5 5.5 6 -100 -50 0 50 100 150 VCC = 5.5V f = 10 MHz
1.0
1.4 1.3
0.9 VCC = 5.5V 0.8 TA = 25_C
1.2 1.1 1.0 0.9 0.8 0.7 0.6
0.7
0.6
0.5 0.0 50 100 150 200 250
0.5
CLOCK PERIOD (ns)
SUPPLY VOLTAGE (V)
AMBIENT TEMPERATURE (_C)
NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE
NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE
OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE
NORMALIZED ACCESS TIME
1.2 1.15 1.1 1.05 1.0 0.95 TA 25_C
NORMALIZED ACCESS TIME
1.4
OUTPUT SINK CURRENT (mA)
1.25
120
1.3 VCC = 4.5V 1.2
100
=
80
VCC = 5.0V TA = 25_C
1.1
60
1.0
40
0.9
0.9 0.85 4 4.5 5 5.5 6
20 0
0.8 -100 -50 0 50 100 150
0.0
1.0
2.0
3.0
4.0
SUPPLY VOLTAGE (V)
AMBIENT TEMPERATURE (_C)
OUTPUT VOLTAGE (V)
OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE
-100 OUTPUT SOURCE CURRENT
-80
-60
-40
-20
0.0 0.0 1.0 2.0 3.0 4.0 5.0
OUTPUT VOLTAGE (V)
H512 8
6
PRELIMINARY
Ordering Information[10]
Speed (ns)
25
CY27H512
Ordering Code
CY27H512-25HC CY27H512-25JC CY27H512-25ZC
Package Name
H65 J65 Z28 H65 J65 P15 W16 Z28 H65 J65 P15 W16 Z28 H65 L55 Q55 H65 J65 P15 W16 Z28 D16 H65 L55 Q55 W16 H65 J65 P15 W16 Z28 D16 H65 L55 Q55 W16
Package Type
32 Pin Windowed Leaded Chip Carrier 32 Lead Plastic Leaded Chip Carrier 28 Lead Thin Small Outline Package 32 Pin Windowed Leaded Chip Carrier 32 Lead Plastic Leaded Chip Carrier 28 Lead (600 Mil) Molded DIP 28 Lead (600 Mil) Windowed CerDIP 28 Lead Thin Small Outline Package 32 Pin Windowed Leaded Chip Carrier 32 Lead Plastic Leaded Chip Carrier 28 Lead (600 Mil) Molded DIP 28 Lead (600 Mil) Windowed CerDIP 28 Lead Thin Small Outline Package 32 Pin Windowed Leaded Chip Carrier 32 Pin Rectangular Leadless Chip Carrier 32 Pin Windowed Rectangular Leadless Chip Carrier 32 Pin Windowed Leaded Chip Carrier 32 Lead Plastic Leaded Chip Carrier 28 Lead (600 Mil) Molded DIP 28 Lead (600 Mil) Windowed CerDIP 28 Lead Thin Small Outline Package 28 Lead (600 Mil) CerDIP 32 Pin Windowed Leaded Chip Carrier 32 Pin Rectangular Leadless Chip Carrier 32 Pin Windowed Rectangular Leadless Chip Carrier 28 Lead (600 Mil) Windowed CerDIP 32 Pin Windowed Leaded Chip Carrier 32 Lead Plastic Leaded Chip Carrier 28 Lead (600 Mil) Molded DIP 28 Lead (600 Mil) Windowed CerDIP 28 Lead Thin Small Outline Package 28 Lead (600 Mil) CerDIP 32 Pin Windowed Leaded Chip Carrier 32 Pin Rectangular Leadless Chip Carrier 32 Pin Windowed Rectangular Leadless Chip Carrier 28 Lead (600 Mil) Windowed CerDIP
Operating Range
Commercial
30
CY27H512-30HC CY27H512-30JC CY27H512-30PC CY27H512-30WC CY27H512-30ZC
Commercial
35
CY27H512-35HC CY27H512-35JC CY27H512-35PC CY27H512-35WC CY27H512-35ZC CY27H512-35HMB CY27H512-35LMB CY27H512-35QMB
Commercial
Military
45
CY27H512-45HC CY27H512-45JC CY27H512-45PC CY27H512-45WC CY27H512-45ZC CY27H512-45DMB CY27H512-45HMB CY27H512-45LMB CY27H512-45QMB CY27H512-45WMB
Commercial
Military
55
CY27H512-55HC CY27H512-55JC CY27H512-55PC CY27H512-55WC CY27H512-55ZC CY27H512-55DMB CY27H512-55HMB CY27H512-55LMB CY27H512-55QMB CY27H512-55WMB
Commercial
Military
Notes: 10. Most of the above products are available in industrial temperature range. Contact a Cypress representative for specifications and prod uct availability.
7
PRELIMINARY
Ordering Information[10]
Speed (ns) Ordering Code
CY27H512
(continued)
Package Name
70
CY27H512-70HC CY27H512-70JC CY27H512-70PC CY27H512-70WC CY27H512-70ZC CY27H512-70DMB CY27H512-70HMB CY27H512-70LMB CY27H512-70QMB CY27H512-70WMB
H65 J65 P15 W16 Z28 D16 H65 L55 Q55 W16
32 Pin Windowed Leaded Chip Carrier Commercial 32 Lead Plastic Leaded Chip Carrier 28 Lead (600 Mil) Molded DIP 28 Lead (600 Mil) Windowed CerDIP 28 Lead Thin Small Outline Package 28 Lead (600 Mil) CerDIP Military 32 Pin Windowed Leaded Chip Carrier 32 Pin Rectangular Leadless Chip Carrier 32 Pin Windowed Rectangular Leadless Chip Carrier 28 Lead (600 Mil) Windowed CerDIP
Package Type
Operating Range
MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics
Parameter Subgroups
VOH VOL VIH VIL IIX IOZ ICC ISB
Parameter
1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3
Subgroups
Switching Characteristics
tAA tOE tCE Document #: 38-00422
7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11
8
PRELIMINARY
Package Diagrams (continued)
28 Lead (600 Mil) CerDIP D16
MIL-STD-1835 D-10 Config. A
CY27H512
32 Lead Plastic Leaded Chip Carrier J65
32 Pin Rectangular Leadless Chip Carrier L55
MIL-STD-1835 C-12
32 Pin Windowed Rectangular Leadless Chip Carrier Q55
MIL-STD-1835 C-12
9
PRELIMINARY
Package Diagrams
32 Pin Windowed Leaded Chip Carrier H65
CY27H512
28 Lead (600 Mil) Molded DIP P15
10
PRELIMINARY
Package Diagrams
28 Lead (600 Mil) Windowed CerDIP W16
CY27H512
MIL-STD-1835 D-10 Config. A
28 Lead Thin Small Outline Package Z28
E
Cypress Semiconductor Corporation, 1994. The information contained herein is subject to change without notice.
Cypress Semiconductor Corporation assumes no responsibility for
the use of any circuitry other than circuitry embodied in a Cypress Semiconductor Corporation product. Nor does it convey or imply any license under patent or other rights. Cypress Semicon ductor does not authorize its products for use as critical components in life support systems where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life support systems applications implies that the manufacturer assumes all risk of such use and in so doing indemnifies Cypress Semiconductor against all damages.
11

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