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 ICX422AL
Diagonal 11mm (Type 2/3) CCD Image Sensor for EIA B/W Video Cameras
Description The ICX422AL is an interline CCD solid-state image sensor suitable for EIA B/W video cameras with a diagonal 11mm (Type 2/3) system. Compared with the current product ICX082AL, basic characteristics such as sensitivity and smear are improved drastically and high saturation characteristics are realized. This chip features a field period readout system and an electronic shutter with variable charge-storage time. This chip is compatible with the pins of the ICX082AL and has the same drive conditions. Features * High sensitivity (+3.0dB compared with the ICX082AL) * Low smear (-10.0dB compared with the ICX082AL) * High saturation signal (+2.0dB compared with the ICX082AL) * High resolution and Low dark current * Excellent antiblooming characteristics * Continuous variable-speed shutter 20 pin DIP (Ceramic)
Pin 1 2
V
12 3 Pin 11 H 40
Optical black position Device Structure (Top View) * Interline CCD image sensor * Optical size: Diagonal 11mm (Type 2/3) * Number of effective pixels: 768 (H) x 494 (V) approx. 380K pixels * Total number of pixels: 811 (H) x 508 (V) approx. 410K pixels * Chip size: 10.25mm (H) x 8.5mm (V) * Unit cell size: 11.6m (H) x 13.5m (V) * Optical black: Horizontal (H) direction: Front 3 pixels, rear 40 pixels Vertical (V) direction: Front 12 pixels, rear 2 pixels * Number of dummy bits: Horizontal 22 Vertical 1 (even fields only) * Substrate material: Silicon
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E01X22-PS
ICX422AL
Block Diagram and Pin Configuration (Top view)
1 VL GND 7 9
Output Unit Vertical Register
V4 V3 V2 SUB GND V1
2 3 4 Note) 5 6
VDD 10 VOUT 11 VGG 12 VSS 13 GND 14
Horizontal Register
15 RD
16 RG
17 VL
18 H1 Note)
19 H2 : Photo sensor
20 HIS
Pin Description Pin No. Symbol 1 2 3 4 5 6 7 8 9 10 V4 V3 V2 SUB GND V1 VL NC GND VDD GND Output amplifier drain power Description Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Substrate (overflow drain) GND Vertical register transfer clock Protective transistor bias Pin No. Symbol 11 12 13 14 15 16 17 18 19 20 VOUT VGG VSS GND RD RG VL H1 H2 HIS Description Signal output Output amplifier gate bias Output amplifier source GND Reset drain Reset gate clock Protective transistor bias Horizontal register transfer clock Horizontal register transfer clock Horizontal register input source bias
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ICX422AL
Absolute Maximum Ratings Item Substrate voltage SUB - GND Supply voltage Vertical clock input voltage HIS, VDD, RD, VOUT, VSS - GND HIS, VDD, RD, VOUT, VSS - SUB Vertical clock input pins - GND Vertical clock input pins - SUB Ratings -0.3 to +55 -0.3 to +20 -55 to +10 -15 to +20 to +10 to +15 to +17 -17 to +17 -10 to +15 -55 to +10 -65 to +0.3 -0.3 to +30 -0.3 to +24 -0.3 to +20 -30 to +80 -10 to +60 Unit V V V V V V V V V V V V V V C C 1 Remarks
Voltage difference between vertical clock input pins Voltage difference between horizontal clock input pins H1, H2 - V4 H1, H2, RG, VGG - GND H1, H2, RG, VGG - SUB VL - SUB V1, V3, HIS, VDD, RD, VOUT - VL RG - VL V2, V4, VGG, VSS, H1, H2 - VL Storage temperature Operating temperature
1 27V (Max.) when clock width < 10s, clock duty factor < 0.1%.
Bias Conditions Item Output amplifier drain voltage Reset drain voltage Output amplifier gate voltage Output amplifier source Substrate voltage adjustment range Substrate voltage adjustment precision Reset gate clock voltage adjustment range Reset gate clock voltage adjustment precision Protective transistor bias Horizontal register input source bias Symbol VDD VRD VGG VSS VSUB VSUB VRGL VRGL VL VHIS Min. 14.7 14.7 3.8 9 -3 0 -3 -11 14.7 -10.5 15.0 Typ. 15.0 15.0 4.2 Max. 15.3 15.3 4.6 19 +3 3.0 +3 -10 15.3 Unit V V V 5% V % V % V V 3 VHIS = VDD 2 2 VRD = VDD Remarks
Ground with 750 resistor
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ICX422AL
DC Characteristics Item Output amplifier drain current Input current Input current Symbol IDD IIN1 IIN2 Min. Typ. 6 1 10 Max. Unit mA A A 4 5 Remarks
2 Indications of substrate voltage (VSUB) and reset gate clock voltage (VRGL) setting value The setting value of the substrate voltage and reset gate clock voltage are indicated on the back of the image sensor by a special code. Adjust the substrate voltage (VSUB) and reset gate clock voltage (VRGL) to the indicated voltage. The adjustment precision is 3%. VSUB code -- one character indication VRGL code -- one character indication VRGL code VSUB code "Code" and optimal setting correspond to each other as follows. VRGL code Optimal setting VSUB code 1 0 D 2 3 4 5 6 7
0.5 1.0 1.5 2.0 2.5 3.0 E f G h J K L m N P Q R S T U V W X Y Z
Optimal setting 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5 17.0 17.5 18.0 18.5 19.0 "5K" VRGL = 2.0V VSUB = 12.0V 3 This must no exceed the VVL voltage of the vertical clock waveform. 4 1) Current to each pin when 20V is applied to VDD, RD, VOUT, VSS, HIS and SUB pins, while pins that are not tested are grounded. 2) Current to each pin when 20V is applied sequentially to V1, V2, V3 and V4 pins, while pins that are not tested are grounded. However, 20V is applied to SUB pin. 3) Current to each pin when 15V is applied sequentially to H1, H2, RG and VGG pins, while pins that are not tested are grounded. However, 15V is applied to SUB pin. 4) Current to VL pin when 30V is applied to V1, V3, HIS, VDD, RD and VOUT pins or when, 24V is applied to RG pin or when, 20V is applied to V2, V4, VGG, VSS, H1 and H2 pins, while VL pin is grounded. However, GND and SUB pins are left open. 5 Current to SUB pin when 55V is applied to SUB pin, while pins that are not tested are grounded.
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ICX422AL
Clock Voltage Conditions Item Readout clock voltage Symbol VVT VVH1, VVH2, VVH3, VVH4 VVL1, VVL2, VVL3, VVL4 VV Vertical transfer clock voltage | VVH1 - VVH2 | VVH3 - VVH VVH4 - VVH VVHH VVHL VVLH VVLL Horizontal transfer clock voltage Reset gata clock voltage VH VHL VRG VRGL 6.0 -3.5 6.0 0 27.0 -0.5 -0.5 8.9 0.2 0 0 0.8 1.0 0.8 0.8 8.0 -3.0 13.0 3.0 32.0 Min. 14.5 -0.6 -9.6 Typ. 15.0 Max. 15.5 0 Unit V V V V V V V V V V V V V V V V Waveform diagram 1 2 2 2 2 2 2 2 2 2 2 3 3 3 3 4 1 High-level coupling High-level coupling Low-level coupling Low-level coupling VVH = (VVH1 + VVH2)/2 VVL = (VVL3 + VVL4)/2 VV = VVHn - VVLn (n = 1 to 4) Remarks
Substrate clock voltage VSUB
1 The reset gate clock voltage need not be adjusted when the reset gate clock is driven when the specifications are as given below. In this case, the reset gate clock voltage setting indicated on the back of the image sensor has not significance. Waveform diagram 3 3
Item Reset gate clock voltage
Symbol VRGL VRG
Min. -0.2 8.5
Typ. 0 9.0
Max. 0.2 9.5
Unit V V
Remarks
-5-
ICX422AL
Clock Equivalent Circuit Constant Item Capacitance between vertical transfer clock and GND Symbol CV1, CV3 CV2, CV4 CV12, CV34 Capacitance between vertical transfer clocks CV23, CV41 CV13 CV24 Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks Capacitance between reset gate clock and GND Capacitance between substrate clock and GND Vertical transfer clock series resistor Vertical transfer clock ground resistor CH1, CH2 CHH CRG CSUB R1, R2, R3, R4 RGND Min. Typ. 2700 2700 2100 900 1000 500 47 58 7 800 22 3 10 Max. Unit pF pF pF pF pF pF pF pF pF pF Remarks
Horizontal transfer clock series resistor RH
V1 CV12
V2
R1
R2
RH
CV1 CV41 CV24 CV4 R4 CV2 CV23
RH H2 CHH
H1
CH1
CV13 RGND CV34 CV3 R3
CH2
V4
V3
Vertical transfer clock equivalent circuit
Horizontal transfer clock equivalent circuit
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ICX422AL
Drive Clock Waveform Conditions (1) Readout clock waveform
100% 90%
M VVT 10% 0% tr twh tf 0V M 2
(2) Vertical transfer clock waveform
V1 VVH1 VVHH VVH VVHL VVHL VVHH VVHL VVH3 V3 VVHH VVH
VVHH VVHL
VVL1
VVLH
VVL3
VVLH VVLL VVL
VVLL VVL
V2
V4
VVHH
VVHH
VVH VVHL
VVH
VVHH
VVHH
VVH2 VVHL
VVHL VVH4
VVHL
VVL2VVLH VVLL VVL4
VVLH
VVLL VVL
VVL
VVH = (VVH1 + VVH2)/2 VVL = (VVL3 + VVL4)/2 VV = VVHn - VVLn (n = 1 to 4)
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ICX422AL
(3) Horizontal transfer clock waveform * Reset gate clock waveform
tr twh tf
90% VH, VRG 10% VHL, VRGL
twl
(4) Substrate clock waveform
100% 90%
M VSUB 10% VSUB 0% tr twh tf M 2
Clock Switching Characteristics Item Readout clock Vertical transfer clock Horizontal transfer clock Reset gate clock Substrate clock Symbol VT V1, V2 V3, V4 H H1 H2 RG SUB 11 13 twh 2.3 2.5 62.6 1.3 20 5.38 5.38 51 0.74 62.1 20 twl tr 0.5 0.1 0.1 15 0.01 0.01 2.0 0.5 19 tf 0.5 0.1 0.1 15 0.01 0.01 2.0 19 Unit s s s ns s s ns 0.5 s During drain charge Remarks During readout During imaging During imaging During parallel-serial conversion
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
1.5 1.8
-8-
ICX422AL
Image Sensor Characteristics Item Sensitivity Saturation signal Smear Video signal shading Dark signal Dark signal shading Flicker Lag Symbol S Vsat Sm SH Vdt Vdt F Lag Min. 700 1000 -130 -120 25 2 1 5 0.5 Typ. 1000 Max. Unit Measurement method mV mV dB % mV mV % % 1 2 3 4 5 6 7 8
(Ta = 25C) Remarks Ta = 60C
Ta = 60C Ta = 60C
Image Sensor Characteristics Measurement Method Measurement conditions 1) In the following measurements, the substrate voltage and the reset gate clock voltage are set to the values indicated on the device, and the device drive conditions are at the typical values of the bias and clock voltage conditions. 2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black (OB) level is used as the reference for the signal output, and the value measured at point [A] in the drive circuit example is used. Definition of standard imaging conditions 1) Standard imaging condition I: Use a pattern box (luminance 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.00mm) as an IR cut filter and image at F8. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity luminous intensity. 2) Standard imaging condition II : Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.00mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. Sensitivity Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of 1/250s, measure the signal output (Vs) at the center of the screen and substitute the value into the following formula. S = Vs x 250 60 [mV]
2. Saturation signal Set to standard imaging condition II. After adjusting the luminous intensity to 10 times the intensity with average value of signal output, 350mV, measure the minimum value of the signal output. -9-
ICX422AL
3. Smear Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity to 500 times the intensity with average value of the signal output, 350mV. When the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (VSm [mV]) of the signal output and substitute the value into the following formula. Sm = 20 x log VSm x 1 x 1 500 10 350 x 100 [dB] (1/10V method conversion value)
4. Video signal shading Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so that the average value of the signal output is 350mV. Then measure the maximum (Vmax [mV]) and minimum (Vmin [mV]) values of the signal output and substitute the values into the following formula. SH = (Vmax - Vmin)/350 x 100 [%] 5. Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 6. Dark signal shading After measuring 5, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. Vdt = Vdmax - Vdmin [mV] 7. Flicker Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the signal output is 350mV, and then measure the difference in the signal level between fields (Vf [mV]). Then substitute the value into the following formula. F = (Vf/350) x 100 [%] 8. Lag Adjust the signal output value generated by strobe light to 350mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following formula. Lag = (Vlag/350) x 100 [%]
FLD
V1
Light Strobe light timing
Signal output 350mV Output
Vlag (lag)
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Drive Circuit
30V
15V 10k 56k 270k 0.01 15 27k 22/20V 0.01 22k 0.1 3.3/ 16V 39k 1000P 33k 15 47k 15k 3.3/35V 15k 3.3/35V
XSUB
-9V
5V
XV1
XSG1
XV2 7 6 5 4 3 2 1 2200P CXD1268M 1M 17 18 19 20
10
9
8
VL
V2
V4
V3
V1
NC
SUB
XV3
ICX422AL (BOTTOM VIEW) 91k 1/16V 100k 10 10 3.3/16V 100 0.1 10k [A] CCD OUT 47k 0.1 100k 10/10V 3.3k 39k 33k 100k
HIS H2 H1 VL RG RD GND VSS VGG VOUT
-11V
20
19
18
17
16
GND
15
14 750 100k
13
12
GND
11 3.3/ 16V 3.3/16V
H2 0.1 0.1
H1
RG
6V
74AC04
2.2/16V
0.1
VDD
- 11 -
14 15 16 3.3/25V 1
11
12
13
3.3/25V 0.01 2 3 4 5 6 7 8 9 10
XV4
XSG2
ICX422AL
ICX422AL
Spectral Sensitivity Characteristics (includes lens characteristics, excludes light source characteristics)
1.0 0.9 0.8 0.7
Relative Response
0.6 0.5 0.4 0.3 0.2 0.1 0 400 500 600 700 Wave Length [nm] 800 900 1000
Sensor Readout Clock Timing Chart
V1 V2 Odd Field V3 V4 33.5 1.6 0.2
2.5
2.5 2.5 2.5
V1 V2 Even Field V3 V4 Unit: s
- 12 -
Drive Timing Chart (Vertical Sync)
FLD
VD
BLK
HD
10
15
20
520
525 1 2 3 4 5
V1
V2
V3
V4 246 135 246 135 135 246 494 493
CCD OUT
493 494
260
265
270
275
135 246
280
- 13 -
ICX422AL
Drive Timing Chart (Horizontal Sync)
HD
BLK
H1
1 2 3 5 10 10 30 40 20 22 1 2 3 1 2 3 20
H2
760
- 14 -
RG
V1
V2
V3
V4
SUB
768 1 2 3 5
10
20
ICX422AL
ICX422AL
Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a 30W soldering iron with a ground wire and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operation as required, and use them. a) Operate in clean environments (around class 1000 is appropriate). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Do not expose to strong light (sun rays) for long periods. For continuous using under cruel condition exceeding the normal using condition, consult our company. 5) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. 6) CCD image sensors are precise optical equipment that should not be subject to too much mechanical shocks.
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Package Outline
Unit: mm
C
0 to 9
20 pin DIP (800mil)
31.0 0.4 27.0 0.3 11 A D
2-2.50 - 0
+ 0.25
20
~
~
2R 3. 0
26.0
5.0
20.2 0.3
B + 0.15 2.00 - 0 (Reference Hole) x2.5 2.00 - 0 (Elongated Hole)
0.25
0.35
1
+ 0.15
13.15
10 0.5
26.0 0.25
3.2 0.3
1Pin Index 1. "A" is the center of the effective image area.
1.0
2. The straight line "B" which passes through the center of the reference hole and the elongated hole is the reference axis of vertical direction (V). 3. The straight line "C" which passes through the center of the reference hole at right angle to vertical reference line "B" is the reference axis of horizontal direction (H). 4. The bottom "D" is the height reference.(Two points are specified.) 5. The center of the effective image area specified relative to the reference hole is (H, V) = (13.15, 5.0) 0.15mm. 6. The angle of rotation relative to the reference line "B" is less than 1 7. The height from the bottom "D" to the effective image area is 1.46 0.15mm. 8. The tilt of the effective image area relative to the bottom "D" is less than 60m. 9. The thickness of the cover glass is 0.75mm and the refractive index is 1.5.
2.54 1.27
0.3 M
PACKAGE STRUCTURE
PACKAGE MATERIAL
Ceramic
LEAD TREATMENT
GOLD PLATING
LEAD MATERIAL
42 ALLOY
PACKAGE MASS
5.90g
DRAWING NUMBER
AS-A11(E)
5.5 0.2
0.46
20.32 (AT STAND OFF)
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ICX422AL
Sony Corporation


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