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| JMicron/JM20330 JM20330 Serial ATA Bridge Chip Description JMicron's JM20330 is a single chip solution for serial and parallel ATA translation. It includes the Serial ATA PHY, Link, Transport, and Parallel ATA (application layer) controller. The Serial ATA physical, link, and transport layers are compliant to Serial ATA 1.0. JM20330 supports a 1.5GHz data rate, and scalable to 3.0 GHz data rate by directly doubling the internal clock source. The application layer supports both the ATA register command set and PACKET command set, which could drive both Hard Disk Drive and ATAPI Optical Storage such as CR-ROM, CD-RW, DVD-ROM, DVD-RW, etc. The Serial ATA and the Parallel ATA application layer support both host and device operation and can be configured through a single pin. Features Serial ATA 1.0 Specification compliant Automatic Serial ATA 3.0/1.5 Gbps speed negotiation ATA/ATAPI PIO mode 0 to 4 ATA/ATAPI Ultra DMA of transfer rate 16.7, 25, 33, 48, 66, 100, 133, and 150MB/s. ATA/ATAPI LBA48 addressing mode associated with 2-byte sector count Support Serial ATA hot-plug Ultra low power consumption Work for both AC and DC couple between the transmitter and the receiver Provide specified OOB signal detection and transmission Support Spread Spectrum Clocking to reduce EMI Support 20MHz, 25MHz, 30MHz or 40MHz Reference Clock Support Partial/Slumber power management Provide adjustable TX signal amplitude and pre-emphasis level Master/Slave support Version 1.0 (c) JMicron 2003. All rights reserved. Quick Reference Signal Bit Rate Spread Spectrum Power Supply ESD Protection Host and Device Adj. Amplitude Adj. Pre-emphasis Package Applications 3.0/1.5 Gbps -3.0% to 0.0 3.3V and 1.8V 2000 V Programmable 2 levels 4 levels 64-pin TQFP All SATA products Mass storage devices Optical storage Dongle bridge Storage system May 2003 Page 1 Copying prohibited. -{ Z "OE "s * 'J ae OE (R) "c ZO ' 2-11-22 T"^**[ Y Z"^*[ r *@ 154-8539*@ TEL: 03 (3487) 8502 / FAX: 03 (3487) 8825 / e-mail: jmicron@mcmjapan.com * /*@ SO *1/4cAE*S `a *a Zs--i ae*1/4' " 3-7-13 *V`a *a TN r EAST*@ 532-0011*@ TEL: 06(6885) 1688 / FAX: 06 (6885) 1721 / * ZX * /*@ JMicron/JM20330 Functional Block Diagram FIFO Transport Layer Application Layer (ATA/ ATAPI Controller) FIFO Link Layer Physical Layer (PHY) RXP/RXN TXP/TXN Parallel ATA Status and Control Register (SCR) MODE[2:0] Register File GPIO I/F GIO0 GIO1 Fig. 1 Functional Block Diagram of JM20330 Applications Device Bridge Application Layer (ATA/ATAPI Controller) Application Layer (ATA/ATAPI Controller) Host Bridge FIFO FIFO Transport Layer Transport Layer Physical Layer (PHY) Link Layer HDD/ Optical Storage TXP/ TXN RXP/ RXN Link Layer RXP/ RXN TXP/ TXN Physical Layer (PHY) FIFO MODE = 0xx MODE =1xx GIO0 GIO1 Status and Control Register (SCR) GIO0 GPIO I/ F FIFO Parallel ATA Parallel ATA PC IDE Port Status and Control Register (SCR) GIO1 GPIO I/ F Register File Register File JM30330 JM30330 Fig. 2 JM20330 Host and Device bridge system diagram Product Information Name JM20330 Design Kit 1 JM20330 Data Sheet 2 JM20330 Design Guide 3 Application EVB Description Serial ATA Bridge Chip Contact Information Department Email Sales sales@jmicron.com.tw Tech. Support fae@jmicron.com.tw Version 1.0 (c) JMicron 2003. All rights reserved. May 2003 Page 2 Copying prohibited. -{ Z "OE "s * "c 'J aeZO ' (R) OE 2-11-22 T"^**[ Y Z"^*[ r *@ 154-8539*@ TEL: 03 (3487) 8502 / FAX: 03 (3487) 8825 / e-mail: jmicron@mcmjapan.com * /*@ SO *1/4cAE*S `a *a Zs--i ae*1/4' " 3-7-13 *V`a *a TN r EAST*@ 532-0011*@ TEL: 06(6885) 1688 / FAX: 06 (6885) 1721 / * ZX * /*@ |
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