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| PRODUCT INFORMATION MSP 44xyK, MSP 46xyK July/2003 MSP 44xyK, MSP 46xyK Multistandard Sound Processor Familiy SURROUND P R O L O G I C II The Multistandard Sound Processor families MSP 44xyK and MSP 46xyK represent the fifth generation of Micronas' single-chip TV sound demodulator, decoder, and baseband audio processors. Demodulation and stereo decoding of all analog TV standards worldwide, as well as the NICAM digital sound standard and FM stereo radio is performed on the SIF (2nd IF) input. Baseband audio is processed in the DSP section after on-chip A/D conversion or input via I2S. Built-in high-quality multibit sigma-delta D/A converters directly feed the TV's power amplifiers. Alternatively, digital PWM outputs allow to connect state-of-theart "class D" digital amplifiers. Micronas' "High-Resolution PWM" technology enables natural sound with digital power amplifier ICs provided by several manufacturers. MSP 44xyK and MSP 46xyK are available in PQFP80 or PQFP100 package. Demodulator, Stereo Decoder Alignment-free decoding of all TV audio standards maintaining superb channel separation US BTSC audio with DBX noise reduction and SAP decoding Japanese EIA-J stereo Digital NICAM stereo All 2-carrier TV Audio standards (Very) High deviation modes HDEV2, 3 Automatic Standard Detection (ASD) Automatic Sound Select (ASS) switches mono/stereo/bilingual without controller interaction BBE High Definition Sound Virtual Dolby Surround Equalizer, Tone control, Subwoofer filter Micronas BASS, Micronas VOICE Interfaces Two SIF inputs to the Demodulator 8-channel I2S inputs with sampling rate converter 5 analog stereo line inputs (to A/D or switched to line outputs) Loudspeaker D/A for L, C, R, Sl, Sr, Sub channels with analog volume "High-Resolution PWM" outputs with volume for L, C, R, Sl, Sr, Sub channels Headphone D/A with analog volume I2S outputs S/PDIF output Easy connection of Micronas' MAS 35xyH co-processors Baseband Audio Processing Delay line for "Lip Sync" Dolby Pro Logic II SRS TruSurround XT PRODUCT INFORMATION MSP 44xyK, MSP 46xyK Evaluation Support "Visual MSP" Software Suite: - I2C driver for PC parallel port - Micronas "Visual I2C" - "Visual-MSP" application Evaluation Hardware: - I adapter for PC parallel port - Micronas Audio Motherboard - Various evaluation boards 2C July/2003 MSP 44xyK, MSP 46xyK Family Differentiation Feature "High-Resolution PWM" Loudspeaker out Dolby Pro Logic II Virtual Dolby Surround Micronas BASS SRS TruSurround XT BBE High-Definition Sound MSP 44x1K MSP 44x2K MSP 46x1K MSP 46x2K - 2.1 ch - 5.1 ch * 2.1 ch * 5.1 ch - * * * optional - * * * optional * * optional * * optional System Architecture The hardware of the MSP 44xyK and MSP 46xyK consists of digital data processing blocks, as well as analog I/O including high-performance A/D and D/A conversion on a single chip. The unique demodulator block performs all SIF demodulation, stereo decoding and automatic functions in the digital domain. The DSP is designed as dedicated audio signal processor. Its RISC architecture makes it small and cost-efficient while providing sufficient power to process Pro Logic II followed by TV-specific signal processing and "High Resolution PWM". The firmware is located in the internal ROM; all functions are I2C-programmable. MSP 44xyK are hardware and software compatible to Micronas MSP34xyG and MSP44xyG products. License Notice: "Dolby Pro Logic ", and the double-D Symbol are trademarks of Dolby Laboratories. Companies planning to use this implementation in products must obtain a license from Dolby Laboratories Licensing Corporation before designing such products. BBE is a registered trademark of BBE Sound Inc., the BBE Logo is a trademark of BBE Sound Inc. A license from BBE Sound Inc. is required before a BBE-version of the MSP 44xyK or MSP 46xyK can be purchased. SRS, SRS WOW, and the SRS Logo are trademarks of SRS Labs, Inc. A license from SRS Labs, Inc. is required before an SRS-version of the MSP 44xyK or MSP 46xyK can be purchased. Speaker out SIF in A/D Demodulator & Stereo Decoder Speaker Processing & Delay Line D/A or HR-PWM I2S in I2S Sampling Rate Converter Headphone out Source Selector Headphone Processing D/A Volume Line in A/D S/PDIF & I2S S/PDIF out I2S out Line out Mux D/A D/A Mux Fig. 1: Block diagram of the MSP 44xyK and MSP 46xyK All information and data contained in this product information are without any commitment, are not to be considered as an offer for conclusion of a contract, nor shall they be construed as to create any liability. Product or development sample availability and delivery are exclusively subject to our respective order confirmation form. By this publication, Micronas GmbH does not assume responsibility for patent infringements or other rights of third parties which may result from its use. No part of this publication may be reproduced, photocopied, stored on a retrieval system, or transmitted without the express written consent of Micronas GmbH. Edition July 15, 2003; Order No. 6251-621-1PI Micronas GmbH Hans-Bunte-Strasse 19 D-79108 Freiburg (Germany) P.O. Box 840 D-79008 Freiburg (Germany) Tel. +49-761-517-0 Fax +49-761-517-2174 E-mail: docservice@micronas.com www.micronas.com |
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