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STV6432
Audio/Video Output Buffers for STB and DVD Devices
FEATURES
s VIDEO SECTION
q q q
Y/C/CVBS Inputs Y/C Outputs for TV 4 CVBS Outputs (for TV, VCR, Aux and RF Modulator) 6 dB Gain with Fine Adjustment Integrated 150 Buffers Sync Bottom Clamp on all CVBS/Y And Bias on C Inputs Crosstalk: 50 dB (Typ.) Bandwidth: 15 MHz
q q q
q q
s AUDIO SECTION
q q q q q
1 pair of Stereo Inputs 1 pair of Stereo Outputs (TV, VCR, AUX) Stereo-to-Mono Capability (RF Mod output) 6 dB Gain Crosstalk: 80 dB min.
SO28 ORDER CODE: STV6432
DESCRIPTION
The STV6432 is an audio/video output interface for US STB and DVD. It adapts in amplitude and impedance the audio and video signals coming from the digital decoder to provide them to the TV set, VCR, Auxiliary and RF modulator. The video gains are adjustable from 5 dB to 8 dB in steps of 1 dB.
September 2003
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/15
STV6432
TABLE OF CONTENTS
Chapter 1 Chapter 2
2.1 2.2 2.3 2.4 2.5 2.6
PIN CONNECTIONS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Absolute Maximum Ratings ................................................................................................ 5 Thermal Data ...................................................................................................................... 5 Supply Section ..................................................................................................................... 5 Audio Section ....................................................................................................................... 6 Video Section ....................................................................................................................... 7 Chroma Section ................................................................................................................... 8
Chapter 3 Chapter 4 Chapter 5 Chapter 6
INPUT/OUTPUT GROUPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 APPLICATION DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
PACKAGE MECHANICAL DATA
REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
2/15
STV6432
PIN CONNECTIONS
1
PIN CONNECTIONS
Figure 1: Pin Connections on SO28 Package
CVBSOUT_VCR CVBSOUT_TV VCCB2 COUT_TV VCCB3 YOUT_TV FINE_GAIN NC GND VCCV DECV CVBSIN_ENC CIN_ENC YIN_ENC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
GNDB CVBSOUT_AUX VCCB1 VOUT_RF AOUT_RF VCC12 LOUT ROUT VCCA GNDA DECA LIN_ENC RIN_ENC GND
Table 1: Pin List Description Pin No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
Symbol
CVBSOUT_VCR CVBSOUT_TV VCCB2 COUT_TV VCCB3 YOUT_TV FINE_GAIN NC GND VCCV DECV CVBSIN_ENC CIN_ENC YIN_ENC GND RIN_ENC LIN_ENC DECA GNDA VCCA ROUT LOUT VCC12 AOUT_RF VOUT_RF VCCB1 CVBSOUT_AUX GNDB
Description
CVBS Output to VCR CVBS Output to TV +5 V Video Output Buffers Supply Chroma Output to TV +5 V Video Output Buffers Supply Y Output to TV Y/C/CVBS Output Gain Fine Adjustment Ground +5 V Video Supply Video Decoupling Capacitor CVBS Input from Encoder Chroma Input from Encoder Y Input from Encoder Ground Audio Right Input from Encoder Audio Left Input from Encoder Audio Decoupling Capacitor Audio Ground +9 V Audio Supply or Audio Supply Decoupling Audio Right Output Audio Left Output Audio Supply (+12V or +9V) Audio (L+R) Output to RF Modulator CVBS Video Output to RF Modulator +5 V Video Output Buffers Supply CVBS Output to Auxiliary Video Buffer Ground
3/15
PIN CONNECTIONS
STV6432
Figure 2: STV6432 Block Diagram
STV 6432 YIN_ENC LPF 14 Clamp 6 dB YOUT_TV DIGITAL DECODER CIN_ENC LPF 13 Clamp 6 dB COUT_TV 6
4
TV
CVBSOUT_TV CVBSIN_ENC LPF 12 Clamp 6 dB CVBSOUT_VCR
2
1 VCR 25
FINE_GAIN 7
VOUT_RF
RF Mod
CVBSOUT_AUX LIN_ENC 17 DAC 16 RIN_ENC 6 dB 6 dB LOUT AOUT_RF ROUT
27 AUX 22 24 21
4/15
STV6432
ELECTRICAL CHARACTERISTICS
2
2.1
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Table 2: Absolute Maximum Ratings
Symbol
VCC12 VCCA VCCV, VCCB VI VESD Toper Tstg Audio Section Audio Section Video Sections Voltage at Pin 1 to GND - Audio pins - Video pins
Parameter
Value
13 10 6
Unit
V V V
0, VCCA or VCC12 0, VCCV or VCCB 4 0, +70 0, +150
V
Maximum ESD voltage allowed. 100 pF capacitor discharged through 1.5 k serial resistor (Human Body Model) Operating Ambient Temperature Storage Temperature
kV C C
2.2
Thermal Data
Table 3: Thermal Data
Symbol
Rth(j-a)
Parameter
Junction-ambient Thermal Resistance
Value
71 (Max.)
Unit
C/W
2.3
Supply Section
TAMB = 25 C, VCCV = 5 V, VCCB = 5 V, VCCA = 9 V RGA = 600 , RLOUTA = 10 k, RGV = 75 , RLOUTV = 150 , unless otherwise specified.
Table 4: Supply Data
Symbol
VCC12 VCC12 VCCA VCCV VCCB ICC12 ICCA ICCV ICCB
Parameter
Audio Operating Supply Voltage Audio Operating Supply Voltage Audio Operating Supply Voltage Video Operating Supply Voltage Video Buffers Supply Voltage Audio Output Supply Current Audio Output Supply Current Video Supply Current (VCCV) Video Buffers Supply Current (VCCB)
Test Conditions
Decoupling capacitor on VCCA VCC12 connected to VCCA
Min.
11.5 8.5 8.5 4.5 4.5
Typ.
12 9 9 5 5 5 4 12 20
Max.
12.5 9.5 9.5 5.5 5.5
Unit
V V V V V mA mA mA mA
VCC12 = 12 V, No load VCCA = 9 V, No load VCCV = 5 V, No load VCCB = 5 V, No load
5/15
ELECTRICAL CHARACTERISTICS
STV6432
2.4
Audio Section
TAMB = 25 C, VCCV = 5 V, VCCB = 5 V, VCCA = 9 V RGA = 600 , RLOUTA = 10 k, RGV = 75 , RLOUTV = 150 , unless otherwise specified.
Table 5: Audio Data
Symbol
SVR100
Parameter
Supply Voltage Rejection
Test Conditions
VRIPPLE = 500 mVRMS at 120 Hz, DECA filter cap = 47 F DECA filter cap = 220 F VRIPPLE = 500 mVRMS at 1 kHz DECA filter cap = 220 F VCCA = 9 V
Min.
Typ.
70 80 80 VCCA/2
Max.
Unit
dB
60 70
SVR1K VINDC VINAC RIN RINmatch FRANGE Flatness
Supply Voltage Rejection Input DC Level Input Signal Amplitude Input Resistance Input Resistance Matching Bandwidth Spread of Gain in Audio Band (Peak-to-Peak) Channel Separation between L & R TV outputs Channel Isolation from video inputs Output DC Level Output Resistance Phase Difference Audio Signal/Noise ratio Equivalent RMS Input Voltage Noise 6 dB Gain Gain matching between Left/Right outputs Total Harmonic Distortion ENC Input with Gain = 6 dB Output Clipping Level Output Load Resistance
dB V 2 VRMS k 10 % kHz 0.5 dB
30 -3 dB, VIN = 0.5 VRMS RLOAD = 10 k VIN = 0.5 VRMS 20 Hz to 20 kHz VIN = 0.5 VRMS at 1 kHz on one input, RLOAD = 10 k on both outputs VIN = 1 VPP at 15 kHz on one video input VCCA = 9 V VIN = 1 VRMS at 1 kHz on each input channel VIN = 1 VRMS A weighted at 1 kHz, Gain = 6 dB BW = 20 Hz at 20 kHz unweighted, Gain = 6 dB VIN = 0.5 VRMS, RLOAD = 10 k VIN = 0.5 VRMS at 1 kHz Gain = 6 dB VIN = 0.5 VRMS at 1 kHz Low Pass Filter at 80 kHz THD = 0.2% at 1 kHz, VIN = 1 VRMS, THD = 0.3%, 2.1 2
50 2
50
CS
80
90
dB
Ci VOUT ROUT PHD ASN eNI1 GAL GMA THD VCL RL
85 VCCA/2 60 120 3 80 5 5.5 -1 0.005 2.3 2.25 6 +6.5 1 0.05
dB V Degree dB V dB dB % VRMS k
1. eNI is the total unweighted output noise in a 20 Hz to 20 kHz bandwidth divided by the gain.
6/15
STV6432
ELECTRICAL CHARACTERISTICS
2.5
Video Section
TAMB = 25 C, VCCV = 5 V, VCCB = 5 V, VCCA = 9 V RGA = 600 , RLOUTA = 10 k, RGV = 75 , RLOUTV = 150 , unless otherwise specified.
Table 6: Video Data
Symbol
VDCIN ICLAMP ILEAK CIN VIN DYN BW Flatness VCTO
Parameter
DC Input Level Clamping Current Input Leakage Current Input Capacitance Maximum Input Signal Dynamic Output Signal Bandwidth on Y and CVBS Outputs Spread of Gain in Video Band (15 kHz to 5 MHz) of Y and CVBS Video Crosstalk Output Crosstalk Isolation between Output Channels Video Crosstalk Output Crosstalk Isolation between Output Channels when CVBSIN_ENC is driven Video Crosstalk Output Crosstalk Isolation between Output Channels when CVBSIN_ENC is driven Output Resistance 5 dB Gain on Y and CVBS Channels 6 dB Gain on Y and CVBS Channels 7 dB Gain on Y and CVBS Channels 8 dB Gain on Y and CVBS Channels 5 dB Gain: Max. VIN Voltage on Pin 7 6 dB Gain: Min. VIN Voltage on Pin 7
Test Conditions
Bottom Sync Pulse VIN = VDCIN -400 mV VIN = VDCIN +1 V VCCV = 5 V, Gain = 6 dB VCCV = 5 V, Gain = 6 dB VIN = 1 VPP, at -3 dB, Gain = 6 dB VIN = 1 VPP VIN = 1 VPP at 3.58 MHz on either YIN_ENC or CIN_ENC inputs RLOAD = 150 ; Gain = 6dB VIN = 1 VPP at 3.58 MHz on CVBSIN_ENC input; Only one CVBS output loaded at 150 ; Gain = 6 dB VIN = 1 VPP at 3.58 MHz on CVBSIN_ENC input; All 4 CVBS outputs loaded at 150 ; Gain = 6 dB VIN = 1 VPP Pin 7 to GND or Logic "0" VIN = 1 VPP. Pin 7 is open1 VIN = 1 VPP; Pin 7 connected to VCCV (5 V) via 22 k or to 3.3 V VIN = 1 VPP Pin 7 to VCCV (5 V) Pin 7 to Ground or Logic "0" (IIN < 160 A) Pin 7 is open.
Min.
1
Typ.
2 2 1 2 1.5 3
Max.
Unit
V mA
10
A pF VPP VPP MHz
8
15 0.5 50
dB dB
VCTO1
50
dB
VCTO4 ROUT GV5 GV6 GV7 GV8 VH5 VL6 VH6 VL7 VH7 VL8 DCOUT DPHI DG LNL VSN
44 5 4.5 5.5 6.5 7.5 5 6 7 8 10 5.5 6.5 7.5 8.5 1.1 1.3 1.7 1.9 4.0 4.2 0.6 1 1 0.3 65 5 5 3
dB dB dB dB dB V V V V V V V Degree % % dB
6 dB Gain: Max. VIN Voltage on Pin 7 Pin 7 is open. Pin 7 connected to VCCV (5 V) via 7 dB Gain: Min. VIN Voltage on Pin 7 22 k or to 3.3 V (IIN < 140 A) 7 dB Gain: Max. VIN Voltage on Pin 7 8 dB Gain: Min. VIN Voltage on Pin 7 DC Output Voltage Differential Phase Differential Gain Luminance Non-Linearity Video S/N Ratio2 Pin 7 connected to VCCV (5 V) via 22 k or to 3.3 V (IIN < 140 A) Pin 7 connected to VCCV (5 V) (IIN < 350 A) Bottom sync pulse VIN = 1 VPP at 3.58 MHz VIN = 1 VPP at 3.58 MHz
1. When Pin 7 is left open, its voltage is determined by an internal voltage divider consisting of 42 k to VCC (5 V) and 18 k to Ground 2. S/N = 20 log (VOUT Black to White = 0.7 VPP / VNoise (mVRMS) weighted CCIR 567).
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ELECTRICAL CHARACTERISTICS
STV6432
2.6
Chroma Section
TAMB = 25 C, VCCV = 5 V, VCCB = 5 V, VCCA = 9 V RGA = 600 , RLOUTA = 10 k, RGV = 75 , RLOUTV = 150 , unless otherwise specified.
Table 7: Supply Data
Symbol
VDCIN RIN CIN VIN DYN DCOUT CBW CCTO
Parameter
DC Input Level Input Resistance Input Capacitance Max Input Signal Dynamic Output Signal DC Output Voltage Chroma Bandwidth Chroma Crosstalk Output Crosstalk Isolation between Output Channels Chroma Crosstalk Output Crosstalk Isolation between Output Channels when CVBSIN_ENC is driven Chroma Crosstalk Output Crosstalk Isolation between Output Channels when CVBSIN_ENC is driven Output Resistance 5 dB Gain on Chroma Channels 6 dB Gain on Chroma Channels 7 dB Gain on Chroma Channels 8 dB Gain on Chroma Channels Chroma to Luma Delay, Source Y/C
Test Conditions
Min.
30
Typ.
3 50 2 1.5 3 2.2
Max.
Unit
V k pF VPP VPP V MHz
Gain = 6 dB Gain = 6 dB VIN = 1 VPP at -3 dB Gain = 6 dB VIN = 1 VPP at 3.58 MHz on input YIN_ENC RLOAD = 150 , Gain = 6 dB VIN = 1 VPP at 3.58 MHz on CVBSIN_ENC input; Only one CVBS output loaded at 150 ; Gain = 6 dB VIN = 1 VPP at 3.58 MHz on CVBSIN_ENC input; All 4 CVBS outputs loaded at 150 ; Gain = 6 dB VIN = 1 VPP Pin 7 to GND or Logic "0" VIN = 1 VPP, Pin 7 is open1 VIN = 1 VPP; Pin 7 connected to VCCV (5 V) via 22 k or to 3.3 V VIN = 1 VPP Pin 7 to VCCV (5 V) VIN = 1 VPP at 3.58 MHz 8
50
dB
CCTO1
50
dB
CCTO4 ROUT GC5 GC6 GC7 GC8 CToYdel
44
dB dB dB dB dB ns
5 4.5 5.5 6.5 7.5 5 6 7 8
10 5.5 6.5 7.5 8.5 20
1. When Pin 7 is left open, its voltage is determined by an internal voltage divider consisting of 42 k to VCC (5 V) and 18 k to Ground
8/15
STV6432
INPUT/OUTPUT GROUPS
3
INPUT/OUTPUT GROUPS
Figure 3: Bottom Clamped Video Inputs (Pins 12 & 14)
Figure 6: Audio Inputs (Pins 16 and 17)
VCCV 5 V
VCCV 5 V
VCCA 9 V
2 V + VD 1 k
VCCA/2 Protected Pad Protected Pad
Figure 4: Average Clamped Video Inputs (Pin 13)
Figure 7: Audio Outputs (Pins 21, 22 and 24)
VCCV 5 V VCCV 5 V IB 50 k
VCC12 12 V
3V 60
Protected Pad
Protected Pad
Figure 5: Video Outputs (Pins 1, 2, 4, 6, 25 and 27)
VCCB1,2,3 5 V
Figure 8: Fine Gain Control Input (Pin 7)
VCCV 5 V
VCCV 5 V
V CCV 5 V
42 k IB 18 k Protected Pad Protected Pad
9/15
INPUT/OUTPUT GROUPS
STV6432
Figure 9: Video Decoupling (Pin 11)
Figure 10: Audio Decoupling (Pin 18)
VCCA 5 V
VCCA 5 V
VCCA 9 V
VCCA 9 V
10 k
25 k
40 k
25 k
Protected Pad
Protected Pad
Figure 11: Power Supply Connections
VCCB1
VCCB2
VCCB3
VCCV
VCCA
VCC12
26
3
5
5V
10
5V
20
10 V
23
12 V
28 GNDB
9 GND
19 GNDA
15 GND
These symbols represent some large diode and Zener-like components used for the ESD protection of the device. They are not supposed to be paths for any current in normal operation mode.
10/15
4
5V 12V C2 10F C4 10F
STV6432
R6 75 1 CVBSOUT_VCR CVBSOUT_TV Vccb2 COUT_TV Vccb3 YOUT_TV Vcc12 LOUT ROUT Vcca GNDA DECA LIN_ENC RIN_ENC GND 15 16 C15 1F 17 C12 18 100n 1F 19 C17 20 220 R9 C18 100F DAC LOUT DAC ROUT 21 220 R8 C13 10F C19 100n 22 C11 10F Fine Gain NC GND Vccv DECV CVBSIN_ENC CIN_ENC YIN_ENC 23 C22 100n AOUT_RF 24 R10 75 C14 10F VOUT_RF 25 RF Modulator Vccb1 26 C3 100n CVBSOUT_AUX 27 AUX CVBS R7 75 GNDB 2 R3 75 C20 100n 3 4 R5 75 C1 100n 5 6 R4 75 7 8 7dB 9 6dB C8 C16 47n 100n 11 12 13 14 C10 C9 100n 100n 10 5dB 8dB 28
VCR CVBS
TV CVBS
TV C
TV Y
5V
Audio L Audio R C20 10F
R
Fine Gain
APPLICATION DIAGRAMS
Enc. CVBSOUT
LPF
Enc. COUT C21 100n STV6432
LPF
Enc. YOUT C5 L1 10 C6 47p 47p R2 C7 10p
LPF
R1
Figure 12: Application Diagram for 5V/12V Power Supplies
All grounds must be linked under the IC
C1, C3, C8, C19, C20 and C22 capacitors must be placed very close to the IC pins.
LPF is an example of reconstruction filter that you can place after a video DAC. In this schematic, Fc=7.3MHz (Fc=1/(2pi*sqrt(LC))), C5, is used to add a little peaking at Fc.
R1 and R2 must be adapted to MPEG DAC expected output load.
APPLICATION DIAGRAMS
Expected signals on Video Fine Gain pin: 5V for 8dB gain, 22K pull up or 3.3V for 7dB gain, NC for 6dB gain, and GND for 5dB gain.
11/15
12/15
5V C4 C2 10F 10F 9V R6 75 1 CVBSOUT_VCR CVBSOUT_TV Vccb2 COUT_TV Vccb3 YOUT_TV Vcc12 LOUT ROUT Vcca GNDA DECA LIN_ENC RIN_ENC GND 19 18 17 16 C15 15 1F 20 C17 100n C12 1F 21 22 R8 220 R9 220 C18 100F DAC LOUT DAC ROUT Fine Gain NC GND Vccv DECV CVBSIN_ENC CIN_ENC YIN_ENC 23 C22 100n AOUT_RF 24 R10 75 VOUT_RF 25 RF Modulator C14 10F C11 10F Vccb1 26 C3 100n CVBSOUT_AUX 27 R7 75 AUX CVBS GNDB 2 C20 100n 3 4 C1 100n 5 6 7 8dB R 7dB 9 6dB C8 C16 47n 11 12 C9 100n 13 C21 100n 14 C5 L1 10 C6 R2 47p 47p All grounds must be linked under the IC C7 10p STV6432 LPF LPF LPF C10 100n 100n 10 5dB 8 28 R3 75 R5 75 R4 75 5V Audio L C13 10F C19 100n Audio R
VCR CVBS
APPLICATION DIAGRAMS
TV CVBS
TV C
TV Y
Fine Gain
Enc. CVBSOUT
Enc. COUT
Enc. YOUT
Figure 13: Application Diagram for 5V/9V Power Supplies
R1
C1, C3, C8, C19, C20 and C22 capacitors must be placed very close to the IC pins.
LPF is an example of reconstruction filter that you can place after a video DAC. In this schematic, Fc=7.3MHz (Fc=1/(2pi*sqrt(LC))), C5, is used to add a little peaking at Fc.
R1 and R2 must be adapted to MPEG DAC expected output load.
STV6432
Expected signals on Video Fine Gain pin: 5V for 8dB gain, 22K pull up or 3.3V for 7dB gain, NC for 6dB gain, and GND for 5dB gain.
STV6432
PACKAGE MECHANICAL DATA
5
PACKAGE MECHANICAL DATA
Figure 14: SO28 28-pin Plastic Small Outline Package (300-mil width)
Table 8: SO28 Physical Characteristics Dim. Min.
A A1 B C D E e H h K L G 2.35 0.10 0.33 0.23 17.70 7.40 1.27 10.01 0.25 0.41 10.64 0.74 1.27 0.10 0.394 0.010 0 0.016
mm Typ. Max.
2.65 0.30 0.51 0.32 18.10 7.60
Inches Min.
0.0926 0.0040 0.013 0.0091 0.6969 0.2914 0.0500 0.419 0.029 8 0.050 0.004
Typ.
Max.
0.1043 0.0118 0.020 0.0125 0.7125 0.2992
13/15
REVISION HISTORY
STV6432
6
REVISION HISTORY
Table 9: Summary of Modifications
Revision
1.0 1.1 1.2
Main Changes
First Issue Addition of Section 4: APPLICATION DIAGRAMS on page 11 and Section 6: REVISION HISTORY on page 14. Reformat of Page Layout. Addition of Video and Audio Crosstalk Values (VCTO1 and CCTO1). Modification of Application Diagrams.
Date
March 2001 26 April 2001 29 June 2001
14/15
STV6432
REVISION HISTORY
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2003STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. www.st.com
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