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MITSUBISHI SEMICONDUCTOR
PM50CTJ060-3
INSULATED PACKAGE FLAT-BASE TYPE
PM50CTJ060-3
4th gen. planer IGBTs are integrated 3 50A, 600V Current-sense IGBT type inverter Monolithic gate drive & protection logic Detection, protection & status indication circuits for over-current, short-circuit, over-temperature & under-voltage Acoustic noise-less 3.7kW class inverter application
APPLICATION Air-conditioner, General purpose inverter, servo drives and other motor controls
OUTLINE DRAWING
Terminal code
1. 2. 3. 4. 5. 6. 7. VUPC UP VUP1 VVPC VP VVP1 VWPC 8. 9. 10. 11. 12. 13. 14. VP VWP1 VNC VN1 UN VN WN 15. 16. 17. 18. 19. 20. FO P N U V W
Dimensions in mm
(11.99)
94.5 1 76 3.5617=60.52 0.8 3.560.3 7.12 7.12 7.12
X=3.560.25mm
123
4
56
789
10 11 12 13 14 15
64 0.5
16 17
N
18
U
19
V
20
W
2-4.5
P
(14.25) 14 0.3 56 0.8 84.5 0.5 TAB #250(t = 0.8) A B
33.6 0.8 44 1
2-R5
2-0.8
5.5 5.5 10.5 5.5
3.5 0.5 8 6.35
19
(1)
1.65
3.5
LABEL
3.45 1.25 7.95
8 0.5 16 1 19.4 1
3.4 0.1
0.8 0.1
(t = 0.4)
(t=0.8)
A : DETAIL
B : DETAIL
Mar. 2001
MITSUBISHI SEMICONDUCTOR
PM50CTJ060-3
INSULATED PACKAGE FLAT-BASE TYPE
EQUIVALENT CIRCUIT DIAGRAM
VNC VN1 FO WN VN UN VWPC WP VWP1 VVPC VP VVP1 VUPC UP VUP1
GND VCC
FO
WN
VN
UN
Tc Tb
GND In VCC
GND In VCC
GND In VCC
SWN OWN SVN OVN SUN OUN
GND
GND
Out
GND
Out
GND
Out
N
W
V
U
P
MAXIMUM RATINGS INVERTER PART
Symbol VCC VCC(surge) VCES IC ICP PC Tj
(Tj = 25C, unless otherwise noted)
Parameter Supply voltage Supply voltage (surge) Collector-emitter voltage Collector current Collector current (peak) Collector dissipation Junction temperature
Conditions Applied between : P-N Applied between : P-N, Surge value TC = 25C TC = 25C TC = 25C
Ratings 450 500 600 50 100 100 -20 ~ +125*
Unit V V V A A W C
* The item defines the maximum junction temperature for the power elements (IGBT/Diode) of the IPM to ensure safe operation. However, these power elements
can endure junction temperature as high as 150C instantaneously. To make use of this additional temperature allowance, a detailed study of the exact application conditions is required and, accordingly, necessary information is requested to be provided before use.
CONTROL PART
Symbol VD ICIN VFO IFO Parameter Supply voltage Input current Fault output supply voltage Fault output current Conditions Applied between : VUP1-VUPC, VVP1-VVPC VWP1-VWPC, VN1-VNC At : UP, VP, WP, UN, VN, WN terminals Applied between : FO-VNC Sink current of FO terminals Ratings 20 20 20 20 Unit V mA V mA
Mar. 2001
MITSUBISHI SEMICONDUCTOR
PM50CTJ060-3
INSULATED PACKAGE FLAT-BASE TYPE
TOTAL SYSTEM
Parameter Supply voltage protected VCC(PROT) by OC & SC TC Module case operating temperature Tstg Storage temperature Viso Isolation voltage
Note 1 : TC measurement point.
Symbol
Conditions VD = 13.5 ~ 16.5V, Inverter part, Tj = 125C start (Note 1) 60Hz, sinusoidal, Charged part to Base, AC * 1 min.
Ratings 400 -20 ~ +100 -40 ~ +125 2500
Unit V C C Vrms
P
N
U
V
W
Tc
THERMAL RESISTANCES
Symbol Rth(j-c)Q Rth(j-c)F Rth(c-f) Parameter Junction to case thermal resistances Contact thermal resistance Test conditions Inverter IGBT part (per 1/6 module) Inverter FWD part (per 1/6 module) Case to fin, (per 1 module) thermal grease applied Min. -- -- -- Limits Tye. -- -- -- Max. 1.2 2.9 0.4 Unit C / W C / W C / W
ELECTRICAL CHARACTERISTICS INVERTER PART
Symbol VCE(sat) VEC ton trr tc(on) toff tc(off) ICES Parameter Collector-emitter saturation voltage FWD forward voltage
(Tj = 25C, unless otherwise noted)
Test conditions VD = 15V, ICIN = 10mA Tj = 25C IC = 50A, Pulsed (Fig. 1) Tj = 125C -IC = 50A, VD = 15V, ICIN = 0mA VD = 15V, ICIN = 0mA10mA VCC = 300V, IC = 50A Tj = 125C Inductive Load (Upper-Lower Arm) VCE = VCES, VD = 15V (Fig. 4) Tj = 25C Tj = 125C
(Fig. 2)
Switching time
(Fig. 3)
Collector-emitter cutoff current
Min. -- -- -- 0.5 -- -- -- -- -- --
Limits Typ. 1.8 2.0 2.5 1.0 0.1 0.3 3.0 1.0 -- --
Max. 2.6 3.0 3.5 2.0 -- 0.9 4.0 2.0 1 10
Unit V V s s s s s mA
Mar. 2001
MITSUBISHI SEMICONDUCTOR
PM50CTJ060-3
INSULATED PACKAGE FLAT-BASE TYPE
CONTROL PART
Symbol ID Ith(ON) Ith(OFF) OC SC toff(OC) OT OTr UV UVr IFO(H) IFO(L) tFO Parameter Circuit current Input on threshold current Input off threshold current Over current trip level Short circuit trip level Over current delay time Over temperature protection Supply circuit under voltage protection Fault output current Minimum fault output pulse width Test conditions VD = 15V, ICIN = 0mA VN1-VNC VXP1-VXPC Min. -- -- 1 1 65 -- -- 100 -- 11.5 -- -- -- 1.0 Limits Typ. 25 5 3 3 91 130 10 110 90 12.0 12.5 -- 10 1.8 Max. 35 10 5 5 -- -- -- 120 -- 12.5 -- 0.01 15 -- Unit mA mA mA A A s C C V V mA mA ms
At : UP-VUPC, VP-VVPC, WP-VWPC UN * VN * WN-VNC terminals -20C Tj 125C, VD = 15V (Fig. 5, 6) (Lower Arm only) -20C Tj 125C, VD = 15V (Fig. 5, 6) (Lower Arm only) (Fig. 5, 6) VD = 15V Baseplate Trip level Temperature detection, VD = 15V Reset level Trip level -20C Tj 125C (Lower Arm only) Reset level VD = 15V, VFO = 15V VD = 15V (Note 2) (Note 2)
Note 2 : Fault output is given only when the internal OC, SC, OT & UV protections schemes of lower arm device operate to protect it.
MECHANICAL RATINGS AND CHARACTERISTICS
Symbol -- -- Parameter Mounting torque Weight Mounting part Test conditions screw : M4 Min. 0.98 -- Limits Typ. 1.18 80 Max. 1.47 -- Unit N*m g
RECOMMENDED CONDITIONS FOR USE
Symbol VCC VD ICIN(ON) ICIN(OFF) fPWM tdead Supply voltage Input on current Input off current PWM input frequency Arm shoot-through blocking time Parameter Test conditions Applied across P-N terminals Applied between : VUP1-VUPC, VVP1-VVPC VWP1-VWPC, VN1-VNC At : UP, VP, WP, UN, VN, WN terminals For IPM's each input signals, (Fig. 7) For IPM's each input signals, (Fig. 7) Min. 0 13.5 5 0 -- 3.5 Limits Typ. 300 15.0 10 -- -- -- Max. 400 16.5 20 1 8 -- Unit V V mA mA kHz s
Mar. 2001
MITSUBISHI SEMICONDUCTOR
PM50CTJ060-3
INSULATED PACKAGE FLAT-BASE TYPE
PRECAUTIONS FOR TESTING 1. Before appling any control supply voltage (VD), the input signals should be turned on from its off state. After this, the specified ON and OFF level setting for each input signal should be done. 2. When performing "OC" and "SC" tests, the turn-off surge voltage spike at the corresponding protection operation should not be allowed to rise above VCES rating of the device. (These test should not be done by using a curve tracer or its equivalent.)
P, (U,V,W,B)
P,(U,V,W)
ICIN
V
Ic
all open
V
-Ic
VD (all)
U,V,W, (N)
VD (all)
U,V,W,(N)
Fig.1 VCE(sat) Test a) Lower Arm Switching
P Signal input (Upper Arm) ICIN Signal input (Lower Arm) VD(all) VCC U,V,W
Fig.2 VEC Test
trr Irr 90% IC 90%
Vce
b) Upper Arm Switching
Signal input (Upper Arm) Signal input (Lower Arm) VD(all)
N P
IC ICIN
10% tc (on) tc (off)
10%
ICIN
U,V,W
VCC
td (on)
tr
td (off)
tf
ton= td (on) + tr N IC
toff= td (off) + tf
Fig. 3 Switching time Test circuit and waveform
P,(U,V,W) Signal input ICIN VD(all) U,V,W,(N) A
Pulse
ICIN Over Current VCC IC toff (OC) Short Circuit Constant Current OC
Fig.4 ICES Test
Signal input ICIN VD(all) U,V,W,(N) P,(U,V,W) VCC IC IC
SC Constant Current
toff (OC)
Fig. 5 OC and SC Test
P VD ICINP
Fig. 6 OC and SC Test waveform
U,V,W VCC
VD ICINN N IC ICINP 0A ICINN 0A tdead tdead tdead t t Snubber
Fig. 7 Dead time measurement point example
Mar. 2001
MITSUBISHI SEMICONDUCTOR
PM50CTJ060-3
INSULATED PACKAGE FLAT-BASE TYPE
P 560 + VD1 VUP1 UP
VCC In GND
OUT
VUPC
GND
U
560 + VD2
VVP1 VP
VCC In GND
OUT
VVPC
GND
V
560 + VD3
VWP1 WP
VCC In GND
OUT
VWPC
GND
W
UN UN 560 VN VN WN WN FO FO VN1 VCC 33 VD4 VNC GND OWN SWN OVN SVN SUN OUN N
560
NOTES FOR STABLE AND SAFE OPERATION ; Design the PCB pattern to minimize wiring length between opto-coupler and IPM's input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. Connect low impedance capacitor between the Vcc and GND terminal of each switching opto-coupler. Slow switching opto-coupler : CTR = 100%~200% Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the power supply. Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N terminal. Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line and improve noise immunity of the system.
* * * * * *
GND
560
Tb
Tc
Mar. 2001

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