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19-2339; Rev 1; 3/02 KIT ATION EVALU ABLE AVAIL Upstream CATV Amplifier General Description Features o Single 3.3V Supply Operation o Accurate Gain Control, 1dB over 53dB Range o Gain Programmable in 0.5dB Steps o -55dBc Harmonic Distortion at 65MHz o Low Burst On/Off Transient o High Efficiency: 182mW at 34dBmV Out; 16mW in Transmit-Disable Mode MAX3503 The MAX3503 programmable power amplifier is designed for use in CATV upstream applications. The MAX3503 drives 61dBmV (QPSK) into a 75 load when driven with a 34dBmV nominal input signal. Both input and output ports are differential, requiring that an external balun be used at the output port. The variable gain feature provides greater than 56dB of dynamic range, which is controlled by an SPITM 3-wire interface. Gain control is available in 0.5dB steps. The device operates over a frequency range of 5MHz to 65MHz. The MAX3503 is internally matched for use with a 1:1 balun. This device operates from a single 3.3V DC supply and draws 235mA during transmit (100% duty cycle, 61dBmV out). The bias current is automatically adjusted, based on the output level to increase efficiency. Additionally, the device can be disabled between bursts to minimize noise and save power while maintaining a match at the output port. A shutdown mode is available to disable all circuitry and reduce current consumption to 5A (typ). The MAX3503 is available in a 20-pin QFN package. The device operates in the extended industrial temperature range (-40C to +85C). Ordering Information PART MAX3503EGP TEMP RANGE -40C to +85C PIN-PACKAGE 20 QFN-EP* (5mm x 5mm) *Exposed pad. ________________________Applications DOCSIS/EuroDOCSIS and DVB Cable Modems OpenCable Set-Top Box Telephony Over Cable CATV Status Monitor VCC IN+ GND INGND 1 2 3 4 5 Pin Configuration CEXT N.C. N.C. N.C. N.C. TOP VIEW GND 20 19 18 17 16 GND 15 14 13 VCC OUT+ N.C. OUTN.C. MAX3503 12 11 10 GND GND 6 7 8 TXEN 9 Typical Operating Circuit appears at end of data sheet. QFN** SPI is a trademark of Motorola, Inc. DOCSIS/EuroDOCSIS/OpenCable are trademarks of CableLabs(R). **NOTE: CORNER GND PINS AND THE EXPOSED PAD MUST BE SOLDERED TO THE SUPPLY GROUND. ________________________________________________________________ Maxim Integrated Products SHDN SDA SCLK CS 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. Upstream CATV Amplifier MAX3503 ABSOLUTE MAXIMUM RATINGS VCC, OUT+, OUT-..................................................-0.5V to +6.5V Input Voltage Levels (all inputs) .................-0.3V to (VCC + 0.3V) Continuous Input Voltage (IN+, IN-)....................................2VP-P Continuous Current (OUT+, OUT-) ...................................175mA Continuous Power Dissipation (TA = +85C) 20-Pin QFN (derate 27mW/C above +85C) .............1600mW Operating Temperature Range .......................... -40C to +85C Junction Temperature ..................................................... +150C Storage Temperature Range ............................ -65C to +150C Lead Temperature (soldering, 10s) ................................ +300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (MAX3503 EV kit, VCC = 3.1V to 3.6V, VGND = 0, TXEN = SHDN = high, TA = -40C to +85C. Typical parameters are at VCC = 3.3V, TA = +25C, unless otherwise specified.) (Note1) PARAMETER Supply Voltage Supply-Current Transmit Mode Supply-Current Transmit Disable Mode Supply-Current Low-Power Standby LOGIC INPUTS Input High Voltage Input Low Voltage Input High Current Input Low Current VINH VINL IBIASH IBIASL VINH = VCC VINL = 0V -100 2 0.8 100 V V A A SYMBOL VCC ICC ICC ICC D7 = 1, gain code = 115 (Av = 27dB) D7 = 0, gain code = 92 (Av = 0dB) TXEN = low SHDN = low CONDITIONS MIN 3.1 235 55 4.8 5 7 TYP MAX 3.6 287 UNITS V mA mA A AC ELECTRICAL CHARACTERISTICS (MAX3503 EV kit, VCC = 3.1V to 3.6V, VGND = 0, PIN = 34dBmV, TXEN = SHDN = high, TA = -40C to +85C. Typical parameters are at TA = +25C, unless otherwise specified.) (Note 1) PARAMETER SYMBOL CONDITIONS D7 = 1, gain code = 119, TA = 0C to +85C D7 = 1, gain code = 99, TA = 0C to +85C D7 = 1, gain code = 83, TA = 0C to +85C Voltage Gain, fIN = 5MHz AV D7 = 0, gain code = 112, TA = 0C to +85C D7 = 0, gain code = 92, TA = 0C to +85C D7 = 0, gain code = 72, TA = 0C to +85C D7 = 0, gain code = 43, TA = 0C to +85C Voltage Gain, fIN = 65MHz AV D7 = 1, gain code = 119, TA = -40C to +85C (Note 2) MIN 27 17 9 8 -2 -12 -26.5 26.3 TYP 28.5 18.5 10.5 9.5 -0.5 -10.5 -25 MAX 30 20 12 11 1 -9 -23.5 dB dB UNITS 2 _______________________________________________________________________________________ Upstream CATV Amplifier AC ELECTRICAL CHARACTERISTICS (continued) (MAX3503 EV kit, VCC = 3.1V to 3.6V, VGND = 0, PIN = 34dBmV, TXEN = SHDN = high, TA = -40C to +85C. Typical parameters are at TA = +25C, unless otherwise specified.) (Note 1) PARAMETER SYMBOL CONDITIONS VOUT = 61dBmV, fIN = 5MHz to 42MHz, (Note 2) Gain Rolloff VOUT = 61dBmV, fIN = 5MHz to 65MHz, (Note 2) fIN = 5MHz to 65MHz, AV = -26dB to 27dB Gain Step Size fIN = 5MHz to 65MHz, AV = -26dB to 27dB, any 2-bit transition of D0, D1 fIN = 5MHz to 65MHz, D7 = 0, gain code = 112, to D7 = 1, gain code = 83 Transmit-Disable Mode Noise Isolation in Transmit-Disable Mode Transmit Mode Noise Transmit Enable Transient Duration Transmit Disable Transient Duration TXEN = low, BW = 160kHz, fIN = 5MHz to 65MHz (Note 2) TXEN = low, fIN = 5MHz to 65MHz (Note 2) BW = 160kHz, fIN = 5MHz to 65MHz, AV = -26dB to 27dB (Note 2) TXEN input rise/fall time < 0.1s, TA = +25C (Note 2) TXEN input rise/fall time < 0.1s, TA = +25C (Note 2) D7 = 1, gain code = 115 (AV = 27dB), TA = +25C Transmit Disable/Transmit Enable Transient Step Size D7 = 0, gain code = 83 (AV = 11dB), TA = -40C to +85C D7 = 0, gain code = 92 (AV = 0dB), TA = +25C Input Impedance Output Return Loss Output Return Loss in TransmitDisable Mode ZIN fIN = 5MHz to 65MHz, differential (Note 2) fIN = 5MHz to 65MHz, in 75 system, D7 = 1, gain code = 119, (AV = 27dB) fIN = 5MHz to 65MHz, in 75 system, TXEN = low 3 2 10 10 k dB dB 30 60 -55 2 2 80 20 mVP-P 0.7 0.65 -1.1 0.5 1 1 1.3 1.35 -65 dBmV dB dBc s s dB -1.9 MIN TYP -0.6 MAX -1.2 dB UNITS MAX3503 _______________________________________________________________________________________ 3 Upstream CATV Amplifier MAX3503 AC ELECTRICAL CHARACTERISTICS (continued) (MAX3503 EV kit, VCC = 3.1V to 3.6V, VGND = 0, PIN = 34dBmV, TXEN = SHDN = high, TA = -40C to +85C. Typical parameters are at TA = +25C, unless otherwise specified.) (Note 1) PARAMETER SYMBOL CONDITIONS Input tones at 42MHz and 42.2MHz, both 31dBmV, VOUT = 58dBmV/tone (Note 2) Input tones at 65MHz and 65.2MHz, both 31dBmV, VOUT = 58dBmV/tone 2nd Harmonic Distortion 3rd Harmonic Distortion HD2 HD3 fIN = 33MHz, VOUT = 61dBmV fIN = 65MHz, VOUT = 61dBmV (Note 2) fIN = 22MHz, VOUT = 61dBmV fIN = 65MHz, VOUT = 61dBmV MIN TYP -53 -49 -55 -55 -55 -55 -50 -50 -50 -50 dBc dBc MAX -47 dBc UNITS Two-Tone Third-Order Distortion IM3 TIMING CHARACTERISTICS (VCC = 3.1V to 3.6V, VGND = 0V, TXEN = SHDN = high, D7 = 1, TA = +25C, unless otherwise specified.) (Note 2) PARAMETER SEN-to-SCLK Rise Set Time SEN-to-SCLK Rise Hold Time SDA-to-SCLK Setup Time SDA-to-SCLK Hold Time SDA Pulse Width High SDA Pulse Width Low SCLK Pulse Width High SCLK Pulse Width Low SYMBOL tSENS tSENH tSDAS tSDAH TDATAH TDATAL tSCLKH tSCLKL CONDITIONS MIN 20 10 10 20 50 50 50 50 TYP MAX UNITS ns ns ns ns ns ns ns ns Note 1: All parameters guaranteed by design and characterization to 3 sigma for TA < +25C, unless otherwise specified. Note 2: Guaranteed by design and characterization to 6 sigma. 4 _______________________________________________________________________________________ Upstream CATV Amplifier Typical Operating Characteristics (Typical Application Circuit, VCC = 3.3V, VIN = 34dBmV, TXEN = SHDN = high, fIN = 20MHz, ZLOAD = 75, TA = +25C, unless otherwise noted.) SUPPLY CURRENT vs. TEMPERATURE MAX3503 toc01 MAX3503 SUPPLY CURRENT vs. GAIN CODE 390 360 330 300 270 240 210 180 150 120 90 60 30 0 0 MAX3503 toc02 VOLTAGE GAIN vs. SUPPLY VOLTAGE HIGH-POWER MODE GAIN CODE = 119 29.5 29.0 VOLTAGE GAIN (dB) 28.5 28.0 27.5 27.0 -40C +25C MAX3503 toc03 270 240 SUPPLY CURRENT (mA) 210 180 150 120 90 60 30 0 -50 -25 0 25 50 75 TRANSMIT-DISABLE MODE TRANSMIT-ENABLE MODE, LOW NOISE, GAIN CODE = 100 TRANSMIT-ENABLE MODE, HIGH POWER, GAIN CODE = 119 30.0 SUPPLY CURRENT (mA) HIGH-POWER MODE LOW-NOISE MODE 26.5 26.0 20 40 60 80 100 120 140 2.9 3.0 3.1 +85C 100 3.2 3.3 3.4 3.5 3.6 TEMPERATURE (C) GAIN CODE SUPPLY VOLTAGE (V) VOLTAGE GAIN vs. SUPPLY VOLTAGE LOW-NOISE MODE MAX3503 toc04 VOLTAGE GAIN vs. TEMPERATURE HIGH-POWER MODE MAX3503 toc05 VOLTAGE GAIN vs. TEMPERATURE LOW-NOISE MODE -8.2 -8.4 VOLTAGE GAIN (dB) -8.6 -8.8 -9.0 -9.2 -9.4 -9.6 -9.8 -10.0 VCC = 3.0V VCC = 3.6V GAIN CODE = 80 VCC = 3.3V MAX3503 toc06 -25.0 -25.5 -26.0 29.0 28.8 28.6 VOLTAGE GAIN (dB) 28.4 28.2 28.0 27.8 27.6 27.4 27.2 27.0 VCC = 3.6V VCC = 3.0V VCC = 3.3V GAIN CODE = 119 -8.0 GAIN CODE = 43 VOLTAGE GAIN (dB) -26.5 -27.0 -27.5 -28.0 -28.5 -29.0 2.9 3.0 3.1 -40C +25C +85C 3.2 3.3 3.4 3.5 3.6 -40 -15 10 35 60 85 -40 -15 10 35 60 85 SUPPLY VOLTAGE (V) TEMPERATURE (C) TEMPERATURE (C) VOLTAGE GAIN vs. FREQUENCY HIGH-POWER MODE 30 25 VOLTAGE GAIN (dB) 20 15 10 5 0 -5 -10 -15 1 D GAIN CODE A = 119, B = 99, C = 82, D = 62 10 100 1000 -30 -40 1 B C A MAX3503 toc07 VOLTAGE GAIN vs. FREQUENCY LOW-NOISE MODE MAX3503 toc08 VOLTAGE GAIN vs. GAIN CODE 35 30 25 20 15 10 5 0 -5 -10 -15 -20 -25 -30 -35 30 MAX3503 toc09 35 20 10 VOLTAGE GAIN (dB) 0 -10 C -20 GAIN CODE A = 112, B = 92, C = 72, D = 43 10 100 D A B HIGH-POWER MODE VOLTAGE GAIN (dB) LOW-NOISE MODE 1000 40 50 60 70 80 90 100 110 120 GAIN CODE FREQUENCY (MHz) FREQUENCY (MHz) _______________________________________________________________________________________ 5 Upstream CATV Amplifier MAX3503 Typical Operating Characteristics (continued) (Typical Application Circuit, VCC = 3.3V, VIN = 34dBmV, TXEN = SHDN = high, fIN = 20MHz, ZLOAD = 75, TA = +25C, unless otherwise noted.) GAIN STEP vs. GAIN CODE HIGH-POWER MODE MAX3503 toc10 GAIN STEP vs. GAIN CODE LOW-NOISE MODE MAX3503 toc11 TRANSMIT NOISE vs. GAIN CODE MAX3503 toc12 1.0 0.9 0.8 0.7 GAIN STEP (dB) 0.6 0.5 0.4 0.3 0.2 0.1 0.0 60 70 80 90 100 110 120 1.0 0.9 0.8 0.7 GAIN STEP (dB) 0.6 0.5 0.4 0.3 0.2 0.1 30 40 50 60 70 80 -20 OUTPUT NOISE (dBmV IN 160kHz) -25 -30 -35 -40 -45 -50 -55 LOW-NOISE MODE HIGH-POWER MODE 90 100 110 120 30 50 70 90 110 130 GAIN CODE GAIN CODE GAIN CODE 2ND HARMONIC DISTORTION vs. INPUT FREQUENCY MAX3503 toc13 3RD HARMONIC DISTORTION vs. INPUT FREQUENCY -55 3RD HARMONIC DISTORTION (dBc) -60 -65 -70 -75 -80 -85 -90 0.1 0 10 20 30 40 50 60 70 0 61dBmV, HP 50dBmV, HP 20dBmV, LN 6dBmV, LN MAX3503 toc14 POWER-UP/DOWN TRANSIENTS vs. GAIN CODE MAX3503 toc15 -50 -55 2ND HARMONIC DISTORTION (dBc) -60 -65 -70 -75 -80 -85 -90 -95 0 10 20 30 40 50 60 6dBmV, LN 61dBmV, HP 50dBmV, HP 20dBmV, LN -50 100 TRANSIENT LEVEL (mVP-P) 10 HIGH-POWER MODE 1 LOW-NOISE MODE 70 20 40 60 80 100 120 140 INPUT FREQUENCY (MHz) INPUT FREQUENCY (MHz) GAIN CODE OUTPUT RETURN LOSS vs. FREQUENCY (75 SYSTEM) MAX3503 toc16 OUTPUT IMPEDANCE (75 SYSTEM) MAX3503 toc17 OUTPUT SPECTRUM 0 -10 -20 (dB) -30 -40 -50 -60 -70 -80 VOUT = 61dBmV = 0.25 1280ksps MAX3503 toc18 0 -5 OUTPUT RETURN LOSS (dB) -10 -15 -20 -25 -30 1 10 FREQUENCY (MHz) HIGH-POWER MODE 10 LOW-NOISE MODE/ TRANSMITDISABLE MODE LOW-NOISE MODE/ TRANSMIT-DISABLE MODE HIGH-POWER MODE 100 500kHz/div 6 _______________________________________________________________________________________ Upstream CATV Amplifier Typical Operating Characteristics (continued) (Typical Application Circuit, VCC = 3.3V, VIN = 34dBmV, TXEN = SHDN = high, fIN = 20MHz, ZLOAD = 75, TA = +25C, unless otherwise noted.) OUTPUT SPECTRUM MAX3503 toc19 MAX3503 OUTPUT SPECTRUM 0 -10 -20 (dB) -30 -40 -50 -60 -70 -80 VOUT = 61dBmV = 0.25 1280ksps MAX3503 toc20 10 0 -10 -20 (dB) -30 -40 -50 -60 -70 -80 100kHz/div VOUT = 61dBmV = 0.25 160ksps 10 6MHz/div Pin Description PIN 1 2 3 4 5 6 7 8 9 10 11,13,17-20 12 14 15 16 Exposed Paddle NAME VCC IN+ GND INGND SDA SCLK CS TXEN SHDN N.C. OUTOUT+ VCC CEXT GND DESCRIPTION Programmable-Gain Amplifier (PGA) 3.3V Supply. Bypass to GND with a 0.1F decoupling capacitor as close to the part as possible. Positive PGA Input. Along with IN-, this port forms a high-impedance differential input to the PGA. Driving this port differentially increases the rejection of second-order distortion at low output levels. PGA RF Ground. As with all ground connections, maintain the shortest possible (low-inductance) length to the ground plane. Negative PGA Input. When not used, this port must be AC-coupled to ground. See IN+. Ground Serial-Interface Data. TTL-compatible input. See Serial Interface section. Serial-Interface Clock. TTL-compatible input. See Serial Interface section. Serial-Interface Enable. TTL-compatible input. See Serial Interface section. Transmit Enable. Drive TXEN high to place the device in transmit-enable mode. Shutdown. When SHDN is set low, all functions (including the serial interface) are disabled. No Connection Negative Output. Along with OUT+, this port forms a 75 impedance output. This port is matched to a 75 load using a 1:1 transformer. Positive Output. See OUT-. Output Amplifier Bias, 3.3V Supply. Bypass to GND with a 0.1F decoupling capacitor as close to the part as possible. RF Output Bypass. Bypass to GND with a 0.1F capacitor. Ground _______________________________________________________________________________________ 7 Upstream CATV Amplifier MAX3503 Functional Diagram TXEN SHDN VCC BIAS CONTROL MAX3503 HIGH POWER OUTCEXT IN+ OUT+ INLOW NOISE D/A CONVERTER SERIAL DATA INTERFACE CS SDA SCLK GND Detailed Description Programmable-Gain Amplifier The PGA consists of the variable-gain amplifier (VGA) and the digital-to-analog converter (DAC), which provide better than 56dB of output-level control in 0.5dB steps. The PGA is implemented as a programmable Gilbert-cell attenuator. The gain of the PGA is determined by a 7-bit word (D6-D0) programmed through the serial data interface (Tables 1 and 2). Specified performance is achieved when the input is driven differentially. The device may be driven single ended. To drive the device in this manner, one of the input pins must be capacitively coupled to ground. Use a capacitor value large enough to allow for a lowimpedance path to ground at the lowest frequency of operation. For operation down to 5MHz, a 0.001F capacitor is recommended. mode, the output amplifiers are powered down. A resistor is placed across the output, so that the output impedance remains matched when the amplifier is in transmit-disable mode. Disabling the output devices also results in low output noise. To match the output impedance to a 75 load, the transformer must have a turns ratio of 1:1. The differential amplifier is biased directly from the 3.3V supply using the center tap of the output transformer. This provides a significant benefit when switching between transmit mode and transmit-disable mode. Stored energy due to bias currents cancels within the transformer and prevents switching transients from reaching the load. Serial Interface The serial interface has an active-low enable (CS) to bracket the data, with data clocked in MSB first on the rising edge of SCLK. Data is stored in the storage latch on the rising edge of CS. The serial interface controls the state of the PGA and the output amplifiers. Tables 1 and 2 show the register format. Serial-interface timing is shown in Figure 1. Output Amplifiers The output amplifiers are Class A differential amplifiers, capable of driving 61dBmV (QPSK) differentially. This architecture provides superior even-order distortion performance but requires that a transformer be used to convert to a single-ended output. In transmit-disable 8 _______________________________________________________________________________________ Upstream CATV Amplifier Applications Information High-Power and Low-Noise Modes The MAX3503 has two transmit modes, high power (HP) and low noise (LN). Each of these modes is actuated by the high-order bit, D7, of the 8-bit programming word. When D7 is a logic 1, HP mode is enabled. When D7 is a logic 0, LN mode is enabled. Each of these modes is characterized by the activation of a distinct output stage. In HP mode, the output stage exhibits 10.5dB higher gain than LN mode. The lower gain of LN output stage allows for significantly lower output noise and lower transmit-enable/transmit-disable transients. The full range of gain codes (D6-D0) can be used in either mode. For DOCSIS applications, HP mode is recommended for output levels at or above 10.5dBmV (D7 = 1, gain code = 83), LN mode when the output level is below 9.5dBmV (D7 = 0, gain code = 112). A G B C D E F MAX3503 D7 D6 A. tSENS B. tSDAS C. tSDAH D. tSCKL D5 D4 D3 D2 D1 D0 E. tSCKH F. tSENH G. tDATAH/tDATAL Figure 1. Serial-Interface Timing Diagram Shutdown Mode In normal operation, the shutdown pin (SHDN) is held high. When SHDN is taken low, all circuits within the IC are disabled. Only leakage currents flow in this state. Data stored within the serial-data interface latches are lost upon entering this mode. Current consumption is reduced to 5A (typ) in shutdown mode. Table 1. Serial-Interface Control Word BIT MSB 7 6 5 4 3 2 1 LSB 0 MNEMONIC D7 D6 D5 D4 D3 D2 D1 D0 DESCRIPTION High-power/low-noise mode select Gain code, bit 6 Gain code, bit 5 Gain code, bit 4 Gain code, bit 3 Gain code, bit 2 Gain code, bit 1 Gain code, bit 0 Transformer To match the output of the MAX3503 to a 75 load, a 1:1 transformer is required. This transformer must have adequate bandwidth to cover the intended application. Note that most RF transformers specify bandwidth with a 50 source on the primary and a matching resistance on the secondary winding. Operating in a 75 system tends to shift the low-frequency edge of the transformer bandwidth specification up by a factor of 1.5, because of primary inductance. Keep this in mind when specifying a transformer. Bias to the output stage is provided through the center tap on the transformer primary. This greatly diminishes the on/off transients present at the output when switching between transmit and transmit-disable modes. Commercially available transformers typically have adequate balance between half-windings to achieve substantial transient cancellation. Finally, keep in mind that transformer core inductance varies proportionally with temperature. If the application requires low temperature extremes (less than 0C), adequate primary inductance must be present to sustain low-frequency output capability as temperatures drop. In general this is not a problem, as modern RF transformers have adequate bandwidth. Input Circuit To achieve rated performance, drive the inputs of the MAX3503 differentially with an appropriate input level. The differential input impedance is approximately 2k. Most applications requires a differential lowpass filter preceding the device. The filter design dictates a terminating impedance of a specified value. Place this load impedance across the AC-coupled input pins (see the Typical Operating Circuit). The MAX3503 has sufficient gain to produce an output level of 61dBmV (QPSK) when driven with a 34dBmV input signal. When a lower input level is present, the maximum output level is reduced proportionally and output linearity increases. If an input level greater than 34dBmV is used, the 3rd-order distortion performance degrades slightly. If single-ended sources drive the MAX3503, one of the input terminals must be capacitively coupled to ground 9 _______________________________________________________________________________________ Upstream CATV Amplifier MAX3503 Table 2. Chip-State Control Bits SHDN 0 1 1 1 1 1 1 1 1 1 TXEN X 0 1 1 1 1 1 1 1 1 D7 X X 1 0 0 0 0 1 1 1 D6 X X X X 0 1 1 1 1 1 D5 X X X X 1 0 1 0 1 1 D4 X X X X 1 1 0 1 0 1 D3 X X X X 0 0 1 0 1 0 D2 X X X X 0 0 1 1 1 1 D1 X X X X 0 0 1 1 1 1 D0 X X X X 0 0 0 0 1 1 43 92 112 83 99 119 GAIN CODE (DECIMAL) STATES Shutdown mode Transmit-disable mode Transmit-enable mode, high power Transmit-enable mode, low noise AV = -26.0dB* AV = -0.5dB* AV = -95dB* AV = -10.5dB* AV = -18.5dB* AV = -28.5dB* *Typical gain at +25C, VCC = 3.3V. (IN+ or IN-). The value of this capacitor must be large enough to look like a short circuit at the lowest frequency of interest. For operation at 5MHz with a 75 source impedance, a value of 0.001F suffices. a separate power-supply node in the circuit. At the end of each of these traces is a decoupling capacitor that provides very low impedance at the frequency of interest. This arrangement provides local power-supply decoupling at each power-supply pin. The power-supply traces must be made as thick as is practical. Ground inductance degrades distortion performance. Therefore, make ground plane connections with multiple vias. Layout Issues A well-designed PC board is an essential part of an RF circuit. For best performance, pay attention to power-supply layout issues as well as to the output circuit layout. Output Circuit Layout The differential implementation of the MAX3503's output has the benefit of significantly reducing even-order distortion, the most significant of which is 2nd harmonic distortion. The degree of distortion cancellation depends on the amplitude and phase balance of the overall circuit. Keep the trace lengths from the output pins equal. Exposed-Paddle Thermal Considerations The MAX3503's 20-pin QFN package provides a low thermal-resistance path to the die. The PC board on which the MAX3503 is mounted must be designed to conduct heat from this contact. In addition, the EP should be provided with a low-inductance path to electrical ground. Maxim recommends that the EP be soldered to a ground plane on the PC board, either directly or through an array of plated via holes. Power-Supply Layout For minimal coupling between different sections of the IC, the ideal power-supply layout is a star configuration. This configuration has a large-value decoupling capacitor at the central power-supply node. The powersupply traces branch out from this node, each going to Chip Information TRANSISTOR COUNT: 1180 SUBSTRATE CONNECTED TO GND 10 ______________________________________________________________________________________ Upstream CATV Amplifier Typical Application Circuit 10 CONTROL LOGIC 0.001F + 2 IN+ OUT+ 14 1:1 OUTPUT SHDN 9 TXEN VCC GND N.C. 15 0.1F 3.3V MAX3503 INPUT ANTI-ALIAS FILTER 3.3V MAX3503 3.3V 0.1F 4 0.001F 1 3 IN- OUT- 12 0.1F 0.1F VCC GND N.C. N.C. N.C. CEXT 16 GND SCLK SDA CS 5 7 6 8 CONTROL LOGIC ______________________________________________________________________________________ 11 Upstream CATV Amplifier MAX3503 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 32L QFN .EPS 12 ______________________________________________________________________________________ Upstream CATV Amplifier Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) MAX3503 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. |
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