View M66008FP_352032.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MITSUBISHI DIGITAL ASSP MITSUBISHI DIGITAL ASSP
M66008P/FP M66008P/FP
16-BIT I/O EXPANDER 16-BIT I/O EXPANDER
DESCRIPTION The M66008 is a semiconductor integrated circuit providing the 16-bit serial input-parallel output and parallel input-serial output shift register function. Independent built-in registers for serial input-parallel output and parallel input-serial output enable serial input data to be read into a shift register during output of serial data converted from parallel data. In addition, parallel data input/output pin can be placed in input or output mode in bits. The M66008 is widely applicable to I/O port extension for MCU, data communication of serial bus system, etc. FEATURES * Two-way serial data communication with MCU * Reading of serial data during parallel-serial data conversion * Division of I/O bit in parallel data input/output * Low power consumption of 50 W/package maximum (Vcc=5V, Ta=25C at time of standstill) * Schmitt triggered input (DI, CLK, S, CS) * Open drain output (DO, D1~D16) * With parallel data input/output (D1~D16) * Wide operating supply voltage range (Vcc=2~6V) * Wide operating temperature range (Ta=-20~75C)
PIN CONFIGURATION (TOP VIEW)
SERIAL DATA OUTPUT SERIAL DATA INPUT
DO 1 DI 2 CS 4 VCC
5
DO DI CLK CS
D1 D2 D3 D4 D5
24 D1 23 D2
22 D3
CLOCK INPUT CLK 3 CHIP SELECT INPUT
21 D4 20 19 18 17 16 15 14 13
SET INPUT
S 6 GND
7
S
D6 D7
D16 PARALLEL DATA D15 INPUT/OUTPUT D14 D13
8 9 10 11
12
D16 D15 D14 D13
D8 D9 D10 D11 D12
GND
D5 D6 PARALLEL DATA D7 INPUT/OUTPUT D8 D9 D10 D11 D12
Outline 24P4D 24P2N-B
APPLICATION Parallel/serial data conversion for MCU periphery, serial bus control by parallel/serial data conversion MCU, etc.
BLOCK DIAGRAM
VCC 5
CONTROL CIRCUIT
CLOCK INPUT CLK 3 SET INPUT S6
SHIFT REGISTER ! D16 D15 D14
DO
SERIAL 1 DODATA OUTPUT VCC 24 D1

D3 D2 D1 23 D2 22 D3
D14 D15 D16
PARALLE DATA INPUT/OUTPUT
CHIP SELECT INPUT CS 4
CLK S CS DI INPUT FORMAT
Q16 Q15 Q14 D16 D15 D14 Q16 D15 D14 D1
Q3 Q2 Q1 D3 D2 D1 Q3 Q2 Q1 10 9 8 7 GND 12 GND
PARALLEL OUTPUT LATCH
VCC DO
VCC D1~ D16
SHIFT REGISTER @ SERIAL DI 2 DATA INPUT
OUTPUT FORMAT
1
MITSUBISHI DIGITAL ASSP
M66008P/FP
16-BIT I/O EXPANDER
FUNCTION The M66008 uses a silicon gate CMOS process to achieve low power consumption and high noise margin. The M66008 independently forms a 16-bit serial input-parallel output shift register and a parallel input-serial output shift register to read serial input data during output of serial data converted from parallel data. The operation for serial output of 16-bit parallel data and operation for reading serial data from MCU by changing CS from "H" to "L". That is, at a falling edge of CS, 16-bit parallel data is latched and serial data is output from the DO pin in synchronization with 16-bit parallel data at a falling edge of shift clock. In addition, serial data from MCU is read into an internal shift register via the DI pin at a rising edge of shift clock. The 17th bit shift clock and later clocks are ignored. When the reading operation is masked, the DO pin is placed in high impedance status. When CS changes from "L" to "H", 16-bit serial data read from the DI pin is output to pins D1 to D16 in parallel. Since the output format of the parallel output pin is set to Nchannel open drain output, write "H" data into a terminal placed in input mode.
OPERATION DESCRIPTION (1) When power is turned on, DO and D1~D16 are indeterminate. However, they are placed in high impedance status by setting S to "L". (2) The status of D1 to D16 is loaded to shift register ! at a falling edge of CS. (3) At a falling edge of CLK, 16-bit serial output of the data loaded in step (2) is sequentially performed from DO. (4) At a rising edge of CLK, 16-bit serial data is written into shift register @ from DI. (5) CLK of 17th bit and later is ignored and serial data cannot be written. DO is placed in high impedance status. (6) At a rising edge of CS, data written in step (4) is output to D1 to D16. (7) Shift register ! loads data to be applied externally and AND data having the latched content to parallel output latch. (8) When CS is activated before arrival of CLK at the 16th bit, parallel output latch outputs to D1 to D16 by latching the data that has been written into shift register @. Shift registers ! and @ continues the shift operation until it arrives at the 16th bit of CLK and DO output serial data. (9) Serial data is used to control the operation for switching input/output mode of D1 to D16. The pin set to "H" operates as an input pin.
OPERATION TIMING DIAGRAM
H S (1) L (2) (5) CLK 1 2 (4) DI DO1 (3) DO DI1 DI2 DI3 DI4 DI5 DI6 DI7 DI8 DI9 DO2 DO3 DO4 DO5 DO6 DO7 DO8 DO9 DO15 DO16 High impedance DI15 DI16 (6) D1 DI1 DO1 3 4 5 6 7 8 9 10 15 16 17
CS
D2
~
DI2
DO2
DI6
DI16 1 cycle
DO16
2
MITSUBISHI DIGITAL ASSP
M66008P/FP
16-BIT I/O EXPANDER
ABSOLUTE MAXIMUM RATINGS (Ta = -20 ~ 75C unless otherwise noted)
Symbol VCC VI VO IIK IOK IGND Tstg Supply voltage Input voltage Output voltage Input protection diode current Output incidental diode current Current/GND Storage temperature VI<0V VI>VCC VO<0V VO>VCC GND Parameter Conditions Ratings -0.5 ~ +7 -0.5 ~ VCC + 0.5 -0.5 ~ VCC + 0.5 -20 20 -20 20 -64 -65 ~ 150 Unit V V V mA mA mA C
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO Topr Parameter Supply voltage Input voltage Output voltage Operating temperature Min. 2 0 0 -20 Limits Typ. Max. 6 VCC VCC 75 Unit V V V C
ELECTRICAL CHARACTERISTICS (VCC = 2 ~ 6V unless otherwise noted)
Symbol Parameter Threshold voltage in positive direction Threshold voltage in negative direction High-level input voltage Low-level input voltage Low-level output voltage Maximum output leak current High-level input current Low level input current Static consumption current Conditions VO=0.1V, VCC-0.1V |IO|=20A VO=0.1V, VCC-0.1V |IO|=20A VO=0.1V, VCC-0.1V |IO|=20A VO=0.1V, VCC-0.1V |IO|=20A VI=VT+, VT- VCC=4.5V VI=VT+, VT- VCC=6V VI=VCC VI=GND VI=VCC, GND Limits Ta=25C Min. Typ. Max. 0.35 0.8 x VCC x VCC 0.2 0.65 x VCC x VCC 0.75 x VCC 0.25 x VCC 0.4 1.0 -1.0 0.1 -0.1 10.0 Ta= -20~75C Min. Max. 0.35 0.8 x VCC x VCC 0.2 0.65 x VCC x VCC 0.75 x VCC 0.25 x VCC 0.5 10.0 -10.0 1.0 -1.0 100.0 Unit
VT+ VT- VIH VIL VOL IO IIH IIL ICC
CLK, CS S, DI
V V V V V A A A A
D1~D16
IOL=3mA VO=VCC VO=GND VCC=6V VCC=6V VCC=6V
SWITCHING CHARACTERISTICS (VCC = 5V)
Symbol fmax tPLZ tPZL tPLZ tPZL tPLZ Parameter Maximum repetition frequency Output "L-Z", "Z-L" propagation time CLK-DO Output "L-Z", "Z-L" propagation time CS-D1 to D16 Output "L-Z" propagation time S-DO, D1 ~ D16 Conditions Limits Ta=25C Min. Typ. Max. 2.5 300 300 300 300 300 Ta= -20~75C Min. Max. 1.9 400 400 400 400 400 Unit MHz ns ns ns ns ns
CL=50pF RL=1k (Note 2)
3
MITSUBISHI DIGITAL ASSP
M66008P/FP
16-BIT I/O EXPANDER
TIMING REQUIREMENTS (VCC = 5V)
Limits Symbol tw tsu Parameter CLK, CS, S pulse width DI set up time for CLK CS set up time for CLK D1~D16 set up time for CS DI hold time for CLK CS hold time for CLK D1~D16 hold time for CS CS recovery time for S Conditions Ta=25C Min. Typ. Max. 200 100 100 100 100 100 100 100 Ta= -20~75C Min. Max. 260 130 130 130 130 130 130 130 Unit ns ns
th trec
ns ns
Note 2: Test Circuit
Input
VCC
VCC
RL PG 50 GND DUT CL Output
(1) Characteristics (10%~90%) of pulse generator (PG) tr=6ns, tf=6ns (2) Electrostatic capacitance CL includes the floating capacitance of connection and probe input capacitance.
4
MITSUBISHI DIGITAL ASSP
M66008P/FP
16-BIT I/O EXPANDER
TIMING DIAGRAM
tw CLK 50% tPLZ DO 50% tw VCC 50% tPZL VCC 10% 50% VOL CS GND 50% GND trec VCC S GND VCC
tw CS 50% tPLZ D1 ~ D16 50%
tw VCC 50% tPZL VCC 50% VOL 50% GND
10%
tw VCC S 50% tPLZ DO D1 ~ D16 VCC 10% VOL 50% GND
VCC DI 50% tsu CLK th VCC 50% GND 50% GND
VCC D1 ~ D16 50% tsu CS th VCC 50% GND 50% GND
VCC CS 50% tsu CLK 50% th VCC 50% GND 50% GND
5

▲Up To Search▲

Price & Availability of M66008FP

	To Download M66008FP Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .