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| IRF720 Data Sheet July 1999 File Number 1579.4 3.3A, 400V, 1.800 Ohm, N-Channel Power MOSFET This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17404. Features * 3.3A, 400V * rDS(ON) = 1.800 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" Ordering Information PART NUMBER IRF720 PACKAGE TO-220AB BRAND IRF720 Symbol D NOTE: When ordering, use the entire part number. G S Packaging JEDEC TO-220AB SOURCE DRAIN GATE DRAIN (FLANGE) 4-1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 IRF720 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified IRF720 400 400 3.3 2.1 13 20 50 0.4 190 -55 to 150 300 260 UNITS V V A A A V W W/oC mJ oC oC oC Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured From the Contact Modified MOSFET Screw on Tab to Center of Die Symbol Showing the Internal Device Measured From the Drain Inductances Lead, 6mm (0.25in) From Package to Center of Die D TEST CONDITIONS ID = 250A, VGS = 0V, (Figure 10) VDS = VGS, ID = 250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7) VGS = 20V ID = 1.8A, VGS = 10V, (Figures 8, 9) VDS 10V, ID = 2.0A, (Figure 12) VDD = 200V, ID 3.3A, RGS = 18, VGS = 10V, RL = 59 MOSFET Switching Times are Essentially Independent of Operating Temperature VGS = 10V, ID = 3.3A, VDS = 0.8 x Rated BVDSS IG(REF) = 1.5mA, (Figure 14) Gate Charge is Essentially Independent of Operating Temperature VDS = 25V, VGS = 0V, f = 1MHz, (Figure 10) MIN 400 2.0 3.3 1.7 - TYP 1.5 2.7 10 14 30 13 12 2.0 6.0 360 55 20 3.5 4.5 MAX 4.0 25 250 100 1.8 15 21 45 20 20 - UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH nH Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance Internal Source Inductance LS Measured From the Source Lead, 6mm (0.25in) from Header to Source Bonding Pad LD G LS S - 7.5 - nH Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient RJC RJA Free Air Operation - - 2.5 80 oC/W oC/W 4-2 IRF720 Source to Drain Diode Specifications PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier G D MIN - TYP - MAX 3.3 13 UNITS A A S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES: VSD trr QRR TJ = 25oC, ISD = 3.3A, VGS = 0V, (Figure 13) TJ = 25oC, ISD = 3.3A, dISD/dt = 100A/s TJ = 25oC, ISD = 3.3A, dISD/dt = 100A/s 120 0.64 - 1.6 600 3.0 V ns C 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 50V, starting TJ = 25oC, L = 31H, RGS = 25, peak IAS = 3.3A. Typical Performance Curves 1.2 POWER DISSIPATION MULTIPLIER 1.0 Unless Otherwise Specified 5 0.8 0.6 0.4 0.2 0 ID, DRAIN CURRENT (A) 4 3 2 1 0 50 100 150 0 25 50 75 100 125 150 TC, CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE 3.0 ZJC, TRANSIENT THERMAL IMPEDANCE (oC/W) 0.5 0.2 0.1 0.05 0.1 0.02 0.01 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1.0 PDM SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 0.1 1 10 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 4-3 IRF720 Typical Performance Curves 100 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10 10s 100s Unless Otherwise Specified (Continued) 5 VGS = 10V VGS = 6.0V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 4 3 VGS = 5.5V 1 TJ = MAX RATED TC = 25oC SINGLE PULSE 1 10 102 VDS, DRAIN TO SOURCE VOLTAGE (V) 1ms 10ms DC 103 2 VGS = 5.0V 1 VGS = 4.0V 0 0 40 80 120 160 200 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = 4.5V 0.1 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS 5 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 10 VGS = 10V ID, DRAIN CURRENT (A) VGS = 6.0V ID, DRAIN CURRENT (A) 4 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V 1 3 VGS = 5.5V 2 VGS = 5.0V 1 VGS = 4.0V 0 0 3 6 9 12 15 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = 4.5V TJ = 150oC 0.1 TJ = 25oC 0.01 0 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS 10 8 rDS(ON), NORMALIZED ON RESISTANCE PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 3.0 rDS(ON), DRAIN TO SOURCE ON RESISTANCE 2.4 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID =1.8A 6 VGS = 20V 1.8 4 VGS = 10V 2 1.2 0.6 0 0 3 6 9 12 15 ID, DRAIN CURRENT (A) 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ, JUNCTION TEMPERATURE (oC) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 4-4 IRF720 Typical Performance Curves 1.25 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A Unless Otherwise Specified (Continued) 1000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGS 1.15 C, CAPACITANCE (pF) 800 1.05 600 CISS 400 CRSS 200 COSS 0.95 0.85 0.75 -60 -40 -20 0 20 40 60 80 100 120 140 160 0 1 2 TJ, JUNCTION TEMPERATURE (oC) 5 10 2 5 VDS, DRAIN TO SOURCE VOLTAGE (V) 102 FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 5 4 TJ = 25oC 3 ISD, SOURCE TO DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 102 gfs, TRANSCONDUCTANCE (S) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 10 2 TJ = 150oC 1 TJ = 150oC TJ = 25oC 1 0 0 1 2 3 4 5 ID , DRAIN CURRENT (A) 0.1 0 0.4 0.8 1.2 1.6 2.0 VSD, SOURCE TO DRAIN VOLTAGE (V) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 VGS, GATE TO SOURCE VOLTAGE (V) ID = 3.3A VDS = 320V 16 12 VDS = 80V 8 VDS = 200V 4 0 0 4 8 12 16 20 Qg, GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 4-5 IRF720 Test Circuits and Waveforms VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD + - 0V IAS 0.01 0 tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON td(ON) tr RL VDS 90% tOFF td(OFF) tf 90% + RG DUT - VDD 0 10% 90% 10% VGS VGS 0 10% 50% PULSE WIDTH 50% FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS CURRENT REGULATOR VDS (ISOLATED SUPPLY) VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS 12V BATTERY 0.2F 50k 0.3F G DUT 0 IG(REF) 0 IG CURRENT SAMPLING RESISTOR S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0 FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS 4-6 IRF720 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 4-7 |
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