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 HA-2505
Data Sheet May 1999 File Number 2890.5
12MHz, High Input Impedance, Operational Amplifier
HA-2505 is an operational amplifier whose design is optimized to deliver excellent slew rate, bandwidth, and settling time specifications. The outstanding dynamic features of this internally compensated device are complemented with low offset voltage and offset current. This dielectrically isolated amplifier is ideally suited for applications such as data acquisition, RF, video, and pulse conditioning circuits. Slew rates of 30V/s and 330ns (0.1%) settling time make this device an excellent component in fast, accurate data acquisition and pulse amplification designs. 12MHz small signal bandwidth and 500kHz power bandwidth make this device well suited to RF and video applications. With 2mV typical offset voltage plus offset trim capability and 10nA offset current, HA-2505 is particularly useful in signal conditioning designs. The gain and offset voltage figures of the HA-2505 are optimized by internal component value changes while the similar design of the HA-2515 is maximized for slew rate. MIL-STD-883 product and data sheets are available upon request.
Features
* Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V/s * Fast Settling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330ns * Full Power Bandwidth . . . . . . . . . . . . . . . . . . . . . . 500kHz * Gain Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . 12MHz * High Input Impedance . . . . . . . . . . . . . . . . . . . . . . 50M * Low Offset Current . . . . . . . . . . . . . . . . . . . . . . . . . . 10nA * Internally Compensated For Unity Gain Stability
Applications
* Data Acquisition Systems * RF Amplifiers * Video Amplifiers * Signal Generators
Pinout
HA-2505 (PDIP) TOP VIEW
Ordering Information
PART NUMBER HA3-2505-5 TEMP RANGE (oC) 0 to 75 PACKAGE 8 Ld PDIP PKG. NO. E8.3
BAL -IN +IN V-
1 2 3 4
8
COMP V+ OUT BAL
+
7 6 5
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
HA-2505 Schematic
BAL BAL
V+ R5 200 R6 R9 200 200 R8 200 R11 2K Q10 C2 10.6pF C1 10pF R12 1.1K Q16 Q11 Q14 Q12 Q15 R4 11.13K R14 30 Q18 R13 30 OUTPUT
Q1
Q2 R2 2K R3 960 Q4 COMP + INPUT Q35
R1 4K
R7 R10 1.8K 1.8K Q6 Q8
Q3
Q5 Q7 Q9
Q17
Q37 Q38 800 R25 Q29 Q30 Q31 R23 3.3K R22 1.12K Q39 800 R26 Q28
Q40 R19 6.3K Q13
Q19
Q26 Q27 R20 3.3K Q23 Q24 R18 1.48K
Q25 Q22 R17 1.48K R16 1.48K Q20 Q21 R15 740 V-
Q34 Q33 Q32
Q36
- INPUT
2
HA-2505
Absolute Maximum Ratings
Supply Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . 40V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V Peak Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range HA-2505-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
VS = 15V TEMP (oC) HA-2505-5 MIN TYP MAX UNITS
PARAMETER INPUT CHARACTERISTICS Offset Voltage
25 Full
20 10 15 10 74 10 10 300
4 20 125 20 50 -
8 10 250 500 50 100 -
mV mV V/oC nA nA nA nA M V
Offset Voltage Average Drift Bias Current
Full 25 Full
Offset Current
25 Full
Input Resistance (Note 2) Common Mode Range TRANSFER CHARACTERISTICS Large Signal Voltage Gain (Notes 3, 6)
25 Full
25 Full
25 90 12 12 20 500
-
kV/V kV/V dB MHz
Common Mode Rejection Ratio (Note 4) Gain Bandwidth Product (Note 5) OUTPUT CHARACTERISTICS Output Voltage Swing (Note 3) Output Current (Note 6) Full Power Bandwidth (Notes 6, 11) TRANSIENT RESPONSE Rise Time (Notes 3, 7, 8, 9) Overshoot (Notes 3, 7, 8, 9) Slew Rate (Notes 3, 7, 9, 12) Settling Time to 0.1% (Notes 3, 7, 9, 12) POWER SUPPLY CHARACTERISTICS Supply Current PSRR (Note 10) NOTES: 2. This parameter value is based on design calculations. 3. RL = 2k. 4. VCM = 10V. 5. AV > 10. 6. VO = 10V. 7. CL = 50pF.
Full 25
Full 25 25
-
V mA kHz
25 25 25 25
20 -
25 25 30 0.33
50 50 -
ns % V/s s mA dB
25 Full 8. VO = 200mV.
74
4 90
6 -
9. See Transient Response Test Circuits and Waveforms. 10. V = 5V. 11. Full Power Bandwidth guaranteed based on slew rate measurement using: FPBW = Slew Rate/2VPEAK. 12. VOUT = 5V.
3
HA-2505 Test Circuits and Waveforms
+200mV +5V INPUT -5V +5V 75% OUTPUT -5V 25% t V SLEW RATE = V/t ERROR BAND 10mV FROM FINAL VALUE INPUT 0mV OVERSHOOT +200mV 90% OUTPUT 10% 0mV RISE TIME
SETTLING TIME
NOTE: Measured on both positive and negative transitions from 0V to +200mV and 0V to -200mV at the output. FIGURE 2. TRANSIENT RESPONSE
FIGURE 1. SLEW RATE AND SETTLING TIME
IN
+ OUT 2k 50pF
RL = 2k, CL = 50pF Upper Trace: Input Lower Trace: Output FIGURE 3. SLEW RATE AND TRANSIENT RESPONSE
V+ 1F
Vertical = 5V/Div. Horizontal = 200ns/Div. TA = 25oC, VS = 15V
FIGURE 4. VOLTAGE FOLLOWER PULSE RESPONSE
V+ INPUT 2k 2 3 + 7 0.01F 6 4 1F 50pF 5k VD 2N4416 S 2k CR1 CR2 0.01F 2k 5k SETTLING TIME TEST POINT IN BAL COMP VCC OUT RT OUTPUT 20k
G
13. AV = -1. 14. Feedback and Summing Resistor Ratios should be 0.1% matched. 15. Clipping Diodes CR1 and CR2 are optional. HP5082-2810 recommended. FIGURE 5. SETTLING TIME TEST CIRCUIT FIGURE 6. SUGGESTED VOS ADJUSTMENT AND COMPENSATION HOOK UP NOTE: Tested offset adjustment range is |VOS + 1mV| minimum referred to output. Typical ranges are 6mV with RT = 20k.
4
HA-2505 Typical Performance Curves VS = 15V, TA = 25oC, Unless Otherwise Specified
100 80 BIAS CURRENT 60 CURRENT (nA) 40 20 OFFSET CURRENT 0 -20 -40 EQUIVALENT INPUT NOISE (VRMS) 100
10
10K SOURCE RESISTANCE 0 SOURCE RESISTANCE
1.0 THERMAL NOISE OF 10K RESISTOR
-50
-25
0 25 50 TEMPERATURE (oC)
75
100
125
0.1 100Hz
1kHz
10kHz FREQUENCY (Hz)
100kHz
1MHz
FIGURE 7. INPUT BIAS AND OFFSET CURRENT vs TEMPERATURE
1.1 OPEN LOOP VOLTAGE GAIN (dB)
FIGURE 8. EQUIVALENT INPUT NOISE vs BANDWIDTH (WITH 10Hz HIGH PASS FILTER)
120 100 80 60 40 20 0 -20 10 GAIN PHASE 0 30 PHASE (DEGREES) 60 90 120 150 180
NORMALIZED PARAMETERS REFERRED TO VALUES AT 25oC
1.0 BANDWIDTH SLEW RATE 0.9
0.8 -50 -25 0 25 50 TEMPERATURE (oC) 75 100 125
100
1K
10K 100K FREQUENCY (Hz)
1M
10M
100M
FIGURE 9. NORMALIZED AC PARAMETERS vs TEMPERATURE
FIGURE 10. OPEN LOOP FREQUENCY AND PHASE RESPONSE
120
NORMALIZED PARAMETERS REFERRED
1.1 OPEN LOOP VOLTAGE GAIN (dB) 100 80 60 40 20 0 -20 10 15 SUPPLY VOLTAGE (V) 20 300pF 1000pF 0pF 30pF 100pF
BANDWIDTH TO VALUES AT 15V 1.0 SLEW RATE
0.9
0.8 10
100
1K
10K 100K FREQUENCY (Hz)
1M
10M
100M
NOTE: External compensation components are not required for stability, but may be added to reduce bandwidth if desired. FIGURE 11. NORMALIZED AC PARAMETERS vs SUPPLY VOLTAGE FIGURE 12. OPEN LOOP FREQUENCY RESPONSE FOR VARIOUS VALUES OF CAPACITORS FROM COMPENSATION PIN TO GROUND
5
HA-2505 Typical Performance Curves VS = 15V, TA = 25oC, Unless Otherwise Specified
35 VSUPPLY = 20V VSUPPLY = 15V VSUPPLY = 10V 90 GAIN (dB) OUTPUT VOLTAGE SWING (VP-P) 30 25 20 15 10 5 0 10K VSUPPLY = 15V VSUPPLY = 20V
(Continued)
VSUPPLY = 10V
80 -50 -25 0 25 50 75 100 125 TEMPERATURE (oC)
100K
1MEG 10MEG FREQUENCY (Hz)
FIGURE 13. OPEN LOOP VOLTAGE GAIN vs TEMPERATURE
FIGURE 14. OUTPUT VOLTAGE SWING vs FREQUENCY
5
SUPPLY CURRENT (mA)
VSUPPLY = 20V VSUPPLY = 15V 4 VSUPPLY = 10V
3 -50 -25 0 25 50 TEMPERATURE (oC) 75 100 125
FIGURE 15. POWER SUPPLY CURRENT vs TEMPERATURE
6
HA-2505 Die Characteristics
DIE DIMENSIONS: 57 mils x 65 mils x 19 mils 1450m x 1650m x 483m METALLIZATION: Type: Al, 1% Cu Thickness: 16kA 2kA PASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.) Silox Thickness: 12kA 2kA Nitride Thickness: 3.5kA 1.5kA SUBSTRATE POTENTIAL (POWERED UP): Unbiased TRANSISTOR COUNT: 40 PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA-2505
+IN -IN BAL
COMP
V-
V+
BAL
OUT
7
HA-2505 Dual-In-Line Plastic Packages (PDIP)
N E1 INDEX AREA 12 3 N/2
E8.3 (JEDEC MS-001-BA ISSUE D)
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL
-B-
MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 9.01 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 10.16 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93
MIN 0.015 0.115 0.014 0.045 0.008 0.355 0.005 0.300 0.240
MAX 0.210 0.195 0.022 0.070 0.014 0.400 0.325 0.280
-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1 A2 L A C L E
A A1 A2 B B1 C D D1 E
-C-
eA eC
C
e
C A BS
eB
NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
E1 e eA eB L N
0.100 BSC 0.300 BSC 0.115 8 0.430 0.150 -
2.54 BSC 7.62 BSC 10.92 3.81 8
2.93
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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