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Color TFT LCD Driver
MN863440
TFT LCD Gate Driver with 200, 240, 256, or 263 Outputs
Overview
The MN863440 is a TFT LCD gate driver with 200, 240, 256, or 263 2-value outputs. The number of outputs can be selected to be any one of these by the user. This IC implements 2-value (pseudo 3-value) drive, and provides a cascade-connection pin to support large-screen displays. It is provided in a TCP package.
Features
* Adopts a bidirectional shift register system * Provides an expansion pin so that the number of output pins can be increased. * Pulse width modulation function (OE1 to OE3) * Driver operating frequency: 500 kHz (maximum) * LCD drive voltage: VEE + 40 V (maximum) * Driver output levels: 2 levels (The low level can be modified.) * Supports TCP mounting.
Applications
* LCD TV sets
Block Diagram
X263
X1
********************************** **********************************
VGG VOFF VEE VDD VSS XDON MODE1 MODE2 FX DIO1
Output circuit ********************************** Control circuit ********************************** Shift register RL DIO2 OE1 OE2 OE3
Publication date: June 2002
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MN863440
Functional Descriptions
1. LCD drive voltages The MN863440 can provide LCD drive voltages that are negative relative to logic ground.
VGG VDD VSS VOFF X1 to X263 Logic inputs Logic outputs
2. Operation The MN863440 outputs either the display level (VGG) or the off level (VOFF) from the LCD driver outputs (X1 to X263) under control of the shift data and the OE input signal. The data shift direction can be controlled with the shift direction switching pin (RL). The DIO input signal is acquired on the rising edge of FX. The shift register operates and the drive voltages are output with this timing as well. The DIO output is synchronized with the falling edge of FX. Start RL RL = High RL = Low pulse input DIO1 DIO2 Data transfer direction X1 X263 X263 X1 Carry pulse output DIO2 DIO1
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Functional Descriptions (continued)
3. OE function The outputs can be forced to the display off level regardless of the data in the shift register in sets consisting of every third output pin by setting the OE1, OE2, and OE3 pins to the high level. This function operates asynchronously with the FX pin. 200 output TCP MODE1 = Low MODE2 = Low X1 X2 X3 * * * X98 X99 (OE1) (OE2) (OE3) * * * (OE2) (OE3) 240 output TCP MODE1 = Low MODE2 = High X1 X2 (OE1) (OE2) 256 output TCP MODE1 = High MODE2 = Low X1 X2 (OE1) (OE2) 263 output TCP MODE1 = High MODE2 = High X1 X2 X3 * * * X98 X99 (OE1) (OE2) (OE3) * * * (OE2) (OE3)
X100 (OE1)
X3 (OE3) * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * X118 (OE1) X119 (OE2) X120 (OE3)
X3 (OE3) * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * X126 (OE3) X127 (OE1) X128 (OE2)
X100 (OE1) * * * * * * X118 (OE1) X119 (OE2) X120 (OE3) * * * * * * X126 (OE3) X127 (OE1) X128 (OE2) X129 (OE3) X130 (OE1) X131 (OE2) X132 (OE3) X133 (OE1) X134 (OE2) X135 (OE3)
X136 (OE3) X137 (OE1) X138 (OE2) * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
X136 (OE1) X137 (OE2) X138 (OE3) * * * * * * X144 (OE3) X145 (OE1) X146 (OE2) * * * * * *
X144 (OE1) X145 (OE2) X146 (OE3) * * * * * *
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Functional Descriptions (continued)
3. OE function (continued) 200 output TCP X164 (OE2) X165 (OE3) X166 (OE1) * * * * * * X261 (OE3) X262 (OE1) X263 (OE2) 240 output TCP * * * * * * * * * * * * * * * * * * * * * * * * X261 (OE1) X262 (OE2) X263 (OE3) 256 output TCP * * * * * * * * * * * * * * * * * * * * * * * * X261 (OE2) X262 (OE3) X263 (OE1) 263 output TCP X164 (OE2) X165 (OE3) X166 (OE1) * * * * * * X261 (OE3) X262 (OE1) X263 (OE2)
Here, (OEn) indicates which of OE1, OE2, and OE3 is the related signal.
4. XDON function The outputs can be set to the output the display on potential (VGG) regardless of the states of the OEn pins and the shift register data by setting the XDON pin to the low level. This function operates asynchronously with the FX pin. This pin is pulled up. 5. Carry input (DIO1, DIO2) The waveform input to the carry input must meet the following conditions.
1 FX 2 3 4 5 260 261 262 263
1) Single pulse width input DIO1 DIO2 2) Input with a width of 2 pulses or longer DIO1 DIO2 3) Double pulse input Pulse spacing: An odd number DIO1 DIO2 4) Double pulse input Pulse spacing: An even number DIO1 DIO2 Illegal input Allowable input
Allowable input
Illegal input
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Pin Descriptions
Pin Name FX I/O I Function Shift register clock input Description The start pulse is acquired and the shift register shifted on the FX rising edge. The carry pulse is output on the FX falling edge.
RL DIO1 DIO2
I I/O
Right shift/left shift selection RL = High: X1 X263 (Left shift) input RL = Low: X263 X1 (Right shift) Start pulse input and carry pulse output DIO1 RL = High RL = Low I O MODE2 High Low High Low DIO2 O I LCD outputs 263 256 240 200
MODE1 MODE2
I
Output pin count switching inputs
MODE1 High High Low Low
OE1 to OE3
I
Display signal enable/disable When OEn is high, the corresponding LCD drive output pins inputs are set to the display off potential (VOFF) asynchronously with the FX pin, regardless of the states of the shift register and other input data. See 3. OE function in the Functional Descriptions section.
X1 to X263
O
LCD drive outputs
These pins output, in synchronization with the FX rising edge, either the VGG or the VOFF voltage level according to the shift register data and the states of the OE1 to OE3, DIO1, and DIO2 pins. Power su'pply for the level shifters and output buffers. This supply is also used for the LCD drive voltage. Supplies an LCD drive voltage.
VGG
Power LCD drive output block power supply LCD drive supply 1 Power LCD drive supply 2 Power VGG system ground Power 3 V system logic power supply Power VDD system ground
VOFF VEE VDD VSS
Power supply used for the 3 V system logic circuits.
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Basic Waveforms
1. RL = High, left shift, MODE1, MODE2 = high 1 FX DIO1 OE1 OE2 OE3 X1 X2 X3 X4 X263 DIO2 2 3 4 5 261 262 263 264
2. RL = Low, right shift, MODE1, MODE2 = high 1 FX DIO2 OE1 OE2 OE3 X263 X262 X261 X260 X1 DIO1 2 3 4 5 261 262 263 264
*** ***
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MN863440
XDON Usage Example
* RL = High, left shift, MODE1, MODE2 = high
1 FX DIO1 OE1 OE2 OE3 2 3 4 5 261 262 263 264
XDON X1 X2 X3 X4
X263 DIO2
***
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MN863440
Electrical Characteristics
1. Absolute Maximum Ratings at VSS = 0 V Item Supply voltage 1 Supply voltage 2 Drive voltage Supply voltage 3 Digital input voltage Operating and storage temperature range Operating ambient temperature Storage temperature Symbol VDD VGG VOFF VEE VI Ta Topr Tstg Rating - 0.3 to +4.5 VEE to VEE +44 VEE - 0.3 to VGG +0.3 - 24 to +0.3 - 0.3 to VDD +0.3 -30 to +85 -20 to +75 -55 to +120 Unit V V V V V C C C
Note) 1. The absolute maximum ratings are limit values for stresses applied to the chip so that the chip will not be destroyed. Operation is not guaranteed within these ranges. 2. The operating and storage temperature range is the temperature range over which the chip will not be damaged even if operated. Note that performance is not guaranteed throughout this range. 3. These ratings are guaranteed values when the standard Panasonic package is used. 4. The power supply voltages must meet the condition VEE VGG at all times, including when power is being applied, during operation, and when power is being turned off. 5. When power is applied, certain sequences of power application can cause large currents to flow and permanently damage the IC. To avoid this problem, first apply VDD, and then, after VDD has reached 90% of its set voltage, apply VEE, VGG, and VOFF.
2. Operating Conditions at VSS = 0 V, Topr = -20C to +75C Item Operating supply voltage 1 Operating supply voltage 2 Operating supply voltage 3 Operating supply voltage 3 Symbol VDD VGG VEE VOFF -21 VEE -15 -15 < VEE < -5
VOFF
Condition
Min 2.3 10 -21 VEE VEE
Typ
Max 3.6 VEE +40 -5 VEE +10 -5
Unit V V V V
-5
-11
Usage range
-21
-21
-15
-5
VEE
VOFF VEE
Note) These ratings are guaranteed values when the standard Panasonic package is used.
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Electrical Characteristics (continued)
3. DC Characteristics at VSS = 0 V, Topr = -20C to +75C Item Operating supply current (VDD) Symbol IDD Condition fFX = 15.7 kHz fDIO = 60 Hz VDD = 3.0 V VOFF = -15 V VGG = 15 V With no output load In standby mode VDD = 3.0 V VOFF = -15 V VGG = 15 V Min Typ Max 800 Unit A
Operating supply current (VGG)
IGG
300
A
Standby mode current consumption (VDD) Standby mode current consumption (VGG) 1) Input pins
IDS IGS

600 100
A A
RL, FX, OE1 to OE3, MODE1, MODE2 VIH1 VIL1 ILI1 XDON VIH2 VIL2 RPU VDD = 3.0 V 0.8 x VDD 0 10 0.8 x VDD 0 -100 A 100 A VDD - 0.4 -50 -50 200 400 VDD 0.2 x VDD 100 V V k 0.8 x VDD 0 -10 VDD 0.2 x VDD 10 V V A
High-level input voltage Low-level input voltage Input leakage current 2) Pulled up input pins High-level input voltage Low-level input voltage Pull-up resistance 3) I/O pins DIO1, DIO2
High-level input voltage Low-level input voltage High-level output voltage Low-level output voltage 4) LCD drive voltage input pin Input leakage current 5) LCD drive output pins Output leakage current Output on resistance
VIH3 VIL3 VOH VOL VOFF VLI1 X1 X263 ILO1 RON-VGG VGG = 15 V VOFF = -15 V VOM = VGG - 0.5 V VOM is the X1 to X263 applied voltage. RON-VOFF VGG = 15 V VEE = -15 V VOFF = -15 V VOM = VOFF +0.5 V VOM is the X1 to X263 applied voltage.
VDD 0.2 x VDD 0.4
V V V V A A
50
50 800
200
400
800
Note) These ratings are guaranteed values when the standard Panasonic package is used.
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Electrical Characteristics (continued)
4. AC Characteristics at VSS = 0 V, Topr = -20C to +75C Item Clock period Clock high-level pulse width Clock low-level pulse width DIO data setup time DIO data hold time DIO output delay time Xn output delay time Symbol tFX tWH tWL tsu th tpd1 tpd2 CL = 50 pF CL = 300 pF Condition Min 2.0 700 700 300 300 Typ Max 600 800 Unit s ns ns ns ns ns ns
Note) These ratings are guaranteed values when the standard Panasonic package is used.
* AC Characteristics Timing Charts
tWL VDD 80% 80% FX VSS 20% 20% tsu VDD 80% DIO input VSS tpd1 VDD DIO output VSS tpd2 VGG Xn n = 1 to 263 60% 40% 60% 40% tpd1 80% th 50% 20% 50% tWH tFX
VOFF
VDD OEm m = 1 to 3 V SS 80% 20% tpd2 VGG Xn n = 1 to 263 40% 60% tpd2
VOFF
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Request for your special attention and precautions in using the technical information and semiconductors described in this book
(1) An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this book and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. (2) The technical information described in this book is limited to showing representative characteristics and applied circuits examples of the products. It neither warrants non-infringement of intellectual property right or any other rights owned by our company or a third party, nor grants any license. (3) We are not liable for the infringement of rights owned by a third party arising out of the use of the product or technologies as described in this book. (4) The products described in this book are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instruments and household appliances). Consult our sales staff in advance for information on the following applications: * Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. * Any applications other than the standard applications intended. (5) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (6) When designing your equipment, comply with the guaranteed values, in particular those of maximum rating, the range of operating power supply voltage, and heat radiation characteristics. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (7) When using products for which damp-proof packing is required, observe the conditions (including shelf life and amount of time let standing of unsealed items) agreed upon when specification sheets are individually exchanged. (8) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of Matsushita Electric Industrial Co., Ltd.
2002 MAY

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