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PAD/JPAD/SSTPAD Series Low-Leakage Pico-Amp Diodes PAD1 PAD5 PAD50 Product Summary Part Number PAD1 PAD5/JPAD5/SSTPAD5 PAD50/JPAD50 SSTPAD100 JPAD5 JPAD50 SSTPAD5 SSTPAD100 IR Max (pA) -1 -5 -50 -100 Features Benefits Applications D Op Amp Input Protection D Multiplexer Overvoltage Protection D Negligible Circuit Leakage Contribution D Ultralow Leakage: PAD1 <1 pA D Ultralow Capacitance: PAD1 <0.8 pF D Circuit "Transparent" Except to Shunt High-Frequency Spikes D Two-Leaded Package D Simplicity of Operation Description The PAD/JPAD/SSTPAD series of extremely low-leakage diodes provides a superior alternative to conventional diode technology when reverse current (leakage) must be minimized. They feature leakage currents ranging from -1 pA (PAD1) to -100 pA (SSTPAD100) to support a wide range of applications. These devices are well suited for use in applications such as input protection for operational amplifiers. TO-206AF (TO-72) Modified TO-206AA (TO-18) Modified The hermetically sealed TO-206AF (TO-72) package allows full military processing per MIL-S-19500 (see Military Information). The TO-226A (TO-92) plastic package provides a low-cost option. The TO-236 (SOT-23) package provides surface-mount capability. Both J and SST series are available in tape-and-reel for automated assembly. (See Packaging Information.) TO-226AA (TO-92) Modified TO-236 (SOT-23) C 1 3 Case C C 1 1 C 1 3 A C 2 A Top View PAD1 PAD5 Top View PAD50 2 A and Case A 2 2 Top View Top View JPAD5 JPAD50 SSTPAD5 (05)* SSTPAD100 (01) *Marking Code for TO-236 Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70339. Siliconix S-52424--Rev. G, 14-Apr-97 1 PAD/JPAD/SSTPAD Series Absolute Maximum Ratingsa Forward Current: Total Device Dissipation: Operation Junction Temp: (PAD . . . . . . . . . . . . . . . . . . . . . . 50 mA (JPAD/SSTPAD ) . . . . . . . . . . . . . 10 mA (PAD)b . . . . . . . . . . . . . . . . . . . 300 mW (JPAD/SSTPAD)b . . . . . . . . . . 350 mW (PAD) . . . . . . . . . . . . . . . . -55 to 175_C (JPAD/SSTPAD )c . . . . . . -55 to 150_C Lead Temperature (1/16" from case for 10 sec.) . . . . . . . . . . . . . 300_C Notes: a. TA = 25_C unless otherwise noted. b. Derate 2 mW/_C above 25_C. c. Derate 2.8 mW/_C above 25_C. Specificationsa Limits Parameter Static PAD1 PAD5/JPAD5/SSTPAD5 Reverse Current IR VR = -20 V 20 PAD50/JPAD50 SSTPAD100 PAD1/PAD5 Reverse Breakdown Voltage BVR IR = -1 mA SSTPAD5/100 All Others Forward Voltage Drop VF IF = 1 mA -45 -30 -35 -0.3 -1 -5 -10 -60 -55 -55 0.8 1.5 V -1 -5 pA -50 -100 Symbol Test Conditions Min Typb Max Unit Dynamic Reverse Capacitance CR VR = -5V, f = 1 MHz -5V PAD1/PAD5 All Others 0.5 1.5 0.8 pF 2 Notes: a. TA = 25_C unless otherwise noted. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. NT/NPA Typical Characteristics -1000 Reverse Current vs. Reverse Voltage PAD/JPAD/SSTPAD5 -100 Reverse Current vs. Temperature VR = -20 V IR @ 125_C -100 PAD1 I R (pA) I R (pA) -10 All Others PAD1/5 -0.1 IR @ 25_C PAD1 -0.1 0 -6 -12 -18 VR (V) -24 -30 -0.01 -55 -35 -15 5 25 45 65 85 105 125 -10 -1 PAD/JPAD/SSTPAD5 -1 TA - Temperature (_C) 2 Siliconix S-52424--Rev. G, 14-Apr-97 |
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