View MSM7732_283765.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

E2U0061-18-83
Semiconductor MSM7732
Semiconductor Audio CODEC
This version: Aug. 1998 MSM7732
GENERAL DESCRIPTION
The MSM7732 is a single-channel full duplex CODEC LSI device which performs mutual transcoding between analog voice band signals ranging from 300 to 3400 Hz and the 64 kbps PCM serial data. Provided with such functions as DTMF Tone generation, transmit/receive data gain control, and side-tone path, the MSM7732 is best suited for telephone terminals in digital wireless systems.
FEATURES
* Single 3 V power supply VDD: 2.4 V to 3.3 V * Coding format: PCM m-law/PCM A-law/14-bit linear mode selectable * PCM interface timing: Long frame synchronous timing/short frame synchronous timing * Transmit/receive full-duplex operation * Serial PCM transmission data rate: 64 kbps to 2048 kbps * Low power consumption Operating mode: 18 mW max. (VDD = 3.0 V) Power-down mode: 0.06 mW max. (VDD = 3.0 V) * Analog output stage: 35 mW (differential type) amplifier output for driving receiver speaker: Capable of driving a 32 W load 8.8 mW (single type) amplifier output for driving earphones speaker: Capable of driving a 32 W load * Transmit/receive mute, transmit/receive programmable gain control * Side tone path * Built-in DTMF tone generator * Transmit slope filter selectable * Serial MCU interface control * Package: 30-pin plastic SSOP (SSOP30-P-56-0.65-K) (Product name: MSM7732MB)
1/23
Semiconductor
MSM7732
BLOCK DIAGRAM
AMPAI AMPAO AIN- AIN+ GSX
AMPA - + 20 kW
Voice Detect
to MCU I/F
- + 20 kW
A/D
slope filter
CR0-B2
CR4-B6
BPF
CR2-B6 to B4
PCM Compand
CR0-B0
PCMOUT
TONE 20 kW VFRO 32 W SAO 32 W AOUT+ AOUT- PWI SWA SWB SWC -1 + - D/A
CR4-B5 CR2-B2 to B0 CR3-B7 to B5 CR3-B3 to B0
GEN.
PCM LPF + +
CR0-B0
Expand
PCMIN
32 W
CR1-B1
SWD SWE
CR1-B2
SG
VREF BCLK MCU I/F SYNC
EXCK
MCK
PDN
DEN
AG1
AG2
VDD
DIO
DG
VA
2/23
Semiconductor
MSM7732
PIN CONFIGURATION (TOP VIEW)
VDD
SWA SWB SWC
AMPAI AMPAO AIN+ AIN- GSX
SWD 10 SWE 11 SG 12 VFRO 13 AG1 14 SAO 15
1 2 3 4 5 6 7 8 9
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
DG MCK DEN DIO EXCK PCMOUT PCMIN SYNC BCLK PDN AG2 AOUT+ AOUT- PWI VA
30-Pin Plastic SSOP
3/23
Semiconductor
MSM7732
PIN DESCRIPTIONS
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Symbol VDD SWA SWB SWC AMPAI AMPAO AIN+ AIN- GSX SWD SWE SG VFRO AG1 SAO VA PWI AOUT- AOUT+ AG2 PDN BCLK SYNC PCMIN PCMOUT EXCK DIO DEN MCK DG Type -- I/O I/O I/O I O I I O I/O I/O O O -- O -- I O O -- I I I I O I I/O I I -- Power supply (3.0 V) Analog switch A Analog switch B Analog switch C Amplifier A inverting input Amplifier A output Transmit side amplifier non-inverting input Transmit side amplifier inverting input Transmit side amplifier output Analog switch D Analog switch E Analog signal ground (1.4 V) Receive side voice output Analog ground 1 (0 V) Receive side sounder amplifier output Analog power supply (3.0 V) Receive side voice amplifier input Receive side voice amplifier output- Receive side voice amplifier output+ Analog ground 2 (0 V) Power down control input PCM data shift clock input PCM data shift sync signal input Receive side PCM signal input Transmit side PCM signal output Microcontroller interface data clock input Microcontroller interface data input/output Microcontroller interface data enable signal Master clock input (2.048 MHz) Digital ground (0 V) Description
4/23
Semiconductor
MSM7732
PIN FUNCTIONAL DISCRIPTION
AIN+, AIN-, GSX Transmit analog inputs and the output for transmit gain adjustment. AIN- connects to inverting input of the internal transmit amplifier. AIN+ connects to noninverting input of the internal transmit amplifier. GSX connects to the internal transmit amplifier output. Refer to Figure 1 for gain adjustment. VFRO, SAO, AOUT+, AOUT-, PWI Receive analog outputs and the outputs and inputs for receive gain adjustment. VFRO is the receive filter output for the voice signal. SAO is the receive filter output for an acoustic component of the sound tone. SAO can directly drive 32 W load. AOUT+ and AOUT- are differential analog signal outputs which can directly drive 32 W load. Refer to Figure 1. These outputs are in a high impedance state during power-down mode.
R1 VI
R2
GSX - AIN- + AIN+
VGSX=VI (R2/R1)
10 mF
+ -
VREF 0.1 mF SG
AOUT+
-1
VO=VVFRO (R3/R4) 2 AOUT- R3 R4 + -
PWI VFRO DAC SAO
Sounder output signal
Figure 1 Analog Input/Output Interface
5/23
Semiconductor
MSM7732
SG Analog signal ground. The output voltage of this pin is approximately 1.4 V. Put the bypass capacitors (10 mF in parallel with 0.1 mF ceramic type) between this pin and AG to get the specified noise characteristics. During power-down, this output voltage is 0 V. When using the SG pin, connect this device to an external buffer. AMPAI, AMPAO Used for amplifier-A. The pin AMPAI connects to inverting input of the amplifier-A, and the pin AMPAO connects to output of the amplifier-A. SWA, SWB, SWC Used for internal analog switch. The pin SWB connects to the pin SWA or the pin SWC. This is controlled by CR1-B1. SWD, SWE Used for internal analog switch. The pin SWD connects to the pin SWE or not. This is controlled by CR1-B2. VDD, VA +3 V power supply for analog. VDD is the digital power supply. VA is the analog power supply. Connect these device pins as close as possible on the board. DG, AG1, AG2 Ground. DG is the digital system ground. AG1 and AG2 is the analog system ground. The DG pin must be kept as close as possible to AG1 and AG2 on the PCB. PDN Power down and reset control input. When set to logic "0" the system changes to the power down state and control register is reset. Since the power down mode is controlled by a logical OR with CR0-B5 of the control register, set CR0-B5 to logic "0" when using this pin. The reset pulse width must be 200 ns or more. MCK Master clock input. The frequency must be 2.048 MHz. MCK can be a asynchronous with SYNC and BCLK. BCLK Shift clock input for the PCM data. The frequency is set in the range of 64 kHz to 2048 kHz.
6/23
Semiconductor
MSM7732
SYNC Synchronous signal input for PCM data. Synchronize this signal with BCLK signal. This signal is used to indicate the MSB of the PCM data stream. PCMOUT Transmit PCM data output. This PCM output signal is output from MSB synchronously with the rising edge of BCLK and SYNC. Refer to Figure 2. PCMIN Receive PCM data input. This PCM input signal is shifted in on the falling edge of BCLK and is input from MSB. Refer to Figure 2.
8 kHz (125 ms) SYNC BCLK PCMIN or PCMOUT MSB LSB * 14 bits when linear mode selected
(a) Long frame synchronous interface
8 kHz (125 ms) SYNC BCLK PCMIN or PCMOUT MSB LSB * 14 bits when linear mode selected
(b) Short frame synchronous interface
Figure 2 PCM Interface Basic Timing
7/23
Semiconductor
DEN, EXCK, DIO Serial control ports for microcontroller interface. Reading and writing data is performed by an external CPU through these pins. Eight registers with eight bits are provided on the device. DEN is the "Enable" control signal input, EXCK is the data shift clock input, DIO is the data input/output. Figure 3 shows the timing. Table 1 shows the register map.
DEN
EXCK
DIO (I)
DEN
EXCK
DIO (O)
, , , , , ,
MSM7732
W A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0
(a) Write Timing
R
A2
A1
A0
B7
B6
B5
B4
B3
B2
B1
B0
(b) Read Timing
Figure 3 Serial Control Port Access
Table 1
Register Name
Address A2 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 A0 0 1 0 1 0 1 0 1 B7 A/m SEL -- TX ON/OFF GAIN2 DTMF/ Others SEL -- VOX ON/OFF VOX OUT B6 PON AOUT -- TX GAIN2 GAIN1 TONE SEND -- ON LVL1 B5 PDN ALL -- TX GAIN1 GAIN0 SAO/ VFRO -- ON LVL0
Description B4 PDN TX -- TX GAIN0 TONE ON/OFF TONE4 -- -- -- B3 PDN RX SHORT FRAME RX ON/OFF TONE GAIN3 TONE3 -- -- -- B2 SLP SW DE RX GAIN2 TONE GAIN2 TONE2 -- -- -- B1 SLP SEL SW C/A RX GAIN1 TONE GAIN1 TONE1 -- -- -- B0 LNR RX PAD RX GAIN0 TONE GAIN0 TONE0 -- -- --
R/W R/W R/W R/W R/W R/W -- R/W R
CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7
Side Tone Side Tone Side Tone
TX NOISE TX NOISE LVL1 LVL0 R/W: Read/Write enable
R: Read only register
8/23
Semiconductor
MSM7732
ABSOLUTE MAXIMUM RATINGS
Parameter Power Supply Voltage Analog Input Voltage Digital Input Voltage Storage Temperature Symbol VDD VAIN VDIN TSTG Condition -- -- -- -- Rating -0.3 to +5 -0.3 to VDD+0.3 -0.3 to VDD+0.3 -55 to +150 Unit V V V C
RECOMMENDED OPERATING CONDITIONS
(VDD = 2.4 to 3.3V, Ta = -40 C to +85 C) Parameter Power Supply Voltage Operating Temperature Input High Voltage Input Low Voltage Digital Input Rise Time Digital Input Fall Time Digital Output Load Bypass Capacitor for SG Master Clock Frequency Bit Clock Frequency Synchronous Signal Frequency Clock Duty Ratio PCM Sync Pulse Setting Time Synchronous Signal Width PCM Setup Time PCM Hold Time Symbol VDD Ta VIH VIL tIR tIF CDL CSG FMCK FBCLK1 FBCLK2 FSYNC DCLK tBS tWS tDS tDH Condition Voltage must be fixed -- To all digital input pins To all digital input pins To all digital input pins To all digital input pins To all digital output pins Between SG and AG MCK BCLK (A/m-law) BCLK (Linear) SYNC MCK, BCLK, EXCK BCLKSYNC See Fig. 5 SYNC See Fig. 5 See Fig. 5 See Fig. 5 Min. 2.4 -40 0.45VDD 0 -- -- -- 10+0.1 -0.01% 64 128 -- 40 100 1BCLK 100 100 Typ. 3.0 -- -- -- -- -- -- -- 2.048 -- -- 8.0 50 -- -- -- -- Max. 3.3 +85 VDD 0.16VDD 50 50 100 -- +0.01% 2048 2048 -- 60 -- 100 -- -- Unit V C V V ns ns pF mF MHz kHz kHz kHz % ns ms ns ns
9/23
Semiconductor
MSM7732
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD = 2.4 V to 3.3 V, Ta = -40 C to +85 C) Parameter
Symbol
Condition Operating mode (no signal, VDD = 3.0 V) Operating mode (no signal, VDD = 3.0 V) Either AOUT+/AOUT- or SAO is active Power-down mode (VDD = 3.0 V, Ta = 25C) VI = VDD VI = 0V IOH = 0.4mA IOL = -1.2mA --
Min. 0
Typ. 6.0
Max. 11.0
Unit mA
IDD1
Power Supply Current
IDD2
0
9.0
20.0
mA
IDD3 Input Leakage Current Output High Voltage Output Low Voltage Input Capacitance IIH IIL VOH VOL CIN
0 -- -- 0.5VDD 0 --
1.0 -- -- -- 0.2 5
10.0 2.0 0.5 VDD 0.4 --
mA mA mA V V pF
Analog Interface Characteristics
(VDD = 2.4 V to 3.3 V, Ta = -40 C to +85 C) Parameter Input Resistance Output Load Resistance Output Load Capacitance
Symbol
Condition AMPAI, AIN+, AIN-, PWI AMPAO, GSX, VFRO SAO, AOUT+, AOUT- Analog output pins AMPAO, GSX, VFRO (RL = 20 kW) SAO (RL = 32 W) AOUT+, AOUT- differential output (VDD = 2.7 to 3.3 V, RL = 32 W) AOUT+, AOUT-, SAO (VDD = 2.7 to 3.3 V, RL = 32 W) AMPAO, GSX VFRO, SAO, AOUT+, AOUT- SG SG All internal Analog switches
Min. 10 20 32 -- -- -- -- -20 -100 -- -- 50
Typ. -- -- -- -- -- -- -- -- -- 1.4 40 --
Max. -- -- -- 100 1.3 3.0 1.0 +20 +100 -- 80 300
Unit MW kW W pF VPP VPP % mV mV V kW W
RIN RL1 RL2 CL VO1
Output Voltage Level (*1) VO2 Output Distortion Offset Voltage SG Output Voltage SG Output Impedance Switch Impedance THD VOF1 VOF2 VSG RSG RSW
*1 -7.7 dBm (600 W) = 0 dBm0, +3.14 dBm0 = 1.3 VPP
10/23
Semiconductor Digital Interface Characteristics
MSM7732
(VDD = 2.4 V to 3.3 V, Ta = -40 C to +85 C) Parameter Symbol Condition Reference Min. 0 Fig. 5 0 0 0 50 50 50 50 100 Cload = 50 pF Fig. 6 50 50 0 50 50 0 200 EXCK -- -- Typ. -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max. 200 200 200 200 -- -- -- -- -- -- -- 100 -- -- 50 -- 10 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns MHz tSDX, tSDR tXD1, tRD1 1 LSTTL + 100 pF tXD2, tRD2 Pull-up resistor : 500 W tXD3, tRD3 t1 t2 t3 t4 t5 Serial Port I/O Setting Time t6 t7 t8 t9 t10 t11 t12 EXCK Clock Frequency FECK
Digital Output Delay Time
11/23
Semiconductor AC Characteristics
MSM7732
(VDD = 2.4 V to 3.3 V, Ta = -40 C to +85 C) Parameter Symbol LOSS T1 LOSS T2 Transmit Frequency Response LOSS T3 LOSS T4 LOSS T5 LOSS T6 LOSS R1 Receive Frequency Response LOSS R2 LOSS R3 LOSS R4 LOSS R5 SD T1 Transmit Signal to Distortion Ratio (*1) SD T2 SD T3 SD T4 SD T5 SD R1 Receive Signal to Distortion Ratio (*1) SD R2 SD R3 SD R4 SD R5 GT T1 GT T2 Transmit Gain Tracking GT T3 GT T4 GT T5 GT R1 GT R2 Receive Gain Tracking GT R3 GT R4 GT R5 Idle Channel Noise (*1) Absolute Signal Amplitude (*3) Power Supply Noise Rejection Ratio NIDLT NIDLR AVT AVR -- 1020 (GSX) 1020 (VFRO) 1020 1020 1020 1020 Condition Freq. (Hz) 0 to 60 300 to 3000 1020 3300 3400 3968.75 0 to 3000 1020 3300 3400 3968.75 3 0 -30 -40 -45 3 0 -30 -40 -45 3 -10 -40 -50 -55 3 -10 -40 -50 -55 AIN = SG (*2) 0 0 -- -0.2 -0.5 -1.2 -- -- 0.285 0.285 30 30 -0.2 -0.5 -1.2 -0.2 0 -0.15 0 13 35 35 35 28 23 35 35 35 28 23 -0.2 0 Level (dBm0) Min. 25 -0.15 -0.15 0 13 -0.15 Typ. -- -- Reference -- -- -- -- Reference -- -- -- -- -- -- -- -- -- -- -- -- -- -- Reference -- -- -- -- Reference -- -- -- -- -- 0.320 0.320 -- -- +0.2 +0.5 +1.2 -68 -72 0.359 0.359 -- -- +0.2 +0.5 +1.2 +0.2 +0.20 0.80 -- -- -- -- -- -- -- -- -- -- -- +0.2 +0.20 0.80 -- +0.20 Max. -- +0.20 Unit dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dBm0p dBm0p Vrms Vrms dB dB
PSRRT Noise Freq.: 0 to 50 kHz PSRRR Noise LEVEL: 50mVPP
*1 P-message filter used *2 PCMIN input code "11010101" (A-law) "11111111" (m-law) *3 0.320 Vrms = 0 dBm0 = -7.7 dBm (600 W) 12/23
Semiconductor AC Characteristics (DTMF and Other Tones)
MSM7732
(VDD = 2.4 V to 3.3 V, Ta = -40 C to +85 C) Parameter Frequency Difference Symbol DFT VTL Original (Reference) Tones Signal Output Level (*4) VTH VRL VRH Relative Level of DTMF Tones Condition DTMF tones, Other various tones Transmit side tone (Gain setting 0 dB) Receive side tone (Gain setting -6 dB) DTMF (low group) DTMF (high group), other tones DTMF (low group) DTMF (high group), other tones Min. -1.5 -18 -16 -10 -8 1 Typ. -- -16 -14 -8 -6 2 Max. +1.5 -14 -12 -6 -4 3 Unit % dBm0 dBm0 dBm0 dBm0 dB
RDTMF VTH/VTL, VRH/VRL
*4 Not including programmable gain set values AC Characteristics (Gain Settings)
(VDD = 2.4 V to 3.3 V, Ta = -40 C to +85 C) Parameter Transmit/Receive Gain Setting Accuracy Symbol DG Condition For all gain set values Min. -1 Typ. 0 Max. +1 Unit dB
AC Characteristics (Voice/Silence Detect Function)
(VDD = 2.4 V to 3.3 V, Ta = -40 C to +85 C) Parameter Voice/Silence Detection Time Voice/Silence Detection Level Accuracy Symbol TVON TVOF DVX SilenceAEvoice VoiceAEsilence CR6-B6, B5 Condition Voice/silence differential: 10 dB Min. -- 140 -2.5 Typ. 10 (*5) 160 0 Max. -- 180 +2.5 Unit ms ms dB
For detection level set values by
*5 When 1000 Hz single tone is input
13/23
Semiconductor
MSM7732
TIMING DIAGRAM
Transmit Side PCM Timing (Long Frame Synchronous Interface)
BCLK SYNC PCMOUT tSDX 0 tBS 1 tBS tXD1 MSB 2 tWS tXD2 3 4 5 6 7 8 9 10
tXD3 LSB
Transmit Side PCM Timing (Short Frame SYnchronous Interface)
BCLK 0 tBS SYNC
1 tBS 2 3 4 5 6 7 8 9 10
tBS tWS
tXD1
tXD2
PCMOUT tSDX
MSB
tXD3 LSB
Receive Side PCM Timing (Long Frame Synchronous Interface)
BCLK SYNC PCMIN tSDX 0 tBS 1 tBS tRD1 MSB 2 tWS tRD2 3 4 5 6 7 8 9 10
tRD3 LSB
Receive Side PCM Timing (Short Frame Synchronous Interface)
BCLK 0 tBS SYNC
1 tBS 2 3 4 5 6 7 8 9 10
tBS tWS
tRD1
tRD2
PCMIN tSDX
MSB
tRD3 LSB
Figure 5 PCM Interface Timing
14/23
Semiconductor Serial Port Timing for Microcntroller Interface
DEN t2 EXCK t1 t3 1 2 3 t6 4 t7 t5 5 6 11 12 t9
MSM7732
t10
t4 W/R A2
DIO (WRITE)
A1
A0
B7 t8
B1
B0 t11
DIO (READ)
W/R
A2
A1
A0
B7
B1
B0
Figure 6 Serial Control Port Interface
15/23
Semiconductor
MSM7732
FUNCTIONAL DESCRIPTION
Control Registers (1) CR0 (basic operating mode 1)
B7 CR0 Initial Value A/m SEL 0 B6 PON AOUT 0 B5 PDN ALL 0 B4 PDN TX 0 B3 PDN RX 0 B2 SLP 0 B1 SLP SEL 0 B0 LNR 0
Note:
Initial values are the values set when reset is activated by the PDN pin.
B7 ..... PCM companding law select; 0/m-law, 1/A-law B6 ..... Power on control for op-amps (AOUT+, AOUT-); 0/Power off, 1/Power on B5 ..... Power down (entire system); 0/Power on, 1/Power down ORed with the inverted PDN signal. When using this data, set pin PDN at "1" level. B4 ..... Power down (Transmit and AMPA); 0/Power on, 1/Power down B3 ..... Power down (Receive only); 0/Power on, 1/Power down B2 ..... Slope Filter enable; 0/Slope Filter disable, 1/Slope Filter enable B1 ..... Slope Filter's frequency response select; 0/CASE1, 1/CASE2 Refer to Figure 4. B0 ..... PCM interface linear mode select; 0/PCM data, 1/14-bit linear mode (2's complement)
6 4 2 0 -2 -4 -6 -8 -10 -12 -14 0 500 1000 1500 2000 2500 Frequency [Hz] 3000
Gain [dB]
CASE1 CASE2
3500
4000
Figure 4 Frequency Response of Slope Filter
16/23
Semiconductor (2) CR1 (Basic operating mode 2)
B7 CR1 Initial Value -- 0 B6 -- 0 B5 -- 0 B4 -- 0 B3 SHORT FRAME 0 B2 SW DE 0 B1 SW C/A 0
MSM7732
B0 RX PAD 0
B7, B6, B5, B4 ............................... Not used. B3 ..... Short Frame Synchronous interface select; 0/Long Frame Synchronous interface, 1/Short Frame Synchronous interface Refer to Figure 2. B2 ..... Analog switch control; 0/The SWD and SWE pins are in a high impedance state. 1/The SWD pin is internally connected to the SWE pin. B1 ..... Analog switch control; 0/The SWB pin is internally connected to the SWA pin. 1/The SWB pin is internally connected to the SWC pin. The unconnected pins go into a high impedance state. B0 ..... Receive side PAD; 0/No pad 1/A pad of 12 dB loss is inserted in the receive side voice path.
17/23
Semiconductor (3) CR2 (Transmit/receive gain adjustment)
B7 CR2 Initial Value TX ON/OFF 0 B6 TX GAIN2 0 B5 TX GAIN1 1 B4 TX GAIN0 1 B3 RX ON/OFF 0 B2 RX GAIN2 0 B1 RX GAIN1 1
MSM7732
B0 RX GAIN0 1
B7 ................. Transmit side PCM signal ON/OFF 0/ON, B6, B5, B4 .... Transmit side signal gain adjustment, refer to Table 2. B3 ................. Receive side PCM signal ON/OFF 0/ON, B2, B1, B0 .... Receive side signal gain adjustment, refer to Table 2.
1/OFF 1/OFF
Table 2 Transmit/Receive Gain Settings
B6 0 0 0 0 1 1 1 1 B5 0 0 1 1 0 0 1 1 B4 0 1 0 1 0 1 0 1 Transmit Side Gain -6 dB -4 dB -2 dB 0 dB +2 dB +4 dB +6 dB +8 dB B2 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 Receive Side Gain -12 dB -9 dB -6 dB -3 dB 0 dB +3 dB +6 dB +9 dB
The above gain settings table shows the transmit/receive voice signal gain settings and the transmit side gain settings for DTMF tones and other tones. Tone signal transmission is enabled by CR4-B6, and the gain setting is set to the levels shown below. DTMF tones (low group): ....................................... -16 dBm0 DTMF tones (high group) and other tones: ......... -14 dBm0 For example, if the transmit gain set value is set to +8 dB (B6, B5, B4) = (1, 1, 1), then the following tones appear at the PCMOUT pin. DTMF tones (low group): ....................................... -8 dBm0 DTMF tones (high group) and other tones: ......... -6 dBm0
18/23
Semiconductor (4) CR3 (Side tone and tone generator gain setting)
B7 CR3 Initial Value GAIN2 0 B6 GAIN1 0 B5 GAIN0 0 B4 TONE ON/OFF 0 B3 TONE GAIN3 0 B2 TONE GAIN2 0 B1 TONE GAIN1 0
MSM7732
B0 TONE GAIN0 0
Side Tone Side Tone Side Tone
B7, B6, B5 ......... Side tone path gain setting, refer to Table 3. B4 ...................... Tone generator ON/OFF 0/OFF, 1/ON B3, B2, B1, B0 .. Tone generator gain adjustment for receive side, refer to Table 4
Table 3 Side Tone Gain Settings
B7 0 0 0 0 1 1 1 1 B5 0 0 1 1 0 0 1 1 B4 0 1 0 1 0 1 0 1 Side Tone Path Gain OFF -15 dB -13 dB -11 dB -9 dB -7 dB -5 dB -3 dB
Table 4 Receive Side Tone Generator Gain Settings
B3 0 0 0 0 0 0 0 0 B2 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 Tone Generator Gain OFF -34 dB -32 dB -30 dB -28 dB -26 dB -24 dB -22 dB B3 1 1 1 1 1 1 1 1 B2 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 Tone Generator Gain -20 dB -18 dB -16 dB -14 dB -12 dB -10 dB -8 dB -6 dB
The receive side tone generator gain settings shown in Table 4 are set with the following levels as a reference. DTMF tones (low group): ....................................... -2 dBm0 DTMF tones (high group) and other tones: ......... 0 dBm0 For example, if the tone generator gain set value is set to -6 dB (B3, B2, B1, B0) = (1, 1, 1, 1), then tones at the following levels apppear at the SAO or VFRO pin. DTMF tones (low group): ....................................... -8 dBm0 DTMF tones (high group) and other tones: ......... -6 dBm0
19/23
Semiconductor (5) CR4 (Tone generator operating mode and frequency select)
B7 CR4 Initial Value DTMF/ Others SEL 0 B6 TONE SEND 0 B5 SAO/ VFRO 0 B4 TONE4 0 B3 TONE3 0 B2 TONE2 0 B1 TONE1 0
MSM7732
B0 TONE0 0
B7 ..... DTMF or other tones select; 0/Others, 1/DTMF B6 ..... Tone transmit enable (Transmit side); 0/Voice signal (transmit), 1/Tone transmit B5 ..... Tone output pin select (Receive side); 0/VFRO, 1/SAO B4, B3, B2, B1, B0 ........ Tone frequency setting; refer to Table 5.
Table 5 Tone Generator Frequency Settings (a) B7 = 1 (DTMF tone)
B4 * * * * * * * * B3 0 0 0 0 0 0 0 0 B2 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 Frequency 697 Hz + 1209 Hz 697 Hz + 1336 Hz 697 Hz + 1477 Hz 697 Hz + 1633 Hz 770 Hz + 1209 Hz 770 Hz + 1336 Hz 770 Hz + 1477 Hz 770 Hz + 1633 Hz B4 * * * * * * * * B3 1 1 1 1 1 1 1 1 B2 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 Frequency 852 Hz + 1209 Hz 852 Hz + 1336 Hz 852 Hz + 1477 Hz 852 Hz + 1633 Hz 941 Hz + 1209 Hz 941 Hz + 1336 Hz 941 Hz + 1477 Hz 941 Hz + 1633 Hz
*Don't Care
(b) B7 = 0 (Other tones)
B4 B3 B2 B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 Frequency 2730 Hz/2560 Hz 8 Hz wamb. 2000 Hz/2667 Hz 8 Hz wamb. 1000 Hz/1333 Hz 8 Hz wamb. B4 1 1 1 1 1 1 1 1 B3 0 0 0 0 0 0 0 0 B2 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 Frequency 1200 Hz 1300 Hz -- 1477 Hz 1633 Hz 2000 Hz 2100 Hz --
0
0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
-- -- -- -- -- -- 400 Hz 440 Hz 480 Hz -- 667 Hz 800 Hz 1000 Hz
0 0 0 0 0 0 0 0
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
2400 Hz -- 2500 Hz -- -- 2700 Hz -- 3000 Hz
20/23
Semiconductor (6) CR5 (Not used)
B7 CR5 Initial Value -- 0 B6 -- 0 B5 -- 0 B4 -- 0 B3 -- 0 B2 -- 0 B1 -- 0
MSM7732
B0 -- 0
B7-B0 ..... Not used (7) CR6 (Voice/silence detect function control)
B7 CR6 Initial Value VOX ON/OFF 0 B6 ON LVL1 0 B5 ON LVL0 0 B4 -- 0 B3 -- 0 B2 -- 0 B1 -- 0 B0 -- 0
B7 ..... Voice/silence detect function ON/OFF; 0/OFF, 1/ON B6, B5 ...... Voice detector level setting (when 1000 Hz single tone is input); (0, 0): -20 dBm0 (0, 1): -26 dBm0 (1, 0): -32 dBm0 (1, 1): -38 dBm0 B4, B3, B2, B1, B0 ........ Not used. When writing data, write "0". (8) CR7 (Detect register, read only)
B7 CR7 Initial Value VOX OUT 0 B6 TX Noise Level1 0 B5 TX Noise Level0 0 B4 -- * B3 -- * B2 -- * B1 -- * B0 -- *
*For IC testing B7 ..... Transmit side voice/silence detection; 0/silence, B6, B5Transmit side silence detect level (indicator); (0, 0): Below -50 dBm0 (0, 1): -40 to -50 dBm0 (1, 0): -30 to -40 dBm0 (1, 1): Above -30 dBm0 Note: These outputs are enabled only when VOX (CR6-B7) = "1". B4, B3, B2, B1, B0 ........ Not used 1/voice detect
21/23
Semiconductor
MSM7732
APPLICATION CIRCUIT
R1
R2
R3
0.1mF
+ - 10mF
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
VDD SWA SWB SWC AMPAI AMPAO AIN+ AIN- GSX SWD SWE SG VFRO AG1 SAO
MSM7732
DG MCK DEN DIO EXCK PCMOUT PCMIN SYNC BCLK PDN AG2 AOUT+ AOUT- PWI VA
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 10mF
Master Clock MCU I/F
PCM I/F
Power Down
+ -
R5 R4
22/23
Semiconductor
MSM7732
PACKAGE DIMENSIONS
(Unit : mm)
SSOP30-P-56-0.65-K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.19 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
23/23

▲Up To Search▲

Price & Availability of MSM7732

	To Download MSM7732 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .