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| FDC6506P February 1999 FDC6506P Dual P-Channel Logic Level PowerTrenchTM MOSFET General Description These P-Channel logic level MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain low gate charge for superior switching performance. These devices have been designed to offer exceptional power dissipation in a very small footprint for applications where the bigger more expensive SO-8 and TSSOP-8 packages are impractical. Features * -1.8 A, -30 V. RDS(on) = 0.170 @ VGS = -10 V RDS(on) = 0.280 @ VGS = -4.5 V * * * * Low gate charge (2.3nC typical). Fast switching speed. High performance trench technology for extremely low RDS(ON). SuperSOTTM-6 package: small footprint (72% smaller than standard SO-8); low profile (1mm thick). Applications * Load switch * Battery protection * Power management D2 S1 D1 4 3 5 2 G2 SuperSOT TM -6 S2 G1 TA = 25C unless otherwise noted 6 1 Absolute Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Parameter Ratings -30 (Note 1a) Units V V A W 20 -1.8 -10 0.96 0.9 0.7 -55 to +150 Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) TJ, Tstg Operating and Storage Junction Temperature Range C Thermal Characteristics RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 130 60 C/W C/W Package Outlines and Ordering Information Device Marking .506 (c)1999 Fairchild Semiconductor Corporation Device FDC6506P Reel Size 7'' Tape Width 8mm Quantity 3000 units FDC6506P Rev. C FDC6506P Electrical Characteristics Symbol Off Characteristics BVDSS BVDSS TJ IDSS IGSSF IGSSR TA = 25C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse (Note 2) Test Conditions VGS = 0 V, ID = -250 A ID = -250 A, Referenced to 25C VDS = -24 V, VGS = 0 V VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V Min -30 Typ Max Units V -20 -1 100 -100 mV/C A nA nA On Characteristics VGS(th) VGS(th) TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance VDS = VGS, ID = -250 A ID = -250 A, Referenced to 25C VGS = -10 V, ID = -1.8 A VGS = -10 V, ID = -1.8 A @125C VGS = -4.5 V, ID = -1.4 A VGS = -10 V, VDS = - 5 V VDS = -5 V, ID = -1.8 A -1 -1.8 4 0.14 0.20 0.22 -3 V mV/C 0.17 0.27 0.28 ID(on) gFS -10 3 A S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) VDS = -15 V, VGS = 0 V, f = 1.0 MHz 190 70 30 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = -15 V, ID = -1 A, VGS = -4.5 V, RGEN = 6 7 8 14 2 14 16 25 6 3.5 ns ns ns ns nC nC nC VDS = -5 V, ID = -1.8 A, VGS = -10 V 2.3 1 0.8 Drain-Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.8 A (Note 2) -0.8 -0.8 -1.2 A V Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RJA is determined by the user's board design.Both devices are assumed to be operating and sharing the dissipated heat energy equally. a) 130 C/W when mounted on a 0.125 in2 pad of 2 oz. copper. b) 140 C/W when mounted on a 0.005 in2 pad of 2 oz. copper. c) 180 C/W when mounted on a 0.0015 in2 pad of 2 oz. copper. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width 300 s, Duty Cycle 2.0% FDC6506P Rev. C FDC6506P Typical Characteristics 10 VGS=-10V -ID, DRAIN CURRENT (A) 8 -7.0V -5.5V -4.5V -4.0V -3.5V 2 -3.0V 0 0 1 2 3 4 5 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2.5 2 VGS=-4.0V 1.5 -4.5V -5.0V -6.0V -7.0V 1 -10V 6 4 0.5 0 2 4 6 8 10 -VDS, DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.5 RDS(ON), ON-RESISTANCE (OHM) 1.4 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.3 1.2 1.1 1 0.9 0.8 0.7 -50 -25 0 25 50 75 100 o ID=-1.8A VGS=-10V ID=-1.0A 0.4 0.3 TJ=125 C 0.2 25 C 0.1 o o 125 150 2 3 4 5 6 7 8 9 10 TJ, JUNCTION TEMPERATURE ( C) -V GS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 4 VDS=-5V -ID, DRAIN CURRENT (A) 3 125 2 TJ=-55 C 25 C o o o Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 -IS, REVERSE DRAIN CURRENT (A) VGS=0 1 TJ=125 C 0.1 25 C -55 C 0.01 o o o 1 0 1 2 3 4 5 0.001 0 0.3 0.6 0.9 1.2 1.5 -VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6506P Rev. C FDC6506P Typical Characteristics 10 -VGS, GATE-SOURCE VOLTAGE (V) ID= -1.8A (continued) 300 VDS=-5.0V CAPACITANCE (pF) f=1MHz VGS=0V 240 -10V Ciss 180 8 6 -15V 4 120 Coss Crss 2 60 0 0 1 2 Qg, GATE CHARGE (nC) 3 4 0 0 6 12 18 24 30 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate-Charge Characteristics. Figure 8. Capacitance Characteristics. 30 10 -I , DRAIN CURRENT (A) 3 1 0.3 0.1 0.03 0.01 0.1 N S(O )L T IMI 5 100 us 1m s 10m s 10 0m s 1s DC POWER (W) 4 RD SINGLE PULSE RJA =180C/W TA = 25C 3 VGS = -10V SINGLE PULSE R JA = 180C/W T A = 25C 0.2 0.5 1 2 2 D 1 5 10 20 50 0 0.01 0.1 1 10 100 300 -VDS , DRAIN-SOURCE VOLTAGE (V) SINGLE PULSE TIME (SEC) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. TRANSIENT THERMAL RESISTANCE 1 0.5 D = 0.5 r(t), NORMALIZED EFFECTIVE 0.2 0.1 0.05 0.2 0.1 0.05 0.02 0.01 R JA (t) = r(t) * R JA R JA =180C/W P(pk) t1 t2 0.02 0.01 0.0001 Single Pulse TJ - T A = P * R JA (t) Duty Cycle, D = t 1 / t 2 0.001 0.01 0.1 t 1 , TIME (sec) 1 10 100 300 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient themal response will change depending on the circuit board design. FDC6506P Rev. C SuperSOTTM-6 Tape and Reel Data and Package Dimensions SSOT-6 Packaging Configuration: Figure 1.0 Customize Label Antistatic Cover Tape Conductive Embossed Carrier Tape F63TNR Label 631 SSOT-6 Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code) TNR 3,000 7" Dia 184x187x47 9,000 0.0158 0.1440 D87Z TNR 10,000 13" 343x343x64 20,000 0.0158 0.4700 631 631 631 Pin 1 SSOT-6 Unit Orientation 343mm x 342mm x 64mm Intermediate box for D87Z Option F63TNR Label F63TNR Label F63TNR Label sample 184mm x 184mm x 47mm Pizza Box for Standard Option F63TNR Label LOT: CBVK741B019 FSID: FDC633N QTY: 3000 SPEC: Trailer SSOT-6 Tape Leader Configuration: Figure 2.0 D/C1: D9842 D/C2: QTY1: QTY2: SPEC REV: CPN: QARV: (F63TNR)2 Carrier Tape Cover Tape Trailer Tape 160mm minimum Components Leader Tape 390mm minimum (c) 1998 Fairchild Semiconductor Corporation December 1998, Rev. B SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued SSOT-6 Embossed Carrier Tape Configuration: Figure 3.0 T E1 P0 D0 F K0 Wc B0 E2 W Tc A0 P1 D1 User Direction of Feed Dimensions are in millimeter Pkg type SSOT-6 (8mm) A0 3.23 +/-0.10 B0 3.18 +/-0.10 W 8.0 +/-0.3 D0 1.55 +/-0.05 D1 1.00 +/-0.125 E1 1.75 +/-0.10 E2 6.25 min F 3.50 +/-0.05 P1 4.0 +/-0.1 P0 4.0 +/-0.1 K0 1.37 +/-0.10 T 0.255 +/-0.150 Wc 5.2 +/-0.3 Tc 0.06 +/-0.02 Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C). 20 deg maximum Typical component cavity center line 0.5mm maximum B0 20 deg maximum component rotation 0.5mm maximum Sketch A (Side or Front Sectional View) Component Rotation A0 Sketch B (Top View) Typical component center line Sketch C (Top View) Component lateral movement SSOT-6 Reel Configuration: Figure 4.0 Component Rotation W1 Measured at Hub Dim A Max Dim A max Dim N See detail AA 7" Diameter Option B Min Dim C See detail AA W3 Dim D min 13" Diameter Option W2 max Measured at Hub DETAIL AA Dimensions are in inches and millimeters Tape Size 8mm Reel Option 7" Dia Dim A 7.00 177.8 13.00 330 Dim B 0.059 1.5 0.059 1.5 Dim C 512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2 Dim D 0.795 20.2 0.795 20.2 Dim N 2.165 55 4.00 100 Dim W1 0.331 +0.059/-0.000 8.4 +1.5/0 0.331 +0.059/-0.000 8.4 +1.5/0 Dim W2 0.567 14.4 0.567 14.4 Dim W3 (LSL-USL) 0.311 - 0.429 7.9 - 10.9 0.311 - 0.429 7.9 - 10.9 8mm 13" Dia December 1998, Rev. B SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued SuperSOTTM-6 (FS PKG Code 31, 33) 1:1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.0158 (c) 1998 Fairchild Semiconductor Corporation September 1998, Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM DISCLAIMER ISOPLANARTM MICROWIRETM POPTM PowerTrenchTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 TinyLogicTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. |
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